JPS5899932U - Sampling pulse generator - Google Patents

Sampling pulse generator

Info

Publication number
JPS5899932U
JPS5899932U JP19259581U JP19259581U JPS5899932U JP S5899932 U JPS5899932 U JP S5899932U JP 19259581 U JP19259581 U JP 19259581U JP 19259581 U JP19259581 U JP 19259581U JP S5899932 U JPS5899932 U JP S5899932U
Authority
JP
Japan
Prior art keywords
sampling pulse
frequency division
pulse
temporary storage
division ratio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19259581U
Other languages
Japanese (ja)
Inventor
石畑 一史
熊野 隆
Original Assignee
株式会社日立製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立製作所 filed Critical 株式会社日立製作所
Priority to JP19259581U priority Critical patent/JPS5899932U/en
Publication of JPS5899932U publication Critical patent/JPS5899932U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の=実施例を示すブロック図、第2図は
第1図の各部の動作を示すタイムチャート、第3図は本
考案を説明するための説明図である。 2:パルス発振器、3:分周手段、4:第1の一時記憶
手段、5:第2の一時記憶手段、6:分周比制御手段、
7,8:減算回路、9:設定器。
FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a time chart showing the operation of each part of FIG. 1, and FIG. 3 is an explanatory diagram for explaining the present invention. 2: Pulse oscillator, 3: Frequency division means, 4: First temporary storage means, 5: Second temporary storage means, 6: Frequency division ratio control means,
7, 8: Subtraction circuit, 9: Setting device.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] パルス発振手段と、このパルス発振手段からのパルスを
分周してサンプリング・パルスを発生する分周手段と、
ディジタル変換された被サンプリングデータを前記サン
プリング・パルスを受けて取込み一時記憶する第1の一
時記憶手段と、この第1の一時記憶手段の記憶内容を前
記サンプリング・パルスを受けて取込み一時記憶する第
2の一時記憶手段と、前記第1の一時記憶手段の記憶内
容と前記第2の一時記憶内容との差の絶対値に応じこの
値が大きくなるに従って前記分周手段の分周比を小さく
するよう制御する分周比制御手段とを具備して成るサン
プリング・パルス発生装置。
a pulse oscillation means; a frequency division means for dividing the frequency of the pulse from the pulse oscillation means to generate a sampling pulse;
a first temporary storage means for receiving and temporarily storing the digitally converted sampled data in response to the sampling pulse; and a first temporary storage means for receiving and temporarily storing the stored contents of the first temporary storage means in response to the sampling pulse; the frequency division ratio of the frequency dividing means is decreased as this value increases according to the absolute value of the difference between the memory content of the first temporary memory means and the second temporary memory content; 1. A sampling pulse generator comprising frequency division ratio control means for controlling the frequency division ratio.
JP19259581U 1981-12-25 1981-12-25 Sampling pulse generator Pending JPS5899932U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19259581U JPS5899932U (en) 1981-12-25 1981-12-25 Sampling pulse generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19259581U JPS5899932U (en) 1981-12-25 1981-12-25 Sampling pulse generator

Publications (1)

Publication Number Publication Date
JPS5899932U true JPS5899932U (en) 1983-07-07

Family

ID=30105998

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19259581U Pending JPS5899932U (en) 1981-12-25 1981-12-25 Sampling pulse generator

Country Status (1)

Country Link
JP (1) JPS5899932U (en)

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