JPS5895833A - Lead frame - Google Patents
Lead frameInfo
- Publication number
- JPS5895833A JPS5895833A JP56194029A JP19402981A JPS5895833A JP S5895833 A JPS5895833 A JP S5895833A JP 56194029 A JP56194029 A JP 56194029A JP 19402981 A JP19402981 A JP 19402981A JP S5895833 A JPS5895833 A JP S5895833A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- lead
- thin wire
- distance
- metallic thin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】 本発明は、半導体素子（チップ）を接着するダ。[Detailed description of the invention] The present invention is a method for bonding semiconductor elements (chips).
イボンド部と同素子の電極部にリード用金属細線をつな
ぐための多数のリードを櫛形に配置したリードフレーム
に関するものであり、更に詳しくは櫛形に配置したリー
ドの最先端部分の形状に関するものである。This invention relates to a lead frame in which a large number of leads are arranged in a comb shape for connecting thin metal wires for leads to a bond part and an electrode part of the same element, and more specifically, it relates to the shape of the leading edge part of the leads arranged in a comb shape. .
本発明に於ては、リードフレ・−ム先端の形状を凸形に
形成せしめることにより、半導体素子の電極部とリード
フレームとを金属細線で圧着接続する際の金属細線の配
向に′対する制約を大巾に緩和し半導体素子の電極端子
配置などの設計の自由度を高め、更には樹脂封止後の歩
留りの向上により、経済的な半導体装置の製造をはかる
ことを目的とする。In the present invention, by forming the tip of the lead frame into a convex shape, restrictions on the orientation of the thin metal wires when crimping and connecting the electrode portion of the semiconductor element and the lead frame with the thin metal wires are eliminated. The purpose of this invention is to significantly reduce the cost, increase the degree of freedom in designing the electrode terminal arrangement of semiconductor elements, and further improve the yield after resin encapsulation, thereby achieving economical manufacturing of semiconductor devices.
以下図面を参照して１本発明の詳細な説明する。The present invention will be described in detail below with reference to the drawings.
従来用いられているリードフレームのリードの金属細線
接続部分の先端部の形状は、第１図に示される如く矩形
の３辺に囲まれた如き形状をしている。このり°−ドの
接続部２．に金属細線１を圧着接続した時、金属細線１
は隣接する他のリードの接続部２との間に、最短距離を
ｄｌ、金属細線１とその金属細線１が接続されたリード
接続端子部２の軸方向との成す角をθ１とする時、θ１
に対して距離ｄ１がある臨界値よりも短かくなりだ場合
には、金属細線の垂れ下りもしくは樹脂封止時の樹脂の
流れによる変形等の原因によって隣接する他のリード２
と金属細線１が電気的に短絡して半導体装置の電気的不
良を発生することがｌ−ばしばちり、距離ｄ１はある臨
界値以上離す必要がありた。逆に、金属細線１を接続す
る時に形成される角θ１も設定された距離ｄ１によって
制約を受ける。このθ１はリード２の配置と半導体素子
の電極端子の配置との相互関係で決められる。The tip of the thin metal wire connection portion of the lead of a conventionally used lead frame has a shape surrounded by three sides of a rectangle, as shown in FIG. Connection part of this board 2. When thin metal wire 1 is crimped and connected to
When dl is the shortest distance between the connecting portion 2 of another adjacent lead, and θ1 is the angle formed between the thin metal wire 1 and the axial direction of the lead connecting terminal portion 2 to which the thin metal wire 1 is connected, θ1
If the distance d1 becomes shorter than a certain critical value, other adjacent leads 2 may be damaged due to factors such as hanging of the thin metal wire or deformation due to the flow of resin during resin sealing.
The distance d1 has to be greater than a certain critical value because it is often the case that the thin metal wire 1 is electrically short-circuited, resulting in electrical failure of the semiconductor device. Conversely, the angle θ1 formed when connecting the thin metal wires 1 is also restricted by the set distance d1. This θ1 is determined by the mutual relationship between the arrangement of the leads 2 and the arrangement of the electrode terminals of the semiconductor element.
したがっであるリードフレームを適用し得る半導体素子
の電極部の配置は、そのリードフレームのそれぞれのリ
ードに対応できる特定の配置に限定されることになり、
半導体素子の設計上大きな制約が加わえられるだけでな
く、時には半導体素子の電極部位置の制約の故に、素子
基板の面積を太きくしなければならなくなり、経済的に
も極めて不都合な場合が生じていた。また逆に半導体素
子の設計に自由度を持たせ、その電極部の配列を素子の
大きさに対応させて必要最小限度の大きさに押えるとき
には１．同一数の電極端子数の半導体素子であっても、
異なる品種毎に、それぞれの半導体素子の電極部配列に
合わせたリードフレームを用意しなければならなくなり
、標準化の方向に逆向することになって不経済である。Therefore, the arrangement of the electrode parts of a semiconductor element to which a lead frame can be applied is limited to a specific arrangement that can correspond to each lead of the lead frame.
Not only does this impose significant restrictions on the design of semiconductor devices, but sometimes the area of the device substrate must be increased due to restrictions on the position of the electrodes of semiconductor devices, which can be very economically disadvantageous. Ta. On the other hand, when you want to give a degree of freedom to the design of a semiconductor element and keep the arrangement of the electrode parts to the minimum necessary size by matching the size of the element, 1. Even if the semiconductor device has the same number of electrode terminals,
It is necessary to prepare a lead frame that matches the electrode arrangement of each semiconductor element for each different product type, which is uneconomical because it goes against the direction of standardization.
本発明は、上述の如き距離ｄ１及び角θ１に対する制約
を大巾に緩和できるように、リードの接続細線接着部先
端部の形状を隣接リード接着細線との重なりを小さくで
きる形状とした。In the present invention, the shape of the tip of the connecting thin wire bonding portion of the lead is shaped to reduce the overlap with the adjacent lead thin bonding wire so that the constraints on the distance d1 and the angle θ1 as described above can be relaxed to a large extent.
本発明の一実施例であるリードフレームの先端部におけ
る金属細線接続部分の形状を第２図に示す。第２図に於
てリード３の先端部はほぼ半１形で、この部分と隣接す
る他のリードに接続された金属細線１との最短距離ｄ２
を、第１図の従来の形状の場合の最短距離ｄ１と比較す
ると、第２図の金属細線１とそのリードの軸方向とのな
す角をく
θ２とすれば、距離ｄ２が距離ｄ１に等しい時（即ち不
良を生じぬ臨界圧〃に奎る時）には、角θ２は角θ１
よりはるかに大きくなることは明らかである。それ故、
本発明の如く、リードフレームの先端の形状を凸形にな
したことにより、半導体素子の電極部とリードフレーム
の接続部とを結ぶ金属細線の同リードフレーム軸とのな
す角θ２の自由度がはるかに大きくなることもまた明ら
かである。FIG. 2 shows the shape of a thin metal wire connection portion at the tip of a lead frame according to an embodiment of the present invention. In FIG. 2, the tip of the lead 3 is approximately half-shaped, and the shortest distance d2 between this portion and the thin metal wire 1 connected to another adjacent lead is d2.
is compared with the shortest distance d1 in the conventional shape shown in Fig. 1. If the angle between the thin metal wire 1 in Fig. 2 and the axial direction of its lead is θ2, then the distance d2 is equal to the distance d1. (i.e., when reaching a critical pressure that does not cause defects), the angle θ2 is the angle θ1
It is clear that it will be much larger. Therefore,
By making the tip of the lead frame convex as in the present invention, the degree of freedom of the angle θ2 formed by the thin metal wire connecting the electrode part of the semiconductor element and the connection part of the lead frame with the axis of the lead frame is increased. It is also clear that it will be much larger.
第２図では、リードフレームの金属細線接続部の先端の
形状がほぼ半円形に形成された場合を例ｊ［示したが、
別の実施例で−ある第３図の如く、その先端の形状が金
属細線接続部より細幅にしたものあるいは生学角形の凸
形の形状に形成しても同様の効果の得られることは明ら
かである。In FIG. 2, example j [shown in FIG.
In another embodiment, as shown in FIG. 3, the same effect can be obtained even if the tip is made narrower than the thin metal wire connection part or has a convex shape of a biological square. it is obvious.
本発明のリードフレームを用いることにより、以下の如
き大きな経済的効果が得られる。By using the lead frame of the present invention, the following great economic effects can be obtained.
１、半導体素子基板表面上の電極部、すなわちボンディ
ング部（第４図の６）の配置、リードフレームの金属細
線接続端子（第４図に示すリード６）の位置に対して殆
んど左右されることがない。1. It mostly depends on the arrangement of the electrode part, that is, the bonding part (6 in Fig. 4) on the surface of the semiconductor element substrate, and the position of the metal thin wire connection terminal (lead 6 shown in Fig. 4) of the lead frame. Never.
２、半導体素子基板表面上の電極端子の配置に自由度が
増すため、素子面積を最小必要限度の大きさにすること
が出来る。2. Since the degree of freedom in arranging electrode terminals on the surface of the semiconductor element substrate increases, the element area can be reduced to the minimum necessary size.
３、半導体素子表面上のボンディング部の配置の異なる
異品種にも一同一のリードフレームを共通して使用する
ことが可能となり、リードフレームの洸用件を高め、標
準化することが可能となる。3. One and the same lead frame can be used in common for different types of semiconductor devices having different bonding portions on the surface of the semiconductor element, improving lead frame handling requirements and making it possible to standardize the lead frame.
その結果、在庫期間の短縮並びに在庫管理が簡素化され
るだけでなく、工程での異種混合のミスも少なくなるた
め、コストの低減に有利である。As a result, not only the inventory period is shortened and inventory management is simplified, but also mistakes in mixing different types in the process are reduced, which is advantageous for cost reduction.
４、リードフレームに接続された金属細線とそれに隣接
するリードフレーム先端部との距離ｄ２が大きくなり、
電気的短絡を防止する効果が大きく、歩留りの向上に゛
寄与できる。4. The distance d2 between the thin metal wire connected to the lead frame and the tip of the lead frame adjacent to it increases,
It is highly effective in preventing electrical short circuits and can contribute to improving yield.
第１図は従来のリードフレームの金属細線が接続される
部分のリードの形状と金属細線の接続を示゛す平面図、
第２図は本発明の一実施例のリードフレームのリード形
状と金属細線の接続を示す平面図、第３図は本発明の別
の実施例形状の要部平面図、第４図はリードフレームの
半導体素子の搭載部と、リード部分とを示した全体平面
図である。
１・・・〉・・金属細線、４・・・・・・リードフレー
ムのリードの金属細線を接着する側の部分−６°°°リ
ードフレームの半導体素子搭載部、６・・・・・・リー
ド、θ２゛・・・・・・金属細線と金属細線接続リード
中心線とのなす角、ｄ２・・・・・・金属細線と隣りの
リード先端部との最短距離。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名区
区
曽 寸
ＩＲ稼FIG. 1 is a plan view showing the shape of the leads and the connection of the thin metal wires in the part of the conventional lead frame to which the thin metal wires are connected;
Fig. 2 is a plan view showing the lead shape of a lead frame according to one embodiment of the present invention and the connection of thin metal wires, Fig. 3 is a plan view of the main part of another embodiment of the present invention, and Fig. 4 is a plan view of the lead frame. FIG. 2 is an overall plan view showing a mounting portion of a semiconductor element and a lead portion. 1...> Thin metal wire, 4... Part of the lead frame on the side where the thin metal wire is bonded - 6°°° Semiconductor element mounting part of the lead frame, 6... Lead, θ2゛...Angle between the thin metal wire and the center line of the thin metal wire connecting lead, d2...The shortest distance between the thin metal wire and the tip of the adjacent lead. Name of agent: Patent attorney Toshio Nakao and 1 other person
Kuso Sun IR Earnings
Claims (1)
部を囲んで配置され前記半導体チップ上の電極部との間
を金属細線で接続するための多数のリードを備え、前記
リードフレームの先端が凸形に形成されてなるリードフ
レーム。A die-pond part to which a semiconductor chip is bonded, and a large number of leads arranged around the die-pond part to connect with electrode parts on the semiconductor chip using thin metal wires, and the tip of the lead frame has a convex shape. A lead frame that is formed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56194029A JPS5895833A (en) | 1981-12-02 | 1981-12-02 | Lead frame |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56194029A JPS5895833A (en) | 1981-12-02 | 1981-12-02 | Lead frame |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5895833A true JPS5895833A (en) | 1983-06-07 |
Family
ID=16317749
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56194029A Pending JPS5895833A (en) | 1981-12-02 | 1981-12-02 | Lead frame |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5895833A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01133340A (en) * | 1987-11-19 | 1989-05-25 | Mitsui High Tec Inc | Lead frame and manufacture thereof |
| US6075281A (en) * | 1999-03-30 | 2000-06-13 | Vanguard International Semiconductor Corporation | Modified lead finger for wire bonding |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51109774A (en) * | 1975-03-20 | 1976-09-28 | Nippon Electric Co |
-
1981
- 1981-12-02 JP JP56194029A patent/JPS5895833A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51109774A (en) * | 1975-03-20 | 1976-09-28 | Nippon Electric Co |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01133340A (en) * | 1987-11-19 | 1989-05-25 | Mitsui High Tec Inc | Lead frame and manufacture thereof |
| US6075281A (en) * | 1999-03-30 | 2000-06-13 | Vanguard International Semiconductor Corporation | Modified lead finger for wire bonding |
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