JPS5895639U - Hybrid integrated circuit device - Google Patents
Hybrid integrated circuit deviceInfo
- Publication number
- JPS5895639U JPS5895639U JP19225481U JP19225481U JPS5895639U JP S5895639 U JPS5895639 U JP S5895639U JP 19225481 U JP19225481 U JP 19225481U JP 19225481 U JP19225481 U JP 19225481U JP S5895639 U JPS5895639 U JP S5895639U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- circuit device
- hybrid integrated
- board
- case
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Casings For Electric Apparatus (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は混成集積回路装置の一部断面斜視図、第２図は
従来ケースの一部拡大平面図、第３図ａ。
ｂは改良されたケースの一部拡大平面図、第４図ａ、
ｂは改良されたケースに従来の基板を収容した場合の
概略図、第５図ａ、 ｂは本考案の基板のそれぞれ異
なる例を示す平面図、第６図ａ、 ｂは改良されたケ
ースに本考案の基板を収容した場合の平面図である。
８：補強部を備えたケース、１０：回路基板、１１：面
取りした基板コーナ部、１２：丸みをもたせた基板コー
ナ部。FIG. 1 is a partially sectional perspective view of a hybrid integrated circuit device, FIG. 2 is a partially enlarged plan view of a conventional case, and FIG. 3a. b is a partially enlarged plan view of the improved case, Fig. 4a,
b is a schematic diagram of a conventional board housed in an improved case, Figures 5a and b are plan views showing different examples of the board of the present invention, and Figures 6a and b are diagrams of the improved case. FIG. 3 is a plan view of a case where the substrate of the present invention is accommodated. 8: Case with reinforcing part, 10: Circuit board, 11: Chamfered board corner part, 12: Rounded board corner part.
Claims (1)
が塔載された基板を収納し、樹脂を充填してなる混成集
積回路装置において、前記基板のコーナ部をケースの補
強部に適応すべく、面取りあるいは丸みをもたせた形状
としたことを特徴とする混成集積回路装置。In a hybrid integrated circuit device in which a board on which electronic components are mounted is housed in a case provided with a reinforcing part at the inner corner part and filled with resin, the corner part of the board is adapted to the reinforcing part of the case. A hybrid integrated circuit device characterized by having a chamfered or rounded shape.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19225481U JPS5895639U (en) | 1981-12-23 | 1981-12-23 | Hybrid integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19225481U JPS5895639U (en) | 1981-12-23 | 1981-12-23 | Hybrid integrated circuit device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5895639U true JPS5895639U (en) | 1983-06-29 |
Family
ID=30105674
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19225481U Pending JPS5895639U (en) | 1981-12-23 | 1981-12-23 | Hybrid integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5895639U (en) |
-
1981
- 1981-12-23 JP JP19225481U patent/JPS5895639U/en active Pending
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