JPS5892017A - Power supply device - Google Patents
Power supply deviceInfo
- Publication number
- JPS5892017A JPS5892017A JP19138681A JP19138681A JPS5892017A JP S5892017 A JPS5892017 A JP S5892017A JP 19138681 A JP19138681 A JP 19138681A JP 19138681 A JP19138681 A JP 19138681A JP S5892017 A JPS5892017 A JP S5892017A
- Authority
- JP
- Japan
- Prior art keywords
- output
- power supply
- terminal
- voltage
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/145—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means
- H02M7/155—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
Description
【発明の詳細な説明】
零発＠社、安定化電源の丸めの閉ループを構成するスイ
ッチング電＃１回ｆＩＮＩＫ関する。DETAILED DESCRIPTION OF THE INVENTION This invention relates to a switching power supply #1 fINIK that constitutes a rounded closed loop of a stabilized power supply.
一般的に使用される、閉ループをもったスイッチング安
定化電源回路を第１図に示す。（４）はバッテリー等の
安定化されていない入力電源端子、（８）は安定化され
え出力型＃端子である。（１） ＃ｉ制御回路で、（２
）〜（６） Ｋ １ｍ Ｍを供給する回路用安定化電源
である。（り Ｆｉ発振器、（３）は発振！Ｉ（２）
Ｋよりトリガーされるのこぎり波発生回路、（４）は電
圧比較器で、差動アンプ（５）の出力電圧値により設定
される電位Ｙｃとのこぎ妙技発生回路（３）の電圧を比
較して矩形波出力を出力し、反転アンプ（６）、抵抗（
ｒｌ）を介してスイッチング素子であるトランジスタ（
Ｑ２）のペース入力とし、トランジスタ（Ｑ２）を導通
させる。A commonly used closed-loop switching stabilization power supply circuit is shown in FIG. (4) is an unstabilized input power supply terminal such as a battery, and (8) is an output type # terminal that can be stabilized. (1) #i control circuit, (2
) to (6) This is a stabilized power supply for a circuit that supplies K 1mM. (Fi oscillator, (3) oscillates! I (2)
The sawtooth wave generation circuit triggered by K, (4) is a voltage comparator, which compares the voltage of the saw trick generation circuit (3) with the potential Yc set by the output voltage value of the differential amplifier (5). Outputs a square wave output, inverting amplifier (6), resistor (
The switching element transistor (
Q2) is used as a pace input, and the transistor (Q2) is made conductive.
トランジスタ（Ｑ２）が導通するととＫより抵抗（ｒ２
）を介して出力トランジスタ（Ｑｌ）のベース電流が流
れ、トランジスタ（Ｑｌ ）が導通する。このように出
力トランジスタ（Ｑｌ）に矩形波出力が得られ、ダイオ
ード（ＤＩ ）、インダクタ（Ｌｌ）、コンデンサ（Ｃ
１）で構成されるフィルタ（８）にて平滑されてＤＣ電
圧にされ、端子（２）に直流電圧ＶＢが出力される。こ
の端子（６）の出力Ｖ、は可変抵抗＠ ＶＲｓ （９）
を介して差動アンプ（６）に入力され、基準電圧発生器
（７）の出力と比較されることにより閉ループを構成し
ている。When the transistor (Q2) becomes conductive, the resistance (r2
), the base current of the output transistor (Ql) flows, and the transistor (Ql) becomes conductive. In this way, a square wave output is obtained at the output transistor (Ql), and the diode (DI), inductor (Ll), and capacitor (C
1), the voltage is smoothed into a DC voltage, and the DC voltage VB is output to the terminal (2). The output V of this terminal (6) is a variable resistance @ VRs (9)
The signal is input to the differential amplifier (6) via the reference voltage generator (7), and is compared with the output of the reference voltage generator (7) to form a closed loop.
例えば、出力電源端子（８）の出力電圧１に９ｖＫＩＩ
ｋ定するように可変抵抗器（９）を調整したとする。説
明を簡単にするためにフィルタ（８）が理想的なもの（
ダイオード（ＤＩ ）の順方向ドロップ電位Ｏｖ１イン
ダクタ（Ｌりの抵抗値Ｑ、−ｙンデンサ（ＣＩ ）のＱ
がｏｅ）であり、出力トランジスタ（Ｑｌ）の導通時の
電位ドロップｔ−ｏとすると、入力電源端子（４）の入
力電位ｖＡが１２Ｖのとき、出力トランジスタ（Ｑｔ
）の導通時のデユティは９／１２ ＝α７５すなわち７
５％となる。このとき差動アンプ（６）の出力電位は第
３図（ロ）Ｋ示すＶｌの電位になって、デユティが７５
％で安定するようＫしている。入力電圧ｖＡが１８Ｖに
上ると、出力トランジスタ（Ｑｌ）のデユティが９／１
ｇ＝α５０すなわち５０％になるように差動アンプ（５
）の出力が１／２に変化し安定化する。これが一般的な
スイッチング方式の安定化電源の動作である。なお第３
図において（イ）Ｆｉｖ＾が１２Ｖのときの出力トラン
ジスタ（Ｑｌ）り
のコレクタ波形、（ロ）はのこ恢波発生回路（３）のの
こぎ妙技出力波形、（１ｔｆＶａが１８Ｖに上つ九とき
の出力トランジスタ（Ｑｌ）の波形を示す。For example, 9vKII is applied to the output voltage 1 of the output power supply terminal (8).
Assume that the variable resistor (9) is adjusted so that k is constant. To simplify the explanation, filter (8) is an ideal one (
Forward drop potential of diode (DI) Ov1 Inductor (L resistance value Q, -y capacitor (CI) Q
is oe) and the potential drop t-o when the output transistor (Ql) is turned on. When the input potential vA of the input power supply terminal (4) is 12V, the output transistor (Qt
) is conducting duty is 9/12 = α75 or 7
It will be 5%. At this time, the output potential of the differential amplifier (6) becomes the potential Vl shown in FIG. 3 (b) K, and the duty is 75.
K is set to be stable at %. When the input voltage vA rises to 18V, the duty of the output transistor (Ql) becomes 9/1.
A differential amplifier (5
) output changes to 1/2 and stabilizes. This is the operation of a typical switching type stabilized power supply. Furthermore, the third
In the figure, (a) the collector waveform of the output transistor (Ql) when Fiv^ is 12V, (b) the saw trick output waveform of the saw wave generation circuit (3), (9) when 1tfVa exceeds 18V. This shows the waveform of the output transistor (Ql) at that time.
上記スイッチング方式の安定化電源は効率がよい九め、
発熱も少なく、クンバクトに構成できるが、回路約に複
雑になり易い。第１図の出力を回路負荷４１に用いる場
合のみでは問題にならないが、モータ負荷や、プランジ
ャー負荷等の起動時に大電流が流れる場合に用いるとき
は、起動の瞬間電圧が瞬間変動し、回路側へ影響を４禾
る。この問題を防ぐために従来で＃１（２）〜（９）ま
での構成を２系統必要とし、電源回路が非常に複雑にな
っていた。The above switching type stabilized power supply is highly efficient.
It generates less heat and can be constructed in a simple manner, but the circuit tends to be complicated. There is no problem when the output shown in Figure 1 is used only for the circuit load 41, but when it is used when a large current flows when starting a motor load, plunger load, etc., the instantaneous starting voltage may fluctuate instantaneously, causing the circuit 4 influences on the side. In order to prevent this problem, conventionally, two systems of configurations #1 (2) to (9) were required, making the power supply circuit extremely complicated.
本発明は上記問題を解決するためのもので、閉ループを
構成するスイッチング電源回路の出力段をドライブする
スイッチング素子に並列に別の出力段を接続し、この別
の出力段を負Ｒ５ｃ動の急激な負荷に接続し、その瞬間
電圧変動かもとの出力段に接続した回路側へ及ぼす影春
を避けるようにし九ものである。The present invention is intended to solve the above problem, and is to connect another output stage in parallel to the switching element that drives the output stage of a switching power supply circuit constituting a closed loop, and to connect this other output stage to the sudden negative R5c movement. This is to avoid the effect of instantaneous voltage fluctuations on the circuit connected to the original output stage.
以下本発明の一実施例を図面に基づいて説明する。第２
図ｔｉ２系統図の回路構成の共体例を示し、（Ｑｓ）Ｆ
ｉｇ８１図の出力トランジスタ（Ｑｌ）と崗様入力電源
端子囚に接続され丸別の出力トランジスタで、そのベー
スは抵抗（ｒ４）を介して第１図のドライブトランジス
タ（Ｑｔ）のコレクタに接続され、そのコレクタに得ら
れる出力はダイオード（Ｄ２ ） 、インダクタ（Ｌ２
） 、コンデンサ（Ｃｚ ）で構成されるフィルタＱ
υにて平滑されて出力電源端子ｔｃ） Ｋ出力される。An embodiment of the present invention will be described below based on the drawings. Second
Figure ti shows an example of the circuit configuration of the 2 system diagram, and (Qs)F
It is a separate output transistor connected to the output transistor (Ql) in Figure 81 and the input power supply terminal, and its base is connected to the collector of the drive transistor (Qt) in Figure 1 via a resistor (r4). The output obtained at the collector is a diode (D2), an inductor (L2
), a filter Q consisting of a capacitor (Cz)
It is smoothed by υ and outputted from the output power supply terminal tc).
この端子（Ｃ） Ｋ Ｆｉ起属時に大電流が流れるモー
タ負荷やプランジャー負荷が接続されるが、起動時に一
一電圧が変動しても安定化出力電源端子（８）に接続さ
れた回路側への影響は避けられる。This terminal (C) is connected to the motor load and plunger load through which a large current flows when KFi is activated, but even if the voltage fluctuates during startup, the circuit side connected to the stabilized output power supply terminal (8) impact on can be avoided.
さらにその動作を詳細に説明する。端子（Ｂ）き端子囚
の入出力特性は閉ループが構成されているため、トラン
ジスタ（Ｑｔ）のコレクタに抵抗（ｒ４）を接続しても
全く変化はない。端子＠）の出力電圧ＶＢが９ｖ１端子
（４）の入力電圧ｖＡが１２Ｖである場合、前記説明で
の理想状塾では第３図費）に示すようにトランジスタ（
Ｑりのコレクタの出力技形のデユティは７５％であるが
、実際はトランジスタ（Ｑｌ）の導通時の電圧ドロップ
、ダイオード（Ｄｌ）の順方向ドロップ、インプラＰ
（Ｌｌ）の抵抗性等のロスで、デユティは約８０％程度
になっている。また入力電圧ｖＡが１８ＶＫ上がると、
第３図（／）Ｋ示すようなデユティ５０％、夷１１には
これよりもう少し大きいデユティとなる。出力トランジ
スタ（Ｑｓ）を出力トランジスタ（Ｑｌ）と同等の特性
のものを使用し、ペース抵抗値をｒａ＝ｒｓ、 ｒｚ＝
ｒ４Ｋｊｌ定すると、出力トランジスタ（Ｑｓ）のコレ
クタ出力のデユティはトランジスタ（Ｑｔ）の値と同′
４ＩＫなる。Further, its operation will be explained in detail. Since the input/output characteristics of the terminal (B) constitute a closed loop, there is no change at all even if a resistor (r4) is connected to the collector of the transistor (Qt). When the output voltage VB of the terminal (@) is 9V1 and the input voltage vA of the terminal (4) is 12V, the transistor (
The duty of the output technique of the collector of Q is 75%, but in reality, the voltage drop when the transistor (Ql) conducts, the forward drop of the diode (Dl), and the implanter P
Due to losses such as resistance of (Ll), the duty is about 80%. Also, when the input voltage vA increases by 18VK,
The duty is 50% as shown in FIG. Use the output transistor (Qs) with the same characteristics as the output transistor (Ql), and set the pace resistance values as ra=rs, rz=
If r4Kjl is determined, the duty of the collector output of the output transistor (Qs) is the same as the value of the transistor (Qt).
It will be 4IK.
端子田）と端子（Ｃ）の負荷が同一で、フィルタαηを
フィルタ（８）と同等に構成した場合、端子（Ｃ）Ｆｉ
噛子（Ｂ）のように閉ループを構成されていないにも力
λ２＞ｈわらず、端子（Ｃ）の出力電圧ＶｃＨ入力電源
の変動に対してＶＣ＝ ＶＢとなり、ＶＢの特性の第４
回の曲線（ａ）で示す特性になる。また端子（Ｃ）の負
荷が端子（８）の負荷より小さい場合は出力段やフィル
りでの電圧ロスが少なくなるため、第４図の曲４１（ｃ
）となり、負荷が大きい場合は曲線（ｂ）となる。If the loads on terminal (field) and terminal (C) are the same, and filter αη is configured the same as filter (8), then terminal (C) Fi
Even though the closed loop is not configured like the pin (B), even if the force λ2>h, the output voltage of the terminal (C) VcH becomes VC = VB with respect to the fluctuation of the input power supply, and the fourth characteristic of VB
The characteristic is as shown in curve (a). Also, if the load on terminal (C) is smaller than the load on terminal (8), the voltage loss in the output stage and fill will be reduced, so curve 41 (c) in Figure 4
), and when the load is large, the curve becomes curve (b).
端子（６）の負荷がα４Ａとし、端子（Ｃ）の負荷を変
化させた場合の端子（Ｃ１の電圧Ｖｃの電圧特性をＩＮ
５図の曲線（ｅ）に示す。曲線１（１）は第１１２１の
電源を２系統用いた場合の特性を示し、はとんど向−の
特性が得られることがわかる。When the load on terminal (6) is α4A and the load on terminal (C) is changed, the voltage characteristics of voltage Vc at terminal (C1) are IN
This is shown in curve (e) in Figure 5. Curve 1(1) shows the characteristics when two systems of the 1121st power source are used, and it can be seen that the characteristics are almost always directional.
ま゛九端子（Ｃ）を極端に＃ｉ例えば短絡したとしても
ｖＢの出力変化はない。すなわち、端子（Ｃ）の田方は
第４図、第５図に示すようＫはぼ閉ル−プ安定化電源に
近い特性が得られるふとがわかる。Even if the ninth terminal (C) is extremely short-circuited, for example, there will be no change in the output of vB. That is, as shown in FIGS. 4 and 5, the terminal (C) Tabata can be seen to have characteristics close to those of a closed loop stabilized power source.
ナオ、本実施例では、トランジスタ（Ｑｔ）に並列接続
される出力トランジスタは（Ｑｌ）（Ｑｓ）の２つであ
るが、３個以上も当然可能であり、ペース抵抗、フィル
タの特性は接続される負衝によって変更した方がよい。In this example, the number of output transistors (Ql) and (Qs) connected in parallel to the transistor (Qt) is two, but it is of course possible to have three or more, and the characteristics of the pace resistor and filter are It is better to change depending on the negative impact.
以上本発明によれば、ドライブトランジスタに出力段を
並列追加接続するだけでよく、従来のように−じ系統を
複数設ける必要はなく、電源回路＃ｉ非常に−単になる
。As described above, according to the present invention, it is only necessary to additionally connect an output stage in parallel to the drive transistor, and there is no need to provide a plurality of the same systems as in the conventional case, and the power supply circuit #i becomes extremely simple.
１８１図は従来の閉ループをもったスイッチング安定化
電源回路の構成図、第２図は第１＠ＩＫ追加接続される
零尭鴫の要部の一実施例を示す構成図、第３図は入力、
のこぎシ波、出力のそれぞれの波形図、第４図は本発明
の出力電圧特性図、ＩＩ５図は零発−と従来の入出力電
圧の比較特性図である。
（Ｑｌ）（Ｑｌ）・・・出力トランジスタ、（Ｑｚ）・
・・トランジスタ（スイッチング素子）、（１）・・・
のこぎり波発生回路、（４）・・・電圧比吠器、（６）
・・・差動アンプ、（８） （１１・・・フィルタ、（
９）・・・可変抵抗器
代理人 森 木 義 私用１図
第２図
Ｉ
第５図
第４図
第５図
（ＡＪFigure 181 is a configuration diagram of a conventional closed-loop switching stabilization power supply circuit, Figure 2 is a configuration diagram showing an example of the main part of the 1@IK additionally connected, and Figure 3 is an input ,
FIG. 4 is an output voltage characteristic diagram of the present invention, and FIG. II5 is a comparison characteristic diagram of input/output voltage of zero source and conventional input/output voltages. (Ql) (Ql)...Output transistor, (Qz)
...Transistor (switching element), (1)...
Sawtooth wave generation circuit, (4)...Voltage ratio device, (6)
... Differential amplifier, (8) (11... Filter, (
9)... Variable resistor agent Yoshi Moriki Private use 1 Figure 2 Figure I Figure 5 Figure 4 Figure 5 (AJ
Claims (1)
膜をドライブするスイッチング素子に並列に別の出力膜
を接続したことを特徴とする電＃ｉＩ装置。1. An electric power supply device characterized in that another output film is connected in parallel to a switching element that drives an output film of a switching power supply circuit forming a closed loop.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19138681A JPS5892017A (en) | 1981-11-27 | 1981-11-27 | Power supply device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19138681A JPS5892017A (en) | 1981-11-27 | 1981-11-27 | Power supply device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5892017A true JPS5892017A (en) | 1983-06-01 |
Family
ID=16273730
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19138681A Pending JPS5892017A (en) | 1981-11-27 | 1981-11-27 | Power supply device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5892017A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5996865A (en) * | 1982-11-24 | 1984-06-04 | Matsushita Electric Ind Co Ltd | Power source |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5465324A (en) * | 1977-11-02 | 1979-05-25 | Hirobumi Matsuo | Multiple output direct current power converter |
| JPS5615167A (en) * | 1979-07-18 | 1981-02-13 | Matsushita Electric Ind Co Ltd | Dc-dc converter circuit |
-
1981
- 1981-11-27 JP JP19138681A patent/JPS5892017A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5465324A (en) * | 1977-11-02 | 1979-05-25 | Hirobumi Matsuo | Multiple output direct current power converter |
| JPS5615167A (en) * | 1979-07-18 | 1981-02-13 | Matsushita Electric Ind Co Ltd | Dc-dc converter circuit |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5996865A (en) * | 1982-11-24 | 1984-06-04 | Matsushita Electric Ind Co Ltd | Power source |
| JPH0124028B2 (en) * | 1982-11-24 | 1989-05-09 | Matsushita Electric Ind Co Ltd |
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