JPS5887884A - Forming method for electrode of oxide superconductor circuit - Google Patents

Forming method for electrode of oxide superconductor circuit

Info

Publication number
JPS5887884A
JPS5887884A JP56185330A JP18533081A JPS5887884A JP S5887884 A JPS5887884 A JP S5887884A JP 56185330 A JP56185330 A JP 56185330A JP 18533081 A JP18533081 A JP 18533081A JP S5887884 A JPS5887884 A JP S5887884A
Authority
JP
Japan
Prior art keywords
gold
electrode
resist
thin film
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56185330A
Other languages
Japanese (ja)
Other versions
JPS6317348B2 (en
Inventor
Yoshikazu Hidaka
日高 義和
Yoichi Enomoto
陽一 榎本
Toshiaki Murakami
敏明 村上
Takahiro Inamura
稲村 隆弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP56185330A priority Critical patent/JPS5887884A/en
Publication of JPS5887884A publication Critical patent/JPS5887884A/en
Publication of JPS6317348B2 publication Critical patent/JPS6317348B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/01Manufacture or treatment
    • H10N60/0268Manufacture or treatment of devices comprising copper oxide
    • H10N60/0744Manufacture or deposition of electrodes

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)

Abstract

PURPOSE:To enable the increase in the bonding strength of a gold electrode without deteriorating the superconductive characteristics of an oxide superconductor BaPb1-xBixO3, by forming a resist pattern after evaporation of gold, and by patterning an evaporated-gold film by etching by using the above pattern as an ethcing mask so as to form a desired electrode. CONSTITUTION:A superconducting thin film 2 made of BaPb0.75Bi0.25O3 and being 4,000Angstrom thick is formed on a substrate 1 (Figure a). Next, under the condition that the substrate is heated to a temperature of 200 deg.C, gold 6 is evaporated on the above superconducting thin film 2. Then, coating is made thereon with a positive type resist 3, and exposure is made to a light 5 through the intermediary of a mask 4 having a desired electrode pattern (Figure b). Thereafter, the resist 6 in the exposed part is removed by development (Figure c). The substrate thus prepared is immersed in the mixture solution of H2O, KI and I2 in the weight ratio of 100:20:10 for etching, and thereby the exposed gold 6 is removed (Figure d). Then, the remaining resist 3 is removed by acetone, and thereby an electrode formed of gold 6 and having a desired pattern on the superconducting thin film 2 can be formed.

Description

【発明の詳細な説明】 本発明は、酸化物超伝導体BaPb 1−よりi、O,
e用いた薄膜回路の金電極の形成方法に関するものであ
る。
Detailed Description of the Invention The present invention provides an oxide superconductor BaPb 1- from i, O,
The present invention relates to a method for forming a gold electrode of a thin film circuit using e.

低キヤリア濃度でしかも酸化物である超伝導体BaPb
よ−1B1108ヲ用いた薄膜回路の電極材料としては
、金が最も良く用いられている。
The superconductor BaPb has a low carrier concentration and is an oxide.
Gold is most commonly used as the electrode material for thin film circuits using Yo-1B1108.

第1図に、従来用いられているこの種の電極の形成方法
を示す。即ち、基板1の−)、KBapbl−1B1工
o8(0,05≦X≦0,3)からなる超伝導薄膜2を
形成しく第1図(a))、その上にポジ形レジスト3を
塗布する。次に、所望の回路パターンを描いたマスク4
を介して光5により露光する(第1図(b))。その後
、この基板を現1象液に浸し、レジスト3の不要部、即
ち、露光部を除去する(第1図(C))。次いで、この
基板の上に金6を蒸着した後(第1図(d))、アセト
ンによって残ったレジス):l除去すると同時に、当該
レジスト3の上に位置する金6をもいわゆるリフトオフ
により除去することにより、所望のパターンを有する金
電極が形成できる(第1図(e))。
FIG. 1 shows a conventionally used method for forming this type of electrode. That is, a superconducting thin film 2 consisting of a substrate 1 (-), KBapbl-1B1-8 (0,05≦X≦0,3) is formed (Fig. 1(a)), and a positive resist 3 is applied thereon. do. Next, a mask 4 with the desired circuit pattern drawn on it
(FIG. 1(b)). Thereafter, this substrate is immersed in a developing solution to remove unnecessary portions of the resist 3, that is, exposed portions (FIG. 1(C)). Next, after depositing gold 6 on this substrate (FIG. 1(d)), the remaining resist is removed using acetone, and at the same time, the gold 6 located on top of the resist 3 is also removed by so-called lift-off. By doing so, a gold electrode having a desired pattern can be formed (FIG. 1(e)).

しかしながら、このような方法による場合、ポジ形レジ
スト3は一般に基板温度が120〜140℃以上になる
と硬化してしまうことから、金6の蒸着に際し、基板温
度を高温にすることかできない。
However, in such a method, since the positive resist 3 generally hardens when the substrate temperature reaches 120 to 140° C. or higher, it is only possible to raise the substrate temperature to a high temperature when depositing the gold 6.

このため、超伝導薄膜2と金6からなる電極との間で十
分に強い接着力を得ることができす、室温と極低温間の
温度サイクルに対する耐性および接触抵抗等において欠
点を有していた6、本発明は、以上のような状況に鑑み
て外されたものでλうり、その目的は、1g化物超伝導
体l3aPbl−。
For this reason, it is possible to obtain a sufficiently strong adhesive force between the superconducting thin film 2 and the electrode made of gold 6, but it had drawbacks such as resistance to temperature cycles between room temperature and cryogenic temperature and contact resistance. 6. The present invention was developed in view of the above circumstances, and its purpose is to develop a 1g compound superconductor l3aPbl-.

B1工08薄膜上に、当該薄膜の超伝導性を損うことな
く、所望のパターンを有する金電極を強固に密着形成す
ることが可能な酸化物超伝導体回路の′電極形成方法を
提供することにある1、 このような目的を達成する/こめに、本発明は、BaP
b1−、Bi、恕、薄膜上に高温で金を#着し、その−
ヒに所望の電極パターンを有するレジスト膜を形成した
後、このレジスト膜をマスクとし7かつに、IとI2と
の混合水溶液をエッチャントとして前記金蒸着膜をエツ
チングするものである。
To provide a method for forming an electrode of an oxide superconductor circuit, which allows a gold electrode having a desired pattern to be firmly and closely formed on a B1-08 thin film without impairing the superconductivity of the thin film. Particularly 1. To achieve the above objectives, the present invention
b1-, Bi, 恕, gold was deposited on the thin film at high temperature, and the -
After forming a resist film having a desired electrode pattern, the gold vapor deposited film is etched using this resist film as a mask and using a mixed aqueous solution of I and I2 as an etchant.

即ち、前述したように密着度の高い、接触抵抗の低い良
質な電極膜を得るためには金蒸着時に基板の温度を十分
に上ける必要があるが、その際レジスト膜があると硬化
してし7壕い望捷しくない。
That is, as mentioned above, in order to obtain a high-quality electrode film with high adhesion and low contact resistance, it is necessary to raise the temperature of the substrate sufficiently during gold deposition, but at that time, if a resist film is present, it will harden. It's not very promising.

本発明は、金を蒸着し/?−後でレジストパターンを形
成し、これをエツチングマスクとして前記金蒸着膜をエ
ツチングによりパターニングして所望の電極を形成する
方法をとることにより、この不都合を回着したものであ
る。この場合、エッチャントはBaPb1−、Bi、、
08N膜の超伝導性rhに悪影響を与え々いものでなけ
ね(・:Vならないか、KIとI2との混合水溶液がこ
の要求を満々ニオことか確認された。
The present invention is characterized by depositing gold/? - This disadvantage is overcome by forming a resist pattern later, and using this as an etching mask, the gold vapor deposited film is patterned by etching to form a desired electrode. In this case, the etchant is BaPb1-, Bi, .
It was confirmed that the mixed aqueous solution of KI and I2 satisfies this requirement.

即ち、上記BaPb 1−エ13i工08からなる酸化
物薄膜をKIと王、とめ混合水溶液に浸し、酸化物薄膜
の転移温度Tcと臨界電流IC・とを経時的に測定した
結果、+1%以下の実験誤差で、これらの値の低下は全
く見られなかった。、この様子を第2図に示す。
That is, as a result of immersing an oxide thin film made of the above BaPb 1-E13i-08 in a mixed aqueous solution of KI, O, and TOME, and measuring the transition temperature Tc and critical current IC of the oxide thin film over time, it was +1% or less. Due to experimental errors of , no decrease in these values was observed. , this situation is shown in FIG.

同I図において、転移温度T((0印)および臨界電流
IC(X印)の値は、共に前記KIと12との混合水溶
液からなるエッチャントに浸す前の値で規格化しである
In Figure I, the values of the transition temperature T ((marked 0) and the critical current IC (marked X) are both normalized by the values before immersion in the etchant consisting of the mixed aqueous solution of KI and 12.

金蒸着時に基板温度を高めだ結果、従来のリフトオフ法
を用いた場合に比較して接触抵抗が1桁小さく、かつ温
度サイクルに対しても安定な良質の電極膜を得ることが
できた。以下、実施例を用いて本発明の詳細な説明する
By raising the substrate temperature during gold deposition, we were able to obtain a high-quality electrode film with an order of magnitude lower contact resistance than when using the conventional lift-off method, and which is stable against temperature cycles. Hereinafter, the present invention will be explained in detail using Examples.

第3図は、本発明の一実施例を示す各工程中における基
板の断面図である。先ず、基板1の上にBaPb1.7
5B10.2508からガる厚さ4oooXの超伝導薄
膜2を形成する(第3図(a))。次に、この基板を2
00℃に加熱した状態で、上記超伝導薄膜2の上に金6
を蒸着する。次いでその上にポジ形レジスト3を塗布し
、所望の電極パターンを有するマスク4を介して光5に
より露光した後(第3図(b))、現像して露光部のレ
ジスト3を除去する(第3図(C> ) 、、このよう
にレジスト3により電極パターンを形成した後、この基
板を、I20.KI、Iiiを1(10:20 : 1
0 :の重量比で混合した混合溶液からなるエラチント
に1()秒間浸してエツチングを行ない、前記レジスト
3から廂光した金6を除去する(第3図(d)) 、っ
次いで、残ったレジスト3をアセトンで除去することに
より、前記超伝導薄膜2の上に所望のパターンを有する
金6からなる電極が形成できた5、 このようにして電極を形成した酸化物超伝導体回路は、
前述したように電極と超伝導薄膜2との接着強度が大き
く、温度サイクルに対して安定で、かつ超電導特性も良
好であった。
FIG. 3 is a cross-sectional view of a substrate during each process showing an embodiment of the present invention. First, BaPb1.7 was deposited on the substrate 1.
A superconducting thin film 2 having a thickness of 400X and having a thickness of 5B10.2508 is formed (FIG. 3(a)). Next, add this board to 2
Gold 6 is deposited on the superconducting thin film 2 while heated to 00°C.
Deposit. Next, a positive resist 3 is applied thereon, exposed to light 5 through a mask 4 having a desired electrode pattern (FIG. 3(b)), and then developed to remove the exposed portion of the resist 3 ( FIG. 3 (C>) After forming the electrode pattern with the resist 3 in this way, this substrate was coated with I20.KI and Iii in a ratio of 1 (10:20:1).
Etching is carried out by immersing the resist 3 in an eratint made of a mixed solution mixed at a weight ratio of 0:0 to remove the luminescent gold 6 from the resist 3 (FIG. 3(d)). By removing the resist 3 with acetone, an electrode made of gold 6 having a desired pattern was formed on the superconducting thin film 2.5 The oxide superconductor circuit with the electrode formed in this way was
As mentioned above, the adhesive strength between the electrode and the superconducting thin film 2 was high, it was stable against temperature cycles, and the superconducting properties were also good.

なお、上述した実施例ではレジスト3を光5により露光
した場合についてのみ説明したが、光の代りに電子線、
X線等を用いても良いことは勿論である。
In addition, in the above-mentioned embodiment, only the case where the resist 3 was exposed to the light 5 was explained, but instead of the light, an electron beam,
Of course, X-rays or the like may also be used.

また、上述した実施例では金6の蒸着時の基板温度を2
00℃としだ。この値txt 、上述したように良好な
結果を得るために実際上十分であるが、最終的に形成し
た回路をアニールして超伝導性を生起させる際の処理温
度(70(1’c以上)を越えない程度でより高い温度
−まで加熱して行なっても、同様に良好な結果を得るこ
とができる。。
In addition, in the above-described embodiment, the substrate temperature during the deposition of gold 6 was set to 2.
It's 00℃. This value txt is practically sufficient to obtain good results as described above, but the processing temperature (70 (1'c or more)) when annealing the finally formed circuit to generate superconductivity is Similarly good results can be obtained by heating to a higher temperature, but not exceeding .

また、上述した実施例においてに、エッチャントとして
水1001/に対してKI 20?およびl1llOf
の割合で混合したものを用いた場合について説明したが
、KIおよびI2の混合割合(はこれに限定されるもの
ではなく、水1002に対し、KIは15〜302程度
、I2は5〜20ft程度混合範聞においていずれも良
好な結果が得られる。なお、この場合、KIとI2との
割合はほぼ一定に、即ち、KIを多めに混合する場合に
は工2もそれに伴って増加するようにする。KIおよび
T2の混合割合が上記範f21イよりも少な過ぎると実
用−F十分庁エツチング効果が得られず、逆に多過ぎる
場合にし1超伝吻薄膜2の特性に影響が生じる場合があ
る1、 以上説明したように、本発明によ才1け、酸化物超伝導
体)佑Pl)1−、、BiアO11の超伝導物怖を劣化
させることなく、金′屯極の1.÷看強j康を高めるこ
とができ、接触抵抗がノ」・さく、温度サイクルに対し
ても安定々良質の酸化物超伝導体回路を得ることかでき
る。
In addition, in the above-mentioned embodiment, KI 20? and l1llOf
Although we have explained the case where a mixture of KI and I2 is used, the mixing ratio of KI and I2 is not limited to this. Good results are obtained in all mixing ranges.In this case, the ratio of KI and I2 is almost constant, that is, when a large amount of KI is mixed, I2 also increases accordingly. If the mixing ratio of KI and T2 is too small than the above-mentioned range f21, a sufficient etching effect cannot be obtained for practical use, and on the other hand, if it is too large, the characteristics of the ultra-conducting thin film 2 may be affected. 1. As explained above, the present invention has the advantage of being able to produce oxide superconductors) Pl) 1-, . .. ÷Consistency can be increased, contact resistance can be reduced, and oxide superconductor circuits of good quality can be obtained stably even under temperature cycles.

捷だ、リフトオフ工程を用いない/こめに、作業が容易
になる等のオ中々優ねた効果を有する。
It has some excellent effects, such as making the work easier and without using the lift-off process.

【図面の簡単な説明】[Brief explanation of drawings]

第1図C[従来の酸化物超伝導体回路の市、極形成方法
を示す基板の断面図、第2図はBaPb1−、Bi、j
)8をKIと12との混合水溶液に浸した場合の浸漬時
間に対する超伝導特性の変化を示すグラフ、第3図は本
発明の一実施例を示す各工程中における基板の断面図で
ある。 1・・・・基板、2・・・・超伝導薄膜、3・・・・レ
ジスト、4・・・・マスク、5・・・・光、6・・  
・金。 特許出願人  日本電信電話公社 代理人 山川 政樹 第1図 第2図 ↑ 涜:、を時間(min)
Figure 1C is a cross-sectional view of a substrate showing a method for forming electrodes of a conventional oxide superconductor circuit; Figure 2 is a diagram showing BaPb1-, Bi, j
) 8 is immersed in a mixed aqueous solution of KI and 12, and FIG. 3 is a graph showing changes in superconducting properties with respect to immersion time. 1...Substrate, 2...Superconducting thin film, 3...Resist, 4...Mask, 5...Light, 6...
·Money. Patent applicant Masaki Yamakawa, agent of Nippon Telegraph and Telephone Public Corporation Figure 1 Figure 2 ↑ Time (min)

Claims (1)

【特許請求の範囲】[Claims] 基板上に形成したBaPb1−よりiJc○8からなる
薄膜パターンの上に金を高温で真空蒸着する工程と、こ
の金蒸着膜上に所望の電極パターンを有するレジスト膜
を形成する工程と、このレジスト膜をマスクとしかつに
工と工、との混合水溶液をエッチャントとして前記金蒸
着膜をエツチングして不要部の当該金蒸着を除去する工
程とを含むことを特徴とする酸化物超伝導体回路の電極
形成方法。
A step of vacuum-depositing gold at high temperature on a thin film pattern made of BaPb1- to iJc○8 formed on a substrate, a step of forming a resist film having a desired electrode pattern on this gold vapor-deposited film, and a step of forming a resist film having a desired electrode pattern on this gold vapor-deposited film. An oxide superconductor circuit comprising the step of etching the gold evaporated film using the film as a mask and using a mixed aqueous solution of etching and etching as an etchant to remove unnecessary parts of the gold evaporation. Electrode formation method.
JP56185330A 1981-11-20 1981-11-20 Forming method for electrode of oxide superconductor circuit Granted JPS5887884A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56185330A JPS5887884A (en) 1981-11-20 1981-11-20 Forming method for electrode of oxide superconductor circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56185330A JPS5887884A (en) 1981-11-20 1981-11-20 Forming method for electrode of oxide superconductor circuit

Publications (2)

Publication Number Publication Date
JPS5887884A true JPS5887884A (en) 1983-05-25
JPS6317348B2 JPS6317348B2 (en) 1988-04-13

Family

ID=16168927

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56185330A Granted JPS5887884A (en) 1981-11-20 1981-11-20 Forming method for electrode of oxide superconductor circuit

Country Status (1)

Country Link
JP (1) JPS5887884A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4566499A (en) * 1983-11-24 1986-01-28 Mitsubishi Rayon Co., Ltd. Jacquard mechanism
EP0285445A2 (en) * 1987-04-01 1988-10-05 Semiconductor Energy Laboratory Co., Ltd. Electric circuit having superconducting multilayered structure and manufacturing method for same
EP0312015A2 (en) * 1987-10-16 1989-04-19 The Furukawa Electric Co., Ltd. Oxide superconductor shaped body and method of manufacturing the same
JPH0294675A (en) * 1988-09-30 1990-04-05 Osaka Prefecture Method of forming electrode of oxide superconductor
JPH02116180A (en) * 1988-10-26 1990-04-27 Osaka Prefecture Formation of oxide superconductor electrode
US5015620A (en) * 1987-11-06 1991-05-14 The United States Of America As Represented By The Secretary Of Commerce High-Tc superconductor contact unit having low interface resistivity, and method of making

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4566499A (en) * 1983-11-24 1986-01-28 Mitsubishi Rayon Co., Ltd. Jacquard mechanism
EP0285445A2 (en) * 1987-04-01 1988-10-05 Semiconductor Energy Laboratory Co., Ltd. Electric circuit having superconducting multilayered structure and manufacturing method for same
EP0312015A2 (en) * 1987-10-16 1989-04-19 The Furukawa Electric Co., Ltd. Oxide superconductor shaped body and method of manufacturing the same
US5015620A (en) * 1987-11-06 1991-05-14 The United States Of America As Represented By The Secretary Of Commerce High-Tc superconductor contact unit having low interface resistivity, and method of making
JPH0294675A (en) * 1988-09-30 1990-04-05 Osaka Prefecture Method of forming electrode of oxide superconductor
JPH02116180A (en) * 1988-10-26 1990-04-27 Osaka Prefecture Formation of oxide superconductor electrode

Also Published As

Publication number Publication date
JPS6317348B2 (en) 1988-04-13

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