JPS588772B2 - Local oscillator circuit for automatic sweep receiver - Google Patents

Local oscillator circuit for automatic sweep receiver

Info

Publication number
JPS588772B2
JPS588772B2 JP52109320A JP10932077A JPS588772B2 JP S588772 B2 JPS588772 B2 JP S588772B2 JP 52109320 A JP52109320 A JP 52109320A JP 10932077 A JP10932077 A JP 10932077A JP S588772 B2 JPS588772 B2 JP S588772B2
Authority
JP
Japan
Prior art keywords
frequency
circuit
division ratio
controlled oscillator
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP52109320A
Other languages
Japanese (ja)
Other versions
JPS5442915A (en
Inventor
浅利栄厚
和田昭久
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP52109320A priority Critical patent/JPS588772B2/en
Publication of JPS5442915A publication Critical patent/JPS5442915A/en
Publication of JPS588772B2 publication Critical patent/JPS588772B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth

Description

【発明の詳細な説明】 本発明はディジタルチューナを用いた自動掃引受信機用
の局部発振回路に係り簡単な構成で受信周波数が最犬の
状態から最少の状態に切換わる際にも正確に動作する優
れた局部発振回路を提供するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a local oscillation circuit for an automatic sweep receiver using a digital tuner, which has a simple configuration and operates accurately even when the receiving frequency changes from the highest state to the lowest state. This provides an excellent local oscillation circuit.

一般にデイジタルチューナではフエーズロックドループ
(以下PLL回路という)を用いて局部発振回路を構成
している。
Generally, a digital tuner uses a phase-locked loop (hereinafter referred to as a PLL circuit) to configure a local oscillation circuit.

そしてこの局部発振回路の発振周波数を自動的に変化さ
せ自動掃引受信機として用いる場合にはPLL回路を構
成する電圧制御発振器と位相比較回路との間に接続され
たプログラマブル分周器の分周比を自動的に順次変化さ
せるようにしている。
When the oscillation frequency of this local oscillation circuit is automatically changed and used as an automatic sweep receiver, the frequency division ratio of a programmable frequency divider connected between the voltage controlled oscillator and the phase comparator circuit constituting the PLL circuit. are automatically changed sequentially.

ところで、この種の自動掃引受信機用の局部発振回路に
おいて位相比較回路の後段に接続するローパスフィルタ
ーには何の手当もしていないのが普通である。
Incidentally, in a local oscillation circuit for this type of automatic sweep receiver, no provision is normally made to the low-pass filter connected after the phase comparison circuit.

したがって従来の局部発振回路の場合には発振周波数が
順次大きくなるようにプログラマブル分周器の分周比を
自動的に順次変化させ、発振周波数が最大になったとこ
ろで再び発振周波数が最少になるようにプログラマブル
分周器の分周比を元の状態にリセットした場合でもロー
バスフィルターの働きによって発振周波数が最少になり
切らない場合があり正確な受信ができないことがあると
いう問題があった。
Therefore, in the case of a conventional local oscillation circuit, the division ratio of the programmable frequency divider is automatically changed sequentially so that the oscillation frequency increases one after another, and when the oscillation frequency reaches the maximum, the oscillation frequency returns to the minimum. Even when the division ratio of the programmable frequency divider is reset to its original state, the oscillation frequency may not reach the minimum due to the action of the low-pass filter, resulting in the problem that accurate reception may not be possible.

本発明は以上のような従来の欠点を除去するものであり
、簡単な構成で正確に動作する優れた局部発振回路を提
供するものである。
The present invention eliminates the above-mentioned conventional drawbacks and provides an excellent local oscillation circuit that has a simple configuration and operates accurately.

以下、本発明の局部発振回路について一実施例の図面と
ともに説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS A local oscillation circuit according to the present invention will be described below with reference to drawings of an embodiment.

図において1は基準周波数発振器、2は基準周波数発振
器1の出力と後述するプログラマブル分周器5の出力と
を比較し、両出力の位相差に比例する出力を出力する位
相比較回路、3は位相比較回路2の出力を入力とするロ
ーパスフィルター、4はローパスフィルター3ノ出力を
入力とし、このローパスフィルター3の出力に比例する
周波数で発振する電圧制御発振器、5は電圧制御発振器
4の出力を制御端子に印加された制御信号に応じて所要
の分周比で分周するプログラマブル分周器である。
In the figure, 1 is a reference frequency oscillator, 2 is a phase comparison circuit that compares the output of the reference frequency oscillator 1 with the output of a programmable frequency divider 5, which will be described later, and outputs an output proportional to the phase difference between the two outputs, and 3 is a phase comparison circuit. A low-pass filter receives the output of the comparator circuit 2 as an input; 4 is a voltage-controlled oscillator that receives the output of the low-pass filter 3 as an input and oscillates at a frequency proportional to the output of the low-pass filter 3; 5 controls the output of the voltage-controlled oscillator 4 This is a programmable frequency divider that divides the frequency at a required frequency division ratio according to a control signal applied to a terminal.

尚、ローパスフィルター3は図に示すように3つのトラ
ンジスタTR1,TR2,TR3と7つの抵抗R1〜R
7,5つのコンデンサC1〜C5,1つのダイオードD
,で構成されている。
As shown in the figure, the low-pass filter 3 includes three transistors TR1, TR2, TR3 and seven resistors R1 to R.
7, 5 capacitors C1-C5, 1 diode D
It consists of ,.

上記実施例においてプログラマブル分周器5の制御端子
に順次変化する制御信号が印加されると上記分周器5の
分周比が順次変化し、電動制御発振器4の発振周波数が
上記分周比の変化に応して変化する。
In the above embodiment, when a control signal that changes sequentially is applied to the control terminal of the programmable frequency divider 5, the frequency division ratio of the frequency divider 5 changes sequentially, and the oscillation frequency of the electrically controlled oscillator 4 changes to the frequency division ratio. Change in response to change.

したがって、電圧制御発振器40発振出力をそのまま局
部発振器の出力として用いれば受信周波数は上記分周比
の変化に応じて変化することになる。
Therefore, if the oscillation output of the voltage controlled oscillator 40 is used as it is as the output of the local oscillator, the reception frequency will change in accordance with the change in the frequency division ratio.

一方、プログラマブル分周器5に印加される制御信号は
一般に或る値より順次大きい方向又は小さい方向に変化
し、最大値又は最少値に達したとき瞬間的に元の或る値
に戻るような制御信号であるのが普通である。
On the other hand, the control signal applied to the programmable frequency divider 5 generally changes sequentially in the direction larger or smaller than a certain value, and momentarily returns to the original certain value when it reaches the maximum or minimum value. Usually it is a control signal.

したがって、受信周波数でいえば受信帯域の最少周波数
又は最大周波数から順次最大周波数又は最少周波数側に
移行し、最大周波数又は最少周波数に達したとき瞬間的
に最少周波数又は最大周波数に戻ることになる。
Therefore, in terms of reception frequency, the frequency shifts sequentially from the minimum frequency or maximum frequency of the reception band to the maximum frequency or minimum frequency side, and when the maximum frequency or minimum frequency is reached, it instantaneously returns to the minimum frequency or maximum frequency.

ところで、ローパスフィルター3内のコンデンサC1は
、掃引開始時に瞬時に充電され、抵抗R1とコンデンサ
C1で構成される時定数回路の出力が速やかに立上がら
なければならないが、ダイオードD1が存在しないと、
抵抗R1の作用により徐々にしか立上がらず、所定の電
位に立上がるまでの期間電圧制御発振器4へ加わる電圧
が低下して、その間は正しく掃引することができないと
いう問題が発生する。
By the way, the capacitor C1 in the low-pass filter 3 is charged instantly at the start of the sweep, and the output of the time constant circuit composed of the resistor R1 and the capacitor C1 must rise quickly, but if the diode D1 is not present,
A problem arises in that the potential rises only gradually due to the action of the resistor R1, and the voltage applied to the voltage controlled oscillator 4 decreases during the period until it rises to a predetermined potential, making it impossible to sweep correctly during that time.

ところが上記実施例によれば、ダイオードD1を抵抗R
1に並列に接続しているため、受信周波数が上限から下
限へ瞬間的に戻ったときにループのロックが外れ、位相
比較回路2の出力がHレベルになると、その瞬間にHレ
ベル出力がダイオードD1を介してコンデンサC1に印
加される。
However, according to the above embodiment, the diode D1 is connected to the resistor R.
1, so when the receiving frequency instantaneously returns from the upper limit to the lower limit, the loop is unlocked and the output of the phase comparator circuit 2 becomes H level.At that moment, the H level output is connected to the diode. Applied to capacitor C1 via D1.

このためコンデンサC1が急速に充電され、時定数回路
の出力が素早く立上がる。
Therefore, the capacitor C1 is rapidly charged, and the output of the time constant circuit quickly rises.

このため電圧制御発振器4にも掃引の初期から所定の電
圧が加えられ、これによって掃引開始時の掃引ミスを確
実に防止することができる。
For this reason, a predetermined voltage is also applied to the voltage controlled oscillator 4 from the beginning of the sweep, thereby reliably preventing sweep errors at the start of the sweep.

なお、受信周波誠が下限から上限へ瞬間的に変化する方
式の受信機であれば、ダイオードD1を上記実施例と逆
極性に接続すればよい。
Incidentally, if the receiver is of a type in which the reception frequency value instantaneously changes from the lower limit to the upper limit, the diode D1 may be connected with the opposite polarity to that in the above embodiment.

以上のように、本発明は、フエーズロツクドループを構
成する電圧制御発振器の出力端と位相比較回路の入力端
との間に制御信号によって分周比が変化するプログラマ
ブル分周器を設け、上記制御信号の変化によってプログ
ラマブル分周器の分周比を順次自動的に変化させ電圧制
御発振器の発振周波数を変化させるように構成すると共
に、上記位相比較回路の出力端と上記電圧制御器の入力
端との間にローバスフィルターを接続し、上記ローパス
フィルターの入力回路を構成する時定数回路の抵抗と並
列にダイオードを接続し、上記プログラマブル分周器の
分周比が最大から最少または最少から最大に瞬間的に変
化するときに、上記位相比較回路の出力を上記ダイオー
ドを介して上記時定数回路のコンデンサに印加し、この
コンデンサを瞬間的に充電するようにしたものであるか
ら、わずか1個のダイオードを付加するだけで、受信周
波数を正確に元の状態に戻し、掃引開始時から正確な掃
引を行なわせることができる。
As described above, the present invention provides a programmable frequency divider whose frequency division ratio is changed by a control signal between the output terminal of a voltage controlled oscillator constituting a phase-locked loop and the input terminal of a phase comparator circuit. The structure is configured to automatically change the division ratio of the programmable frequency divider sequentially and change the oscillation frequency of the voltage controlled oscillator according to changes in the control signal, and the output terminal of the phase comparison circuit and the input terminal of the voltage controller A low-pass filter is connected between the input circuit of the above-mentioned low-pass filter, and a diode is connected in parallel with the resistance of the time constant circuit that constitutes the input circuit of the above-mentioned low-pass filter. The output of the phase comparator circuit is applied to the capacitor of the time constant circuit via the diode, and this capacitor is charged instantaneously when By simply adding a diode, it is possible to accurately return the receiving frequency to its original state and perform an accurate sweep from the start of the sweep.

【図面の簡単な説明】[Brief explanation of the drawing]

図は本発明の自動掃引受信機用局部発振回路の概略電気
的結線図である。 1……基準周波数発振器、2……位相比較回路、3……
ローパスフィルタ、4……電圧制御発振器、5……プロ
グラマブル分周器、TR1〜TR3……トランジスタ、
R1〜R7……抵抗、C1 〜C5……コンデンサ、D
1……ダイオード。
The figure is a schematic electrical connection diagram of a local oscillation circuit for an automatic sweep receiver according to the present invention. 1... Reference frequency oscillator, 2... Phase comparator circuit, 3...
Low-pass filter, 4... Voltage controlled oscillator, 5... Programmable frequency divider, TR1 to TR3... Transistor,
R1 to R7...Resistor, C1 to C5...Capacitor, D
1...Diode.

Claims (1)

【特許請求の範囲】[Claims] 1 フエーズロツクドルーブを構成する電圧制御発振器
の出力端と位相比較回路の入力端との間に制御信号によ
って分周比が変化するプログラマブル分周器を設け、上
記制御信号の変化によってプログラマブル分周器の分周
比を順次自動的に変化させ電圧制御発振器の発振周波数
を変化させるように構成すると共に、上記位相比較回路
の出力端と上記電圧制御発振器の入力端との間にローパ
スフィルターを接続し、上記ローパスフィルターの入力
回路を構成する時定数回路の抵抗と並列にダイオードを
接続し、上記プログラマブル分周器の分周比が最大から
最少または最少から最大に瞬間的に変化するときに、上
記位相比較回路の出力を上記ダイオードを介して上記時
定数回路のコンデンサに印加し、このコンデンサを瞬間
的に充電するようにしたことを特徴とする自動掃引受信
機用局部発振回路。
1 A programmable frequency divider whose frequency division ratio changes according to a control signal is provided between the output terminal of the voltage controlled oscillator constituting the phase-locked loop and the input terminal of the phase comparator circuit, and the programmable frequency divider whose frequency division ratio changes according to the change in the control signal The oscillation frequency of the voltage controlled oscillator is changed by automatically sequentially changing the frequency division ratio of the frequency generator, and a low pass filter is provided between the output terminal of the phase comparator circuit and the input terminal of the voltage controlled oscillator. A diode is connected in parallel with the resistor of the time constant circuit that constitutes the input circuit of the low-pass filter, and when the division ratio of the programmable frequency divider changes instantaneously from the maximum to the minimum or from the minimum to the maximum. A local oscillation circuit for an automatic sweep receiver, characterized in that the output of the phase comparator circuit is applied to a capacitor of the time constant circuit via the diode to instantaneously charge the capacitor.
JP52109320A 1977-09-09 1977-09-09 Local oscillator circuit for automatic sweep receiver Expired JPS588772B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52109320A JPS588772B2 (en) 1977-09-09 1977-09-09 Local oscillator circuit for automatic sweep receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52109320A JPS588772B2 (en) 1977-09-09 1977-09-09 Local oscillator circuit for automatic sweep receiver

Publications (2)

Publication Number Publication Date
JPS5442915A JPS5442915A (en) 1979-04-05
JPS588772B2 true JPS588772B2 (en) 1983-02-17

Family

ID=14507223

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52109320A Expired JPS588772B2 (en) 1977-09-09 1977-09-09 Local oscillator circuit for automatic sweep receiver

Country Status (1)

Country Link
JP (1) JPS588772B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57109423A (en) * 1980-12-26 1982-07-07 Sony Corp Variable frequency control circuit
JPS60236319A (en) * 1984-05-09 1985-11-25 Sharp Corp Automatic channel selection controller

Also Published As

Publication number Publication date
JPS5442915A (en) 1979-04-05

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