JPS5886749A - Containing vessel for semiconductor element - Google Patents

Containing vessel for semiconductor element

Info

Publication number
JPS5886749A
JPS5886749A JP18630981A JP18630981A JPS5886749A JP S5886749 A JPS5886749 A JP S5886749A JP 18630981 A JP18630981 A JP 18630981A JP 18630981 A JP18630981 A JP 18630981A JP S5886749 A JPS5886749 A JP S5886749A
Authority
JP
Japan
Prior art keywords
semiconductor element
hole
base
resin
leads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18630981A
Other languages
Japanese (ja)
Inventor
Hiroshi Takahashi
弘 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP18630981A priority Critical patent/JPS5886749A/en
Publication of JPS5886749A publication Critical patent/JPS5886749A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To enable to automatize the coating of resin by supporting the leads of a semiconductor element at the side of a through hole of a base, covering the main surface of the base with a cover, and simplifying the containment and handling of the element. CONSTITUTION:A semiconductor element 1 isolated from a film carrier is contained in the recess of a base 10, the leads 3 which are fixed to the element are supported by supports 12 at both sides of a through hole 11, and only the element 1 is set to be passed through the hole 11 in contact with the exterior. Further, the base 10 is blocked with a cover 13 which covers the entire surface or the recess including the hole 11 of the base 10, the vessel is inverted, resin is dropped from the hole 11 on the back surface with an injector 14, and the element 1 is covered including part of the leads 3. With this structure, the damage of the leads can be avoided, the resin covering is simple, and the vessel can align and dispose the elements. Accordingly, the vessel can be used as a cassette, thereby enabling automatic resin coating work.

Description

【発明の詳細な説明】 本発明は半導体素子の実装時に使用する半導体素子の収
納容器に関するものであり、特にフィルムキャリアのリ
ード部の取り付けられた半導体素子を樹脂被覆すること
を容易にする収納容器を提供するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a storage container for semiconductor devices used when mounting semiconductor devices, and in particular to a storage container that facilitates resin coating of semiconductor devices to which lead portions of film carriers are attached. It provides:

通常半導体素子を配線基板に取り付ける方法は、まず第
1図(−)に示すように半導体素子1のリードとなるべ
き導体部3が形成されたフィルムキャリア2に半導体素
子1を電気的9機械的に取り付け(これをインナーリー
ドボンディングとよぶ)、次に第1図(b)、(C)に
示すように半導体素子1のリードとなるべき導体部3が
同半導体素子に固着されたまま残るようにフィルムキャ
リアを打ち抜き装置4,4′により同半導体素子より分
離切断し、さらに前記リード3により前記半導体素子1
を配線基板に電気的1機械的に取り付ける(これをアウ
ターリードボンディングとよぶ)ものである(図示せず
)。第2図は第1図(C)の半導体素子の斜視図を示し
ている。
Normally, the method of attaching a semiconductor element to a wiring board is as shown in FIG. (this is called inner lead bonding), and then as shown in FIGS. 1(b) and 1(c), the conductor portion 3, which is to become the lead of the semiconductor element 1, remains fixed to the semiconductor element. Then, the film carrier is separated from the semiconductor element 1 by the punching devices 4 and 4', and further the semiconductor element 1 is separated from the semiconductor element 1 by the lead 3.
is electrically and mechanically attached to the wiring board (this is called outer lead bonding) (not shown). FIG. 2 shows a perspective view of the semiconductor element of FIG. 1(C).

従来、前記のごとくリード3が付着した状態にフィルム
キャリアより分離された半導体素子1を、第3図に示し
たような凹部を形成した半導体素子保持台6の凹部上に
くるように配置し、リード保持フィルム2,2′及び、
リード3,3′を前記凹部の両側の部分で保持し、半導
体素子10表面に樹脂被覆を行うものであった。
Conventionally, the semiconductor element 1 separated from the film carrier with the leads 3 attached as described above is placed on the recess of the semiconductor element holder 6 which has a recess as shown in FIG. Lead holding films 2, 2' and
The leads 3, 3' were held on both sides of the recess, and the surface of the semiconductor element 10 was coated with resin.

上記工程において一μにフィルムキャリアを用いた半導
体装置の実装方式では、ウェハより分割された半導体素
子1とフィルムキャリア2に配したリード3とのインナ
ーリードボンディング後、機械的及び湿気や汚れからの
保護の目的により前記素子面及びボンディング部をシリ
コーンやエポキシ樹脂により被覆する必要がある。
In the semiconductor device mounting method using a film carrier for one micrometer in the above process, after inner lead bonding between the semiconductor element 1 divided from the wafer and the lead 3 arranged on the film carrier 2, mechanical protection from moisture and dirt is performed. For the purpose of protection, it is necessary to cover the element surface and the bonding portion with silicone or epoxy resin.

この樹脂被覆はインナーリードボンディング後、直ぐに
行う方法もあるが、この方法は室温硬化性樹脂の場合に
は樹脂の硬化に時間かがかり、又、熱硬化性の樹脂の場
合には、温度を上げることによってリードのSn等が酸
化を起こし1次に続くアウターリードポンディング工程
において密着不良及び接触抵抗の増大等の悪影響を及ぼ
すことがあるので、あまり一般的でない。したがってイ
ンナ−リードボンディング後に行なう切断分離エタ後に
樹脂被覆を行う方が望ましい。
There is a method to perform this resin coating immediately after inner lead bonding, but this method takes time to harden the resin in the case of a room temperature curing resin, and in the case of a thermosetting resin, the temperature is raised. This is not very common because Sn and the like in the leads may oxidize, resulting in adverse effects such as poor adhesion and increased contact resistance in the subsequent outer lead bonding process. Therefore, it is preferable to perform resin coating after cutting and separating after inner lead bonding.

前記の目的で半導体素子の樹脂被覆を行う場合、フィル
ムキャリアの切断後前記半導体素子におけるインナーリ
ードボンディングされた面か裏向いた状態になっている
ので、前記面を表向ける必要がちり半導体素子を裏返す
必要がある。この時、半導体素子を1個づつ、ピンセッ
ト等で裏返すが、又、蓋付のケースがあれば、これを用
いて全体を逆にする方法がとられる。しかし、この方法
においては、時間がかかりすぎたり、半導体素子のリ−
)”ノ巾が30〜40μと極めて細いので、ピンセット
でつまむときリードの曲りなど破損するおそれがある。
When a semiconductor element is coated with resin for the above purpose, after cutting the film carrier, the surface of the semiconductor element to which the inner lead is bonded is facing down, so it is necessary to turn the surface facing up to avoid dust and the semiconductor element. You need to turn it over. At this time, the semiconductor elements are turned over one by one using tweezers or the like. Alternatively, if a case with a lid is available, this can be used to turn the whole semiconductor element over. However, this method takes too much time and requires
)" Since the width is extremely thin, 30 to 40 microns, there is a risk of damage such as bending the lead when pinching it with tweezers.

又、この方法では樹脂被覆工程時において、前記半導体
素子が、不均等に並べられることがあるので樹脂被覆に
ディスペンサー等を使用して自動化を計ることが難しく
なる。
Further, in this method, the semiconductor elements may be arranged unevenly during the resin coating process, making it difficult to automate the resin coating by using a dispenser or the like.

本発明は、かかる従来の欠点を除去し、半導体素子の収
納及び取扱いを簡単に行うことができるばかりでなく樹
脂被覆を自動化することを可能にする半導体素子の収納
容器を提供するものである。
The present invention eliminates such conventional drawbacks and provides a storage container for semiconductor devices that not only allows semiconductor devices to be easily stored and handled, but also allows automation of resin coating.

以下本発明の実施例について図面を参照しながら詳細に
説明する。第4図は本発明の一実施例における半導体素
子の収納容器を示したものであり、詳しくは、第1図(
c)に示した、インナーリードボンディング後、切断分
離された半導体素子を収納する容器の一例を示すもので
ある。第4図において、本実施例の収納容器は少なくと
も収納される前記半導体素子の厚さ以上の厚みを有する
基台部6を有し、この基台部6は一定の間隔をもって配
置され、かつ前記第1図<c)!!たけ第2図に示す半
導体素子が収納される形状の貫通穴7を有している。さ
らに同収納容器は、前記基台部6の表側あるいは裏側の
全面又は、少なくとも前記貫通穴7を塞ぐ大きさで、か
つ前記基台部6に対して着脱又は、開閉する構成よりな
る表蓋8、及び裏蓋9を有している。本実施例の収納容
器の素材は金属。
Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 4 shows a storage container for semiconductor devices in one embodiment of the present invention.
This figure shows an example of a container that stores the semiconductor elements that have been cut and separated after inner lead bonding, as shown in c). In FIG. 4, the storage container of this embodiment has a base portion 6 having a thickness at least greater than the thickness of the semiconductor element to be stored, and the base portions 6 are arranged at regular intervals, and the base portions 6 are arranged at regular intervals. Figure 1<c)! ! It has a through hole 7 having a shape in which a semiconductor element shown in FIG. 2 is accommodated. Furthermore, the storage container has a front cover 8 which is large enough to cover the entire front side or back side of the base part 6 or at least the through hole 7, and which is configured to be attached to and detached from the base part 6, or to be opened and closed. , and a back cover 9. The material of the storage container in this example is metal.

非金属、樹脂材料等よりなるものである。又、前記蓋8
.9は透明又は半透明の材料を使用した方が、内部に収
納した半導体素子を確認できるので望ましい。
It is made of nonmetal, resin material, etc. Moreover, the lid 8
.. It is preferable to use a transparent or semi-transparent material for 9 because the semiconductor elements housed inside can be confirmed.

本実施例の収納容器の使用法の一実施例を説明すると、
まず予め基台部6に裏蓋9を装着しておき、インナーリ
ードボンディング後、フィルムキャリアより分離された
半導体素子を真空ピンセット等で前記貫通穴部7に収納
する。こくで前記半導体素子は、基台部eの貫通孔7と
予め装着していた裏蓋9とによりできた凹部に収納され
る。次に樹脂被覆を施す場合、半導体素子の被覆すべき
面が裏側にあれば表蓋8を閉め収納容器全体を逆さにし
前記裏蓋9を開ければ、収納容器に収納された前記半導
体素子全数が裏返り、樹脂被覆が可能となる。
An example of how to use the storage container of this example is as follows.
First, the back cover 9 is attached to the base portion 6 in advance, and after inner lead bonding, the semiconductor element separated from the film carrier is housed in the through hole portion 7 using vacuum tweezers or the like. The semiconductor element is housed in a recess formed by the through hole 7 of the base part e and the back cover 9 that has been attached in advance. Next, when applying resin coating, if the surface of the semiconductor element to be coated is on the back side, close the front cover 8, turn the entire storage container upside down, and open the back cover 9. It can be turned over and coated with resin.

第S図は2本発明の他の実施例における半導体素子の収
納容器の斜視図を示している。同収納容器において、切
断分離された半導体素子が納まる形状2寸法の凹部が基
台部10に設けられており、さらに基台部1oの裏面か
ら見て前記凹部内に収納された半導体素子の全面が確認
できるような貫通孔11が同基台部10に穿設されてい
る。貫通孔11の両側に位置する支持部12は、基台部
1゜の凹部に収納された半導体素子に付着されたフィル
ムキャリアのリード部3と当接して半導体素子を支持す
る役目をする。
FIG. S shows a perspective view of a storage container for semiconductor devices in another embodiment of the present invention. In the storage container, a recess with a shape and two dimensions in which the cut and separated semiconductor element is housed is provided in the base part 10, and the semiconductor element housed in the recess is placed over the entire surface of the recess when viewed from the back surface of the base part 1o. A through hole 11 is drilled in the base portion 10 so that it can be confirmed. The support portions 12 located on both sides of the through hole 11 serve to support the semiconductor device by coming into contact with the lead portions 3 of the film carrier attached to the semiconductor device housed in the recessed portion of the base portion 1°.

蓋部13は基台部10を上面よシ覆い同基台部10の凹
部を上面側よジ閉塞するものである。
The lid part 13 covers the base part 10 from the top side and closes the recessed part of the base part 10 from the top side.

前記構成の収納容器の使用法の実施例を説明すると、ま
ずインナーリードボンディング後、フィルムキャリアよ
り分離された半導体素子を基台部1oの凹部に収納する
。その際、第6図(−)に示すように半導体素子1に固
着されたリード部3が、貫通穴11の両側にある支持部
12で支えられ、半導体素子1のみが貫通穴11を通し
て外部に面する状態になるように半導体素子1を配置す
る。
To explain an example of how to use the storage container having the above structure, first, after inner lead bonding, the semiconductor element separated from the film carrier is stored in the recess of the base portion 1o. At this time, as shown in FIG. 6(-), the lead part 3 fixed to the semiconductor element 1 is supported by the support parts 12 on both sides of the through hole 11, and only the semiconductor element 1 is exposed to the outside through the through hole 11. The semiconductor element 1 is arranged so as to face each other.

さらに、同じく第6図(a)に示すように前記基台部1
oの全面又は、少なくとも貫通穴11を含む四部を塞ぐ
ように蓋13により、前記半導体素子1が収納された前
記基台部1oを塞ぐ。次に第6図(b)に示すように同
収納容器全体を逆転せしめ、裏面にある貫通穴110部
分より、ディスペンサー又は注射器14により樹脂を滴
下せしめて、リード部3の一部を含む半導体素子1上に
被覆を施すものである。
Further, as shown in FIG. 6(a), the base portion 1
The base part 1o in which the semiconductor element 1 is housed is covered with a lid 13 so as to cover the entire surface of the base part 1o or at least the four parts including the through hole 11. Next, as shown in FIG. 6(b), the entire storage container is turned upside down, and resin is dripped from the through hole 110 part on the back side using a dispenser or syringe 14, and the semiconductor element including a part of the lead part 3 is dropped. A coating is applied on top of the 1.

本実施例の収納容器においては半導体素子1の面に貫通
穴11がおいているので裏蓋を必要とせず、又樹脂被覆
後、元の状態に返しても、半導体素子1の下面に貫通穴
11が開いているので樹脂が基台部に付着することがな
い。
In the storage container of this embodiment, the through hole 11 is provided on the surface of the semiconductor element 1, so there is no need for a back cover. Since 11 is open, resin will not adhere to the base.

以上のように本発明の半導体素子の収納容器を用いれば
、 (1)  収納容器に保管した半導体素子の取扱いが簡
単かつリード部を破損する危険が少ない。
As described above, by using the semiconductor device storage container of the present invention, (1) the semiconductor devices stored in the storage container can be easily handled and there is less risk of damaging the lead portions.

(2)半導体素子の樹脂被覆が簡単にできる。(2) Semiconductor elements can be easily coated with resin.

等の効果があるばかりでなく、収納容器は各収納部に半
導体素子を規則正しく配列できるので、カセットとして
使用することにより樹脂被覆を自動的に行うことも可能
である。
In addition to the above effects, the storage container allows semiconductor elements to be regularly arranged in each storage section, so that when used as a cassette, resin coating can be automatically performed.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)〜(C)は半導体素子を実装する工程の一
部分を示す図、第2図は半導体素子にリード部が付着さ
れた状態を示す図、第3図に従来における半導体素子の
収納容器の斜視図、第4図は本発明の一実施例における
半導体素子の収納容器の分解斜視図、第5図は本発明の
他の実施例における半導体素子の収納容器の分解斜視図
、第6図(=) 、 (b)岐同収納容器を用いて半導
体素子を樹脂封止する工程を示す図である。 1・・・・・・半導体素子、2.2′・・・・・・リー
ド保持フィルム、3,3′・・・・・・リード、4,4
′・・・・・・半導体素子打抜き装置、5・・・・・・
半導体素子保持台、6・・・・・・基台部、7・・・・
・・貫通孔、8・・・・・・表蓋、9・・・・・・裏蓋
、10・・・・・・基台部、11・・・・・・貫通孔、
12・・・・・・IJ−ド支え凹部、13・・・・・・
蓋部、14・・・・・・注射器又はディスペンサー、1
5・・・・・・樹脂被覆部。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図 ! 第3図 第4図 第5図 第6図
Figures 1 (a) to (C) are diagrams showing a part of the process of mounting a semiconductor element, Figure 2 is a diagram showing a state in which a lead part is attached to a semiconductor element, and Figure 3 is a diagram showing a state in which a lead part is attached to a semiconductor element. FIG. 4 is an exploded perspective view of a semiconductor device storage container in one embodiment of the present invention; FIG. 5 is an exploded perspective view of a semiconductor device storage container in another embodiment of the present invention; FIG. FIG. 6 (=), (b) is a diagram showing a process of resin-sealing a semiconductor element using the same storage container. 1...Semiconductor element, 2.2'...Lead holding film, 3,3'...Lead, 4,4
'... Semiconductor element punching device, 5...
Semiconductor element holding stand, 6...Base part, 7...
...Through hole, 8...Front cover, 9...Back cover, 10...Base part, 11...Through hole,
12...IJ-de support recess, 13...
Lid part, 14...Syringe or dispenser, 1
5...Resin coating part. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
figure! Figure 3 Figure 4 Figure 5 Figure 6

Claims (2)

【特許請求の範囲】[Claims] (1)リード部が取り付けられた半導体素子を収納する
複数個の貫通孔を有する基台と、前記基台の少なくとも
一主面を覆う蓋とを有することを特徴とする半導体素子
の収納容器、
(1) A storage container for a semiconductor device, comprising a base having a plurality of through holes for storing a semiconductor device to which a lead portion is attached, and a lid that covers at least one main surface of the base;
(2)基台が、貫通孔の側部において半導体素子のリー
ド部を支持する支持部を有することを特徴とする特許請
求の範囲第1、項記載の半導体素子の収納容器。
(2) A storage container for a semiconductor device according to claim 1, wherein the base has a support portion that supports a lead portion of the semiconductor device at a side portion of the through hole.
JP18630981A 1981-11-19 1981-11-19 Containing vessel for semiconductor element Pending JPS5886749A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18630981A JPS5886749A (en) 1981-11-19 1981-11-19 Containing vessel for semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18630981A JPS5886749A (en) 1981-11-19 1981-11-19 Containing vessel for semiconductor element

Publications (1)

Publication Number Publication Date
JPS5886749A true JPS5886749A (en) 1983-05-24

Family

ID=16186067

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18630981A Pending JPS5886749A (en) 1981-11-19 1981-11-19 Containing vessel for semiconductor element

Country Status (1)

Country Link
JP (1) JPS5886749A (en)

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