JPS5884437A - Tray for semiconductor wafer - Google Patents

Abstract

PURPOSE:To offer the tray for a semiconductor wafer whereby a solder layer can be securely formed on an ohmic electrode. CONSTITUTION:The tray for a semiconductor wafer 1 has a good thermal conductivity and formed of stainless metal or a crude material similar thereto, and the surface 1a and the inside of gas release groove 2 are coated with heat resistant resin such as polyimide resin. The semiconductor wafer 3 wherein solder paste 5 is applied on both surfaces is heated in a state of being supported on the tray 1. When heating, the gas generated from the solder paste 5 on the lower surface of the semiconductor wafer 3 passes through the gas release groove 2 of the tray 1 and escapes out of the tray, accordingly the possibility of the bumpings of fused solder and solder paste is eliminated resulting in the formation of a solder layer 5a on the ohmic electrode 4.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a tray for a semiconductor wafer for supporting a semiconductor wafer during the manufacturing process of the semiconductor wafer, and more specifically, to a tray for supporting a semiconductor wafer in the manufacturing process of the semiconductor wafer. The present invention relates to a semiconductor wafer tray for use in the process of forming a solder layer on a semiconductor wafer.

In the manufacturing process of semiconductor devices such as transistors and diodes, usually after forming a required diffusion layer on a semiconductor wafer, ohmic electrodes are formed in the form of islands by metal vapor deposition or plating and etching, and finally The semiconductor wafer is then cut and divided to obtain semiconductor elements. In such a manufacturing process, in order to solder the obtained semiconductor element to a copper stud or stem, etc., in the currently implemented manufacturing method, a solder layer is placed on the ohmic electrode. The semiconductor wafer is then divided into semiconductor devices.

A conventional method for forming a solder layer on two Omit electrodes of a semiconductor wafer is a dipping method.

According to the immersion method, the semiconductor wafer is immersed in molten solder and the entire ohm is immersed.

However, since the heat medium in contact with the semiconductor wafer is molten solder with high thermal conductivity and high heat content per unit volume, the temperature gradient inside the semiconductor wafer is extremely large during dipping. As a result, a large thermal stress is generated in the semiconductor wafer, which causes the semiconductor wafer to be easily cracked. Especially recently, semiconductor wafers have become larger than before,
Additionally, there was a risk that the damage rate of semiconductor wafers would further increase accordingly.

In order to avoid such dangers in the immersion method, the applicant proposed a semiconductor device method in which a solder layer is formed on an ohmic electrode by a wet plating method. Although it is superior to the immersion method in that it does not cause electrical damage, it is useful for semiconductor wafers in which the ohmic electrodes are insulated from each other like an island structure. This method has the disadvantage that it cannot be applied to semiconductor wafers in which individual semiconductor elements are independent from each other. Therefore, in order to eliminate the drawbacks of the above-mentioned known methods, the inventors of the present invention applied a solder paste onto a semiconductor wafer after forming an ohmic electrode, and then exposed the solder paste to a temperature higher than the melting point of the solder in air or an inert gas atmosphere. We developed a new method to agglomerate solder onto an ohmic electrode by heating it to a temperature of However, it was found that there are still problems that need to be improved. One of the problems with this problem is, for example, the means for supporting the wafer during the solder paste application process and the heating process, but the present inventor has developed a semiconductor device manufacturing method including a practical support means and has already filed a patent application for this. There is. This method is characterized in that the wafer is supported by at least one plate-shaped tray during the process, and this method solves the above problem. During the research process, it was found that when implementing this method, there is a risk that part of the molten solder may sometimes cause bumping due to the gas generated from the solder paste during the heating process.

The object of the present invention is to provide an improved tray for semiconductor urchins, which solves the above-mentioned problems and allows a solder layer to be reliably formed on the ohmic electrode.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The tray of the present invention and a method of manufacturing a semiconductor device using the tray will be described below with reference to the drawings.

1 and 2 show an embodiment of a semiconductor wafer tray 1 according to the present invention, and the semiconductor wafer tray 1 shown in this embodiment is formed into a disk shape similar to a semiconductor wafer. has been done. Gas vent grooves 2 are cut in a grid pattern on the surface 1a of the tray 1 that contacts the semiconductor wafer, and the gas vent grooves 2 open laterally at the peripheral edge of the tray 1. The opening width W of the gas vent groove 2 on the surface 1a in contact with the semiconductor wafer is designed to be smaller than the diameter of a □ droplet of molten solder in the semiconductor element manufacturing process, which will be described later. The cross-sectional area of the gas vent groove 2 is also designed to a value that prevents the smallest droplet of molten solder from entering.

□ Fig. 6 shows the formation of a solder layer on the ohmic electrodes and 4 of the semiconductor wafers 3 using two trays 1 for semiconductor wafers according to the first embodiment of the present invention shown in Figs. 1 and 2. This diagram illustrates how to do this. That is, in the semiconductor device manufacturing method shown in FIG. 6, solder paste 5 is applied to each surface 1a of two semiconductor wafer trays 1 to a predetermined thickness, and the semiconductor wafer 3 after ohmic electrodes are formed. It is characterized in that the molten solder is aggregated on the ohmic electrode 4 by sandwiching it between trays 1 and heating it to a temperature equal to or higher than the melting point of the solder in the air or an inert gas atmosphere.

In this case, the gas generated from the solder paste 5 during the heating process flows into the gas vent groove 2 of the tray 1, and then diffuses through the groove 2 from the outer periphery of the tray 1 into the surrounding atmosphere. Therefore, the above-mentioned practical problems in the invented method of the applicant's prior patent application are solved by the present invention, and the present invention eliminates the fear of bumping the solder paste 5-melt solder in the method. It was done.

The solder melted in the above method behaves as a liquid, and due to its large surface tension, it aggregates and collects on the ohmic electrode 4, and after cooling, the half-image layer 5a forms on the ohmic electrode 4, as shown in FIG. Formed only on top.

The tray 1 for semiconductor wafers is preferably made of a metal or a similar material that has good thermal conductivity and is non-rusting, and in the illustrated embodiment, it is made of AI or stainless steel. Further, the surface 1a of the tray 1 and the inside of the gas vent groove 2 are coated with a heat-resistant resin such as polyimide resin.

Various solder pastes or solder inks are used depending on the type of semiconductor element, and for example, a mixture of Pb--Sn metal powder and flux in a volatile solvent is used.

The manufacturing method shown in FIG. 5 is a method in which only one semiconductor wafer tray 1 of the present invention is used. In this method, the solder paste 5 is applied directly to the semiconductor wafer 3 instead of the tray, and the tray 1 is It is mainly used as a support means for the semiconductor wafer 3.

That is, in this method, the solder paste 5 is applied to one side of the semiconductor wafer 3 (0), and the gas generated from the solder paste 5 on the lower surface of the other conductor wafer 6 is passed through the gas vent groove 2 of the tray 1. A solder layer 5a is formed on the ohmic electrode 4 through it.

As described above, the present invention solves the problems in the invention of the applicant's prior patent application, and provides a tray for semiconductor wafers that can reliably form a solder layer on the ohmic electrodes of semiconductor wafers. be done.

In the above embodiment, the planar distribution shape of the gas venting grooves provided in the tray was a lattice shape, but the planar distribution shape of the gas venting grooves is not limited to this, and any distribution shape may be used. It may be. Further, it is clear that the cross-sectional shape of the gas vent groove 2 is not limited to a rectangular shape, but may be any other shape.

The solder paste can be applied by brush painting, spraying, or printing, but the printing method is most suitable for reasons of coating thickness and accuracy of the application location.

Further, the shape of the tray is not limited to a disk shape, and a shape convenient for holding and handling wafers can be selected, such as a shallow pot shape.

[Brief explanation of drawings]

FIG. 1 is a plan view of an embodiment of the present invention, FIG. 2 is a cross-sectional view taken along arrows -■ in FIG. 1, and FIGS. 3 and 4 are semiconductor devices implemented using the tray of the present invention. Figures 5 and 4 are diagrams showing steps of an example of the manufacturing method, and are diagrams showing other examples of the semiconductor device manufacturing method carried out using the tray of the present invention. - Tray, 2... Gas vent groove, 3... Semiconductor wafer, 4... Ohmic electrode, 5... Solder paste, 5a... Solder layer. Figure 1 n

Claims (1)

[Claims] 1 A semiconductor urchin provided with an ohmic electrode and a solder paste coating film are heated in the air to form a solder layer on the ohmic electrode.
It is a plate-shaped tray used for supporting the semiconductor sea urchin, and has a gas venting groove carved in the surface that comes into contact with the semiconductor sea urchin, and the gas venting groove extends laterally at the peripheral edge of the surface. A tray for semiconductor utensils, which is characterized by being open.