JPS588233U - switch circuit - Google Patents
switch circuitInfo
- Publication number
- JPS588233U JPS588233U JP10016981U JP10016981U JPS588233U JP S588233 U JPS588233 U JP S588233U JP 10016981 U JP10016981 U JP 10016981U JP 10016981 U JP10016981 U JP 10016981U JP S588233 U JPS588233 U JP S588233U
- Authority
- JP
- Japan
- Prior art keywords
- switch circuit
- window comparator
- gate circuit
- circuit
- depending
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electronic Switches (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図及び第２図は本考案になるスイッチ回路′の一実
施例の図である。
図中、１． ２． ３はチャンネル切換器、４は信号出
力器、５はバイパノス回路、６． ７． ８は信号入力
端子、９．１０．１１は信号制御端子、１２は信号出力
端子、１３は切換スイッチ、１４゜１５．１６．１７は
トランジスタ、１８は入力回路、１９は第１のコンパレ
ータ、２ａは第２のコンパレータ、２１は基準電圧回路
、２２は切換スイッチ、２２ａは制御端子、２３は第１
のツアー、回路、２４は第２のツアー回路、２５は第３
のツアー回路、Ｇ１はウィンドコンパレータ、Ｇ２ハゲ
ート回路である。FIGS. 1 and 2 are diagrams of an embodiment of the switch circuit' according to the present invention. In the figure, 1. 2. 3 is a channel switcher, 4 is a signal output device, 5 is a bipanos circuit, 6. 7. 8 is a signal input terminal, 9.10.11 is a signal control terminal, 12 is a signal output terminal, 13 is a changeover switch, 14゜15.16.17 is a transistor, 18 is an input circuit, 19 is a first comparator, 2a is a second comparator, 21 is a reference voltage circuit, 22 is a changeover switch, 22a is a control terminal, and 23 is a first
tour, circuit, 24 is the second tour circuit, 25 is the third tour circuit.
, G1 is a window comparator, and G2 is a Hagate circuit.
Claims (1)
ウィンドコンパレータの出力電圧の組合共に応じて、複
数の制御線の１つを能動とするゲート回路と該ゲート回
路の動作に応じて、３つの入力信号からの１つ力信号を
選択する選択手段と゛ を備えたことを特徴とするス
イッチ回路。A window comparator that responds to a plurality of control signals, a gate circuit that activates one of the plurality of control lines depending on the combination of the output voltages of the window comparator, and three input signals depending on the operation of the gate circuit. 1. A switch circuit characterized by comprising: selection means for selecting one force signal from the input signal; and ゛.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10016981U JPS588233U (en) | 1981-07-07 | 1981-07-07 | switch circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10016981U JPS588233U (en) | 1981-07-07 | 1981-07-07 | switch circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS588233U true JPS588233U (en) | 1983-01-19 |
Family
ID=29894874
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10016981U Pending JPS588233U (en) | 1981-07-07 | 1981-07-07 | switch circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS588233U (en) |
-
1981
- 1981-07-07 JP JP10016981U patent/JPS588233U/en active Pending
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