JPS5991051U - Noise blanker circuit display device - Google Patents

Noise blanker circuit display device

Info

Publication number
JPS5991051U
JPS5991051U JP18704082U JP18704082U JPS5991051U JP S5991051 U JPS5991051 U JP S5991051U JP 18704082 U JP18704082 U JP 18704082U JP 18704082 U JP18704082 U JP 18704082U JP S5991051 U JPS5991051 U JP S5991051U
Authority
JP
Japan
Prior art keywords
circuit
noise blanker
display device
display
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18704082U
Other languages
Japanese (ja)
Other versions
JPS6336755Y2 (en
Inventor
憲一 小路山
Original Assignee
アイコム株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by アイコム株式会社 filed Critical アイコム株式会社
Priority to JP18704082U priority Critical patent/JPS5991051U/en
Publication of JPS5991051U publication Critical patent/JPS5991051U/en
Application granted granted Critical
Publication of JPS6336755Y2 publication Critical patent/JPS6336755Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Circuits Of Receivers In General (AREA)
  • Noise Elimination (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図はこの考案のノイズブランカ回路の表示装置の１
実施例のブロック線図である。 １・・・・・・検出回路、２・・・・・・信号変換回路
、３・・・・・・表示回路、ＮＢ・・・・・・ノイズブ
ランカ回路、Ｇｌ。 ・　Ｇ２・・・・・・ノイズブランカゲート。Figure 1 shows one of the display devices of the noise blanker circuit of this invention.
FIG. 2 is a block diagram of an embodiment. 1...Detection circuit, 2...Signal conversion circuit, 3...Display circuit, NB...Noise blanker circuit, Gl.・G2...Noise blanker gate.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ノイズブランカ回路のノイズブランカゲートに接続され
該ゲートの閉状態を検出して出力する検出回路と、この
検出回路の出力信号により所定時間長さの表示用信号を
出力する信号変換回路と、この信号変換回路の出力によ
り駆動して上記ノイズブランカ回路の動作状態を表示す
る表示回路とを具備して成るノイズブランカ回路の表示
装置。a detection circuit that is connected to the noise blanker gate of the noise blanker circuit and detects and outputs the closed state of the gate; a signal conversion circuit that outputs a display signal of a predetermined length based on the output signal of this detection circuit; and this signal. A display device for a noise blanker circuit, comprising a display circuit driven by an output of a conversion circuit to display an operating state of the noise blanker circuit.
JP18704082U 1982-12-09 1982-12-09 Noise blanker circuit display device Granted JPS5991051U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18704082U JPS5991051U (en) 1982-12-09 1982-12-09 Noise blanker circuit display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18704082U JPS5991051U (en) 1982-12-09 1982-12-09 Noise blanker circuit display device

Publications (2)

Publication Number Publication Date
JPS5991051U true JPS5991051U (en) 1984-06-20
JPS6336755Y2 JPS6336755Y2 (en) 1988-09-29

Family

ID=30403840

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18704082U Granted JPS5991051U (en) 1982-12-09 1982-12-09 Noise blanker circuit display device

Country Status (1)

Country Link
JP (1) JPS5991051U (en)

Also Published As

Publication number Publication date
JPS6336755Y2 (en) 1988-09-29

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