JPS5882331A - Terminal control system - Google Patents

Abstract

PURPOSE:To shorten the data editing processing time of a terminal controller, and to improve the use efficiency of a data processor, by switching buffer memories through the terminal controller so that one terminal device is usable as plural terminal devices. CONSTITUTION:A data processor 15 writes output data in a terminal device 17 having some terminal device address and then writes the output data to a virtual terminal device 18 having the next terminal device address successively. Once receiving a write instruction and the next terminal device address from the processor 15, a terminal controller 16 allows a buffer memory switching circuit 25 to change changeover switches 30 and 31 to buffer memory sides 24, thereby storing the output data in the memory 24. The output data is edited through a data editing circuit 26 and then held in readiness for outputting in the memory 24. This state is regarded as the wiring completion of the output data to the device 18 when viewed from the device side 15.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a terminal control method, and more particularly to a terminal control method in which a plurality of buffer memories are provided in each terminal device to completely improve the utilization rate of a data processing device. It is.

Conventionally, when writing and reading required data from a data processing device to a terminal device such as a display device or a printing device via a terminal control device, each terminal device and I
/imAllocates one terminal device address, and writes and reads information by issuing a write command or a read command to this terminal device address from the -E data processing device. In addition, the terminal control device that controls all of these terminal devices has one buffer memory each internally corresponding to the buffer memory in the terminal device, and output data accompanying a write command or in response to a read command. Input data is edited on the buffer memory in all terminal control devices and sent to the terminal device or data processing device.

FIG. 1 is a diagram showing an example of a circuit configuration of a conventional terminal control method.

When all input/output data is exchanged between the data processing device 1 and the terminal device 3 having the terminal device address m, all human output data is transmitted through the terminal control device 2. The terminal control device 2 includes a transmitting/receiving circuit on the data processing device l side that transmits and receives information or commands to and from the data processing bag W1, and a transmitting and receiving circuit that transmits and receives information or commands to and from the terminal device 3 on the terminal bag w3 side. All transmitting and receiving circuits 5 are provided respectively.

In controlling the writing of output data from the data processing device 1 to the terminal device 3, the output data is first read into the buffer memory 6 via the transmitter/receiver circuit generator, the data editing circuit 8 performs all editing of the output data on the buffer memory 6, and then transmits/receives the data. It is sent to the terminal device 3 via the circuit 5, and the edited output data is set in the buffer memory 7 of the terminal device 3. On the other hand, in the input data reading 11 control, when a service request occurs in the terminal device 3 (for example, when the key input is completed), a read command is issued to the data processing device and the terminal control device @2, and the terminal In response to this command, the control device 2 imports all the contents of the buffer memory 7 of the terminal device 3 into the buffer memory 6 via the transmitting/receiving circuit δ, and in this buffer memory 6F, the data editing circuit 8 edits all input data. The input data is transmitted to the data storage device 1 via the transmitter/receiver circuit 4'.

FIG. 2 is an operation time chart according to the conventional terminal control method shown in FIG.

For example, in a display device with a keyboard, when performing simple border-reversing processing such as screen output, key input, input data processing, and output on two screens, the data exchange shown in Figure 2 is performed between the terminal device and the data processing device. .

In FIG. 2, 9 digits initial screen creation processing, 10 writing output data to the terminal device, 11 key manual input by the operator, 12 reading input data from the terminal device, 13 data processing and initial screen ( (including response) creation process.

As shown in Figure 2, in the conventional terminal control method,
The processing time of the secondary processing device is sufficiently short compared to the key human labor time of the operator, but if the input/output data is complex,
Editing the screen data of the terminal controller takes time, so
An operator waiting time 14 occurs. That is, after completing the input on the initial screen (12), the operator is unable to use the keys for a certain period of time 14 until the next screen (response or initial screen) is displayed (11). This is because the waiting time is noticeable in operations that involve simple, repetitive input processing such as manually inputting forms, and especially when using a simple input format input device, the operator's time due to the data editing processing time of the terminal control device increases. The problem is the waiting time. on the other hand,
On the data processing device side, there is also a reduction in usage efficiency due to operator waiting time, resulting in an economic disadvantage.

In order to improve the usage efficiency of such a data processing device, the applicant has previously provided two screen buffer memories in the display control section, and when the contents of the address counter are an odd number and an even number, A display device that reads all display data for screen refresh from a separate screen buffer memory (see Japanese Patent Application No. 52-136666), and a terminal that has multiple logical addresses in all stages corresponding to one terminal. The control device stores all correspondence between terminals and logical addresses, and when the correspondence matches, a terminal control method (see specification of Japanese Patent Application No. 56-271) is used to transfer data between the data processing device and the terminal. However, in the latter case, the terminal control device requires extra VC to check whether the logical address sent from the data processing device corresponds to the terminal. There is.

The purpose of the present invention is to reduce the data processing time of the terminal control device and eliminate the sound of waiting time on the terminal device side due to the operator's key input. It is an object of the present invention to provide a terminal control method that can completely improve the usage efficiency of a lower-level data processing device.

In order to achieve the above object, the terminal control method of the present invention includes all the buffer memories in the terminal control device corresponding to the buffer memory of the terminal device, a plurality of existing terminal devices - All features include assigning a terminal device address to the memory and switching the buffer memory by the terminal control device so that the data processing device uses one terminal device as multiple terminal devices.

EMBODIMENT OF THE INVENTION Hereinafter, implementation side sounds of the present invention will be explained with reference to the drawings.

FIG. 3 is a circuit configuration diagram of a terminal control system showing an embodiment of the present invention.

In FIG. 3, eleven display devices 17 are connected as terminal devices, and two buffer memories 22 and 24 are used within the terminal control device 16.

The display device 18 indicated by a dotted line is one virtual terminal device. That is, when viewed from the data processing device 15 side, the terminal device address m is below the terminal control device 16.
A terminal device 17 is connected, and this internal 11 has a buffer
A memory 21 is provided, and a virtual terminal device M18 with a terminal device address n is connected, so that it appears that a buffer memory 23 is provided inside the child.

The terminal control device 16 includes a transmitting/receiving circuit 19 on the data processing device 15 side, a transmitting/receiving circuit 20 on the terminal device 17 side, and a buffer corresponding to the buffer memory 21 of the terminal device 17.
Memory 22, and virtual terminal 1Hf1'8 7
A buffer memory 24 corresponding to the buffer memory 23 is not provided.

Buffer memories 22 and 24 Ll, +51 are connected to the transmitting/receiving circuit 20 via a switching switch 29,
It is connected to the transmitting/receiving circuit 19 via the changeover switch 30. In addition, the data editing circuit 26 has a changeover switch 31!
: Via buffer memory 22 and buffer memory 24
The connection is switched to . Further, a buffer/memory switching circuit 25 is provided, and when the command signal 27 and the terminal device address signal 28 are supplied from the transmitting/receiving circuit 19, the buffer/memory switching circuit 25 sends the upper switching signal 32 to the changeover switch 30. The lower switching signal 33 is supplied to the switch 29, and the data editing circuit switching signal 3+all is supplied to the changeover switch 31, respectively. Further, the buffer/memory switching circuit 25 supplies a data editing start signal 35 to the all data editing circuit 26 .

It is assumed that the terminal device address n of the virtual terminal device fii 18 for the terminal device 17 with the terminal device address m has been determined in advance between the data processing device] 5 and the terminal control device 16.

The data processing bag @15 first issues a write command, a terminal device address, and output data such as an initial screen to the terminal device 17 having the terminal device address m.

When the transmitting/receiving circuit 19 in the terminal control device 16 receives the command and the terminal device address, it activates the buffer memory switching circuit 25\i: from the command signal 27 and the terminal device addressing @28vc. When the buffer memory switching circuit 25 detects the device address m, it selects the buffer memory 22 in the terminal control device 16 corresponding to the buffer memory 21 in the terminal device 17 with the terminal device address m. The switching signal 32, the lower switching signal 33 and the data editing circuit switching signal 34 switch the 9J switching switch 130°29.31Th to the buffer memory 22 side.

Next, the output data received by the transmitter/receiver circuit 19 is taken into the buffer memory 22 and stored in the buffer. The data editing circuit 26 activated by the memory switching circuit 25 edits the output data of the buffer memory 22-L. The edited output data is sent to the terminal device 17 via the transmitting/receiving circuit 20.
After being set in the buffer memory 21 in the terminal device 17 and displayed on both sides, operator r (manual power, etc.) is started.

On the other hand, after writing the output data to the terminal device 17 having the terminal device address m, the data processing device 15 subsequently writes the output data to the virtual terminal device 18 having the terminal device address n. When the terminal control device 16 receives the write command and the terminal device address n from the data processing bag @15, the buffer memory switching circuit 25 switches the changeover switch 30.31 to the buffer memory 24- side, and the buffer memory 2
4Fc output data is taken in. The output data is edited by the data editing circuit 26 and then stored in the buffer memory 24.
Waiting for output. In this state, when viewed from the data processing device 15 side, writing of output data to the virtual terminal device 18 is completed.

Here, when a -11-bis request (end of input, etc.) occurs on the terminal device 117 side, the terminal control device 16 transfers the contents of the buffer memory 21 in the terminal device 17 to the buffer memory 22 via the transmitting/receiving circuit 20. Incorporate into. The buffer/memory switching circuit 25 includes a changeover switch 29
Switching to the entire buffer memory 2 side, the contents of the buffer memory 24 and the output data edited by the buffer memory 24 are transmitted via the transmitting/receiving circuit 20 to the terminal device]-7).
put out The input data taken into the buffer memory 22 is a read command from the data processing device v15 IR. It will be in a state of 5.

From the point of view of the operator 1., who is working on the above process, the wait time for the screen to be displayed at the time when a request for service is generated: 1/- evening. Figure 1 of 112
4) There is 't, 1''.

FIG. 4 is an operation time chart of a terminal control method showing an embodiment of the present invention.

In Figure 4, 40+ 4”1 + 42.43+
4-4 kl, respectively screen AI BI CI DI
4..5
．． 61.62.631 f4- indicates the occurrence of a service request (end of operator input).

Reference numeral 46 shows the creation of screens A and B by the data processing device 15, and numeral 52 indicates the writing of output data to the terminal device 17 of digits 1,51 and 52 indicates the creation of screens A and B by the data processing device 15.
This is writing of 4-toka data. The latter is (l],) edited on the buffer memory 24- in the terminal control device 16, and the service request of the terminal device w17 (end of operator's input on screen A) occurs 4-5 e? It becomes Awaze. Here, when the -1+-1-page request 7+-5 occurs, the terminal control device 16G:i takes in the contents of the buffer memory 21 in the terminal device 17 with the buffer memory 22&, and transfers the contents to the buffer memory 22&. The 111 data of 24 is sent to the terminal device]-'7. The information in the buffer memory 22F is read by the data processing device 151tcK by a read command.
N is taken (53) and processed (47).

In process 47, the following screen C is created, and the terminal control unit writes to @l'71tt: (54)
.

This output data is stored on the buffer memory 22 as "wait-1" for the occurrence 61 of a service request (end of operator's input on screen B) of the terminal device 17.

When the service request 61 occurs, the terminal control device 16
The entire contents of the buffer memory 21 in the terminal device 17 are loaded into the buffer memory 24, and the output data of the buffer memory 22 is sent to the terminal device t17.

(12) Thereafter, the data processing device 15 alternately issues the terminal loading addresses In and η to the terminal control device 16, so that the operator of the existing terminal device 17 can operate without waiting time. Continuously key human power can be done all the way.

4th. 51, 54 in the figure. ．． 58 is writing of output data to the terminal device w17, and 15
2 r 56 + 60 are the 8 inputs of the output rata for the temporary terminal equipment!?t l 8, respectively.

Further, 53.57 is the reading of input data from the terminal device 17, and 1.55.59 is the provisional -1 respectively.
This is the manual reading of data from the terminal device 18 (I).

In the actual ffff example, a total of two buffer memories for one terminal device r\V (corresponding terminal control device fl?) are provided, but five or more buffer memories can be provided. Since the head of the data processing device is a buffer memory corresponding to the terminal device address in the terminal control device, the number of devices can be set to any number of devices. It is not necessary to start up the terminal device and the virtual terminal device all alternately, and only one can start up continuously.Furthermore, in the terminal system<lta device 16, the changeover switch 29; You can also start data editing by pressing the changeover switch 31 to Shinso 5.5.
υ (interlocking Z1.!) Also, the data year generation circuit 26 may be provided with one buffer memory and one 0 in the terminal control device 16.

As explained above, according to the present invention, one terminal device is used as several terminal devices, so that the data processing device vr (vr) is used as several terminal devices. Response speed can be increased, and especially in the case of repeating simple input processing, operator waiting time is eliminated, human labor work can be shortened, and the utilization rate of data processing equipment can be completely improved.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an example of a conventional terminal control device type circuit configuration.
(Negative) 2 Figure No. J Operation time chart of the terminal control system shown in Figure 1, Figure 3 is a circuit diagram of the terminal control system without all embodiments of the present invention shown, and Figure 4 is the terminal control system shown in Figure 5. This is an operation time chart. 1.15: Data processing device, 2. ]-68 terminal control device, 3.17: terminal device, 4-, +5.1.9.20
: Transmission/reception circuit, 6.7g 21-2: Buffer memory, 8.26: Data editing circuit, 9: Initial screen creation process, 10°51.54, 58: Writing output data to terminal device, 11.40 -44-: Key human power,
12.5. 'S, , 5'i': Reading input data from the terminal device, 13: Data processing and initial side 11j creation process, 14: Operator waiting time, 18: Temporary initial terminal device, 2.5 = Banhua Memo] l switching circuit, 27: Command signal, 28: Terminal device address signal, 29-31: Changeover switch, 32 Upper switching signal, 33: Lower switching signal, 34-: Data editing circuit switching (Gi number, 35 Two-note editing start signal, 45.61-64; Service request issued,
4.6-50; data processing, h 2 , 50 r 60
: Writing output data that appears on a virtual terminal device, 5
5, 59: Accent of human data from virtual terminal device I (
ysu. α5)!

Claims (1)

[Claims] In a terminal control device that controls input/output data exchange between a data processing device and a terminal device, if multiple buffer memories are allowed for each terminal device in the terminal control device, each buffer memory is A terminal control method characterized in that a terminal device address is assigned and, using the terminal device address, a data processing device writes and outputs input/output data using one terminal device as a plurality of terminal devices.