JPS5880870A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve the reliability of memory holding characteristics by forming an oxidized film for improving the pattern shape of a double gate made of the first and second polysilicon film and interlayer oxidized film after patterning of the double gate structure and before forming source and drain. CONSTITUTION:A sequential patterning is performed in the prescribed pattern shape, and a resist mask 6 is removed by an oxygen plasma. An oxidation is performed, thereby forming an oxidized film 11 on the second polysilicon film 5 and the end of the exposed first polysilicon film 3, and a recess 12 between the first and second films 3 and 5 is filled substantially with the film 11, thereby improving the pattern shape of the gate 13. A phosphorus film does not almost enter between the first and second films 3 and 5, and the withstand voltage of an interlayer insulating film 4 is raised from 65V of the conventional one to 85V, with the result that the reliability of charge holding characteristic can be largely improved.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and in particular, to improve reliability such as memory retention characteristics in a double silicon gate field-effect nonvolatile semiconductor device. The present invention relates to a method for manufacturing a semiconductor device in which a self-alignment process with a drain is improved.

Conventionally, in the manufacture of nonvolatile semiconductor devices, a self-alignment process between a two-layer polysilicon gate, a source, and a drain is generally used. That is, FIG. 1 shows the state at each step of manufacturing a double silicon gate field effect type nonvolatile semiconductor device by the conventional method. In the conventional method, a gate oxide film (2) is first formed on a silicon substrate (1), and a polysilicon film (
3) After sequentially forming an interlayer oxide film (4) and a polysilicon film (5) as a second gate, a resist mask (61) is formed on the $2 polysilicon film (2) and the device is Create a structure as shown in Figure 1+111.Next, the second polysilicon film (5) is normally dry etched using CF4 gas, and the interlayer oxide film (4) below it is etched using hydrofluoric acid-based etching Di. The first polysilicon film (3) below is patterned sequentially by wet etching.
is dry etched using CF4 gas, and the gate oxide film (2) below it is sequentially patterned again by wet etching using a hydrofluoric acid etching solution to form the double gate portion U3 as shown in FIG. 1(b). Form it into the structure shown in . Then, the resist mask (6) is removed, and a source m (71) and a drain part (8) are formed on the substrate (1) by an ion implantation method or a phosphorus diffusion method. oxide film (9)
This element is further coated with a phosphor glass film (1ω
cover with In this way, a semiconductor device having the structure shown in FIG. 1(C) is formed.

However, such a conventional method has reliability problems that are different from the usual self-alignment method of a single-layer polysilicon film gate, source, and drain used for manufacturing dynamic RAM, static RAM, etc., for example. That is, in a nonvolatile semiconductor device, two layers of polysilicon films (3) and (5) are required as gates, and the first
Since the eyelet polysilicon film (3) is characterized by storing and retaining charges, the j-1 insulating film (4) between the first and second polysilicon films (3) and (5) is It is qualitatively extremely important, or in the conventional method, each layer +21 +31
Since +41 and +51 are sequentially patterned using different etching methods, the resulting structure of the double gate part α3 is as shown in FIG. 3) It is retreating inward from the pattern end in (5). As a result, both polysilicon films +3
1 +51 is slightly covered with the oxide film (9) in the subsequent process, but the phosphor glass film f11 invades between both films f31 and +51, which deteriorates the insulation properties between the double gate +31 and +51. - This also impairs the charge retention characteristics of the first polysilicon film (3) and degrades the quality of the device.

The present invention has been made in view of the above-mentioned drawbacks of the conventional art, and includes a method for manufacturing a field-effect nonvolatile semiconductor device with a double silicon gate structure.

Before the formation of lerain, the first step. Manufacture of a semiconductor device in which reliability such as memory retention characteristics can be improved by forming an oxide film to improve the pattern shape of the double gate portion consisting of a second polysilicon film and an interlayer oxide film. The purpose is to provide a method.

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 shows the state at each step of manufacturing a double silicon gate field effect type nonvolatile semiconductor device according to an embodiment of the present invention. In this manufacturing method, first the silicon substrate (
1) Form each layer +21 +31 +41 (51) on top.

That is, a film with a thickness of 600 mm was formed on a silicon substrate (1) by thermal oxidation.
Another gate oxide film (2) is formed, and this gate oxide film (
2) A first polysilicon film (3500x thick) was formed on top by a low pressure CVD method using thermal decomposition of silane (S i H4) and phosphin (PHs) at 630°C.
) to form. And this first polysilicon film (3)
An interlayer oxide film (4) with a thickness of 800 Å is formed thereon by thermal oxidation, and a second polysilicon film with a thickness of 4000 Å is formed on this interlayer oxide film (4) by the above-mentioned low pressure CVD method. (5
) to form.

Next, each layer (31+41151) formed in this way is sequentially patterned into a predetermined pattern shape as shown in FIG.
A resist mask (6) is formed on the second polysilicon film (5), and the second polysilicon film (5) is patterned by dry etching using CF and gas plasma. After patterning by wet etching using a 6:1 hydrofluoric acid aqueous solution and further patterning the first polysilicon film (3) under the interlayer oxide film (4) by the dry etching, the resist mask ( 6) is removed by oxygen plasma.

Then, the element with the resist mask (6) removed is 1100
Oxidation is carried out in a dry oxygen atmosphere of 2% HCl at 20°C for 20 minutes. This causes the second polysilicon film (
5) A first oxide film 011 with a thickness of 10001 is formed on the top and exposed end of the first polysilicon film (3), and the recess ( 1 is almost filled with this oxide film OB, and the pattern shape of the double gate part a is improved, but the substrate (1)
The upper gate oxide (3) only increases by about 700 steps.

Thereafter, arsenic ions were implanted with a substrate fit of 160 KeV and a number of negative ions of 4×1♂2 cm (see FIG. 2, 1dl).

It is placed in a nitrogen atmosphere at 1050° C. for 2 hours and treated in nitrogen to form a source portion (7) and a drain portion (8) on the substrate (1). Finally, by the same method as the conventional method, the source part (7), the drain part (8), and the lth oxide film (1υ) are coated on the substrate (1), and the second oxide film (9) and the phosphor layer are coated on the substrate (1). A glass film 11ω is formed.In this way, a semiconductor device having the structure shown in FIG. 2(C) can be manufactured.

In the manufacturing method of this embodiment as described above, after patterning the second polysilicon film (51, 1-interoxide oxide film (4) and first polysilicon film (3), oxide M (
11) Since the pattern shape of the double gate portion α3 was improved by forming +, the phosphor glass film i11 has the shape shown in FIG. Almost no penetration occurs between the second polysilicon films +31 and +51. This has been confirmed by observing the new curve shape using a scanning electron microscope (SEM). Therefore, the first. The withstand ratio of the interstory insulating film (4) between the second polysilicon film f3) 151 has increased from 65 V of the conventional product to 85 V, and as a result, reliability such as charge retention characteristics has been greatly improved, and the Good results were shown when applied to non-volatile memory.

The present invention is not limited to the above embodiment; for example, the gate oxide film (2) may be etched during patterning of two sets of gates, or may be etched after thermal oxidation to improve pattern shape. You may also do so.

As described above, according to the method for manufacturing a single conductor device according to the present invention, in the method for manufacturing a double silicon gate field effect type non-volatile semiconductor device, after patterning the two-wheel gate structure and before forming the source and drain. 1st. Since the oxide film for improving the pattern shape of the double gate portion is formed from the second polysilicon film and the inter-oxide film, reliability such as memory retention characteristics can be greatly improved.

[Brief explanation of the drawing]

FIG. 4 is a cross-sectional view of each step of manufacturing a semiconductor device according to an embodiment method. )...Silicon substrate, (2)...Gate oxide film,
(3)...first polysilicon film, (4)...interlayer oxide film, (5)...second polysilicon film, (7)...
...Source section, (8)...Drain section, (9)...
Second oxide film, II... phosphorus group, 0th... first
Oxide film, 0...double gate part. In the drawings, the same reference numerals indicate the same or equivalent parts. Agent Shin Tameno - Figure 1 Figure 1 Figure 2

Claims (1)

[Claims] (1) A method for manufacturing a field-effect nonvolatile semiconductor device with a double silicon gate structure, comprising: a gate oxide film, a first polysilicon film, an interlayer oxide film, and a first polysilicon film;
a step of forming the second polysilicon film 9 interlayer oxide film and the first polysilicon film in a predetermined pattern shape; ! +1
A step of forming an oxide film *i covering the side surface of the interlayer oxide film in order to improve the pattern shape of the double gate portion consisting of the polysilicon film and the interlayer oxide film (No. 2), and forming a source and drain layer on the silicon substrate. and a step of forming a second oxide film and a phosphor glass film on the silicon substrate to cover the double gate part, the source part, and the drain part. Method.