JPS5880756A - デ−タ処理装置 - Google Patents

デ−タ処理装置

Info

Publication number
JPS5880756A
JPS5880756A JP17717981A JP17717981A JPS5880756A JP S5880756 A JPS5880756 A JP S5880756A JP 17717981 A JP17717981 A JP 17717981A JP 17717981 A JP17717981 A JP 17717981A JP S5880756 A JPS5880756 A JP S5880756A
Authority
JP
Japan
Prior art keywords
signal
memory
service
cpu
service operation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17717981A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6150357B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Takashi Kumagai
熊谷　多加史
Mitsushi Okabayashi
光志 岡林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP17717981A priority Critical patent/JPS5880756A/ja
Publication of JPS5880756A publication Critical patent/JPS5880756A/ja
Publication of JPS6150357B2 publication Critical patent/JPS6150357B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
JP17717981A 1981-11-06 1981-11-06 デ−タ処理装置 Granted JPS5880756A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17717981A JPS5880756A (ja) 1981-11-06 1981-11-06 デ−タ処理装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17717981A JPS5880756A (ja) 1981-11-06 1981-11-06 デ−タ処理装置

Publications (2)

Publication Number Publication Date
JPS5880756A true JPS5880756A (ja) 1983-05-14
JPS6150357B2 JPS6150357B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1986-11-04

Family

ID=16026556

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17717981A Granted JPS5880756A (ja) 1981-11-06 1981-11-06 デ−タ処理装置

Country Status (1)

Country Link
JP (1) JPS5880756A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Also Published As

Publication number Publication date
JPS6150357B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1986-11-04

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