JPS587983A - Solid-stage image pickup element - Google Patents

Solid-stage image pickup element

Info

Publication number
JPS587983A
JPS587983A JP56105579A JP10557981A JPS587983A JP S587983 A JPS587983 A JP S587983A JP 56105579 A JP56105579 A JP 56105579A JP 10557981 A JP10557981 A JP 10557981A JP S587983 A JPS587983 A JP S587983A
Authority
JP
Japan
Prior art keywords
trs
turn
enhancement type
channel enhancement
state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56105579A
Other languages
Japanese (ja)
Inventor
Michio Yamamura
道男 山村
Koichi Mayama
真山 晃一
Toshiki Suzuki
鈴木 敏樹
Hideaki Nakanishi
秀明 中西
Shinichi Nagai
慎一 永井
Masayuki Hikiba
正行 引場
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56105579A priority Critical patent/JPS587983A/en
Publication of JPS587983A publication Critical patent/JPS587983A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/617Noise processing, e.g. detecting, correcting, reducing or removing noise for reducing electromagnetic interference, e.g. clocking noise

Landscapes

  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

PURPOSE:To obtain an image pickup signal having a high SN ratio, by constituting A MOS for horizontal switch with N channel enhancement type MOS transistors and P channel enhancement type MOs transistors. CONSTITUTION:A metal oxide semiconductor MOS transistor TR for horizontal switch which reads out the signal current of each of picture elements arranged in the row direction consists of N channel enhancement type MOS TRs 12 (12am 12b, and 12c) and P channel enhancement type MOS TRs 13 (13a, 13b, and 13c) connected in parallel to TRs 12. In this case, since NMOS TRs 12 and PMOS TRs 13 are changed from the turn-on state to the turn-off state simultaneously, electrons and positive holes are distributed simultaneously to drain and source electrodes from TRs 12 and TRs 13 respectively, and currents of spike noises are in directions opposite to each other hand and are cancelled. When TRs 12 and 13 are changed from the turn-off state to the turn-on state, the similar operation is performed. Thus, the absolute value and the variance of spike noise currents are reduced.

Description

【発明の詳細な説明】 本発明は固体撮像素子、特に信号読み出し時に発生する
スパイク雑音を低減させS/N比の高い撮像信号が得ら
れるMO8形固体撮像素子に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a solid-state image sensor, and particularly to an MO8 solid-state image sensor that can reduce spike noise generated during signal readout and obtain an image signal with a high S/N ratio.

一般に固体撮像素子には、CCD (ChargCou
pled  Devloe )による電荷を順次転送し
ていく方式と、走査回路の出力パルスによってMOS 
)ランジスタを開閉しいわばスイッチを順次切換えて信
号を読み出すMOS (Metal 0x−de  S
em1conductor )方式とがあり、本発明は
後者のMO8方式に閃するものである。
Generally, solid-state image sensors include CCD (ChargCouple).
The MOS
) MOS (Metal 0x-de S
em1conductor) system, and the present invention is inspired by the latter MO8 system.

第1図は従来のMO8形固体撮像素子の一例を示す要部
回路構成図である。同図において、ホトダイオード1と
垂直スイッチMosトランジスタ(以下VMO8と称す
る)2とで構成される画素3は行および列方向に配列さ
れており、これらの画素3は水平走査回路4および垂直
走査回路5によって選択された画素にビデオバイアス6
がら負荷抵抗γ、水平スイッチ用MO8)ランジスタ(
以下5MO8と称する)8およびVMO82を通して充
電電流が流れ、負荷抵抗γによる電圧降下分を光信号と
して検出し、コンデンサ9を介してビデオアンプ10で
増申副される。1 この場合、信号電荷を読み出す際には、垂直ゲー ト線
5a 、  sbに、第2図にパルスタイミング図で示
したパルス電圧SIt slが印加され、水平ゲート線
4a + 4 b 、4cにはパルスii圧s、lS4
.S、がそれぞれ順次印加される。そして、水平信号線
11には信号出力S6が出力される。
FIG. 1 is a circuit diagram showing an example of a conventional MO8 type solid-state image sensor. In the figure, pixels 3 composed of a photodiode 1 and a vertical switch Mos transistor (hereinafter referred to as VMO 8) 2 are arranged in row and column directions, and these pixels 3 are connected to a horizontal scanning circuit 4 and a vertical scanning circuit 5. Video bias 6 to the pixel selected by
load resistance γ, horizontal switch MO8) transistor (
A charging current flows through the VMO 8 (hereinafter referred to as 5MO8) and the VMO 82, and the voltage drop due to the load resistance γ is detected as an optical signal, which is amplified and subtracted by the video amplifier 10 via the capacitor 9. 1. In this case, when reading signal charges, the pulse voltage SIt sl shown in the pulse timing diagram in FIG. Pulse ii pressure s, lS4
.. S, are applied sequentially. Then, a signal output S6 is output to the horizontal signal line 11.

この場合、信号出力S6はホトダイオード1に蓄積され
た信号電荷と5MO88の開閉の際に発生するスパイク
雑音S7が合成された信号が得られる。
In this case, the signal output S6 is a signal obtained by combining the signal charge accumulated in the photodiode 1 and the spike noise S7 generated when the 5MO 88 is opened and closed.

しかしながら、上記構成によるMO8形固体撮像素子に
おいて、5MO88はそのゲート電極下に容量成分が大
きいことから5M088が開閉する際に発生するスパイ
ク雑音は、第2図S、で示すように信号電荷より大きい
ものとなる、また、5MO88のゲート電極下の容量成
分が半導体の微細加工に起因する微小な偏差(バラツキ
)によってパラライだ場合、スパイク雑音S7の大きさ
そのものが各5MO88a 、 ab 、 8 cによ
ってそれぞれ異なってくる。例えば、第2図で示したよ
うに5MO88cで発生ずるスパイク雑音S7が他の5
MO88a、abよりも大きいとすると、画素3c、3
c’、すなわち縦1列の光ダイオード1を読み出す際に
決って大きなバラツキが生じ、しかも加工に起因してラ
ンダムに発生するため、ローパスフィルタなどの雑音除
去回路を用いても除去することができなかった。このた
め、2次元の固体撮像素子の場合にはこのスパイク雑音
のバラツキに起因する固定パターン雑音と称する縦縞状
のノイズが発生し、撮像信号のS/N比を著しく低下さ
せる原因となっていた。
However, in the MO8 type solid-state image sensor with the above configuration, since 5MO88 has a large capacitance component under its gate electrode, the spike noise generated when 5M088 opens and closes is larger than the signal charge, as shown in Figure 2 S. In addition, if the capacitance component under the gate electrode of 5MO88 is parallel due to minute deviations (variations) caused by microfabrication of the semiconductor, the size of the spike noise S7 itself will be It will be different. For example, as shown in Fig. 2, the spike noise S7 generated in 5MO88c is
If it is larger than MO88a, ab, pixels 3c, 3
c', that is, large variations occur when reading out the photodiodes 1 in a single column, and since they occur randomly due to processing, they cannot be removed even by using a noise removal circuit such as a low-pass filter. There wasn't. For this reason, in the case of two-dimensional solid-state imaging devices, vertical striped noise called fixed pattern noise occurs due to variations in this spike noise, causing a significant decrease in the S/N ratio of the imaging signal. .

したがって本発明は、5MO8部をNチャネルエンハン
スメント形MO8)ランジスタ(以下NMO8と称スる
)とPチャンネルエンハンスメント形MO8)ランジス
タ(以下PMO8と称する)とで構成することによって
、上記容量成分の偏差(バラγキ)を低減させてスパイ
ク雑音の発生を抑制し、2次元素子ではこのスパイク雑
音のばらつきに起因して発生する固定パターン雑音を低
減させ、87N比の高い撮像信号が得られる固体撮像素
子を提供することを目的としている。
Therefore, in the present invention, by configuring the 5MO8 section with an N-channel enhancement type MO8) transistor (hereinafter referred to as NMO8) and a P-channel enhancement type MO8) transistor (hereinafter referred to as PMO8), the deviation of the capacitance component ( A solid-state imaging device that suppresses the occurrence of spike noise by reducing the variation (γ variation), and reduces the fixed pattern noise that occurs due to the variation of this spike noise in the secondary element, and obtains an imaging signal with a high 87N ratio. is intended to provide.

以下、図面を用いて本発明の実施例を詳細に説明する。Embodiments of the present invention will be described in detail below with reference to the drawings.

第3図は本発明による固体撮像素子の一例を示ず要部断
面溝成因であり、前述の図と同記号は同一要素となるの
でその説明は省略する。同図において、列方向に配列さ
れた各画素の信号電流を読み出す水平スイッチ用MO8
)7ンジスタ部を、従来の5MO88と同機能を有する
NMO812とこのNMO812に並列接続させたPM
O813とで構成したものである。そして、NMO81
2には水平走査回路4から従来と同等のe出力パルスが
印加され、一方PMO813には上記士龜出力パルスを
反転させたに一1&−出力パルスが印加される回路構成
を有して形成されている。1 このような構成において、水平走査回路4からNMO8
12およびPMO813に印加される出力パルスの高レ
ベルVHと低レベルVLとの中間レベルにビデオバイア
スVvが設定され、これらのNMO312およびPMO
813のしきい電圧vthが VH−vv>vth (NMO812)  9 Φ・ψ
(1)VV−VL> : vth  + (PMO81
3)・ ・ ・ φ(2) の条件を満した場合にNMO812とPMO813とが
同時にオン状態とカリ、信号が水平信号線11に読み出
される。この場合、NMO812がオンからオフとなる
時に発生するスパイク雑音の成分は、NMO812がオ
ン時にゲート下に誘起されていた電子がNMO812が
オフ時にドレインとソース電極に振り分けられることに
より発生する。
FIG. 3 does not show an example of the solid-state image sensing device according to the present invention, but shows the main part of the cross-sectional groove, and since the same symbols as in the previous drawings represent the same elements, the explanation thereof will be omitted. In the same figure, MO8 for the horizontal switch reads out the signal current of each pixel arranged in the column direction.
)7 transistor section is connected in parallel to NMO812, which has the same function as the conventional 5MO88.
It is composed of O813. And NMO81
2 is applied with the e output pulse equivalent to the conventional one from the horizontal scanning circuit 4, while the PMO 813 is formed with a circuit configuration in which an inverted output pulse of the above-mentioned output pulse is applied. ing. 1 In such a configuration, from the horizontal scanning circuit 4 to the NMO8
The video bias Vv is set to an intermediate level between the high level VH and the low level VL of the output pulses applied to the NMO 312 and PMO 813.
The threshold voltage vth of 813 is VH-vv>vth (NMO812) 9 Φ・ψ
(1) VV-VL> : vth + (PMO81
3) When the condition φ(2) is satisfied, the NMO 812 and the PMO 813 are turned on at the same time, and a signal is read out to the horizontal signal line 11. In this case, the spike noise component that occurs when the NMO 812 turns from on to off is generated because the electrons induced under the gate when the NMO 812 is on are distributed to the drain and source electrodes when the NMO 812 is off.

一方、PMO813がオンからオフとなるときに発生す
るスパイク雑音の成分は、PMO813がオン時にゲー
ト下に誘起されていた正孔が、PMO813がオフ時に
ドレインとソース電極に振り分けられることにより発生
する。したがって、上記構成では、NMO812とPM
O813とが同時にオンからオフとなるので、ドレイン
およびソース電極へはNMO812から電子が、PMO
813から正孔が同時に振り分けられることになる。す
なわちスパイク雑音の電流方向は互いに逆方向であり、
互いに打ち消し合うことになる。また、NMO812と
PMO813とがオフからオンになる時も同様に互いに
打ち消し合う方向にスパイク雑音電流が流れる。このよ
うにしてスパイク雑音電流そのものを確実に減少させる
ことができる。したがってスパイク雑音電流のバラツキ
によって発生する固定パターン雑音も減少させることが
できる。また、半導体加工プロセスに起因する加工偏差
(バラツキ)がNMO812およびPMO813に発生
しても、NMO812とPMO813とが並列接続され
ているので、NMO812およびPMO813もほぼ同
等の偏差(バラツキ)を有すると考えられ、PMO81
3によるスパイク雑音のキャンセルは偏差を減少させる
方向に作用する。すなわちスパイク雑音の絶対値のみな
らず、そのバラツギも減少させることができる。
On the other hand, the spike noise component that occurs when the PMO 813 turns from on to off is generated because holes that were induced under the gate when the PMO 813 is on are distributed to the drain and source electrodes when the PMO 813 is off. Therefore, in the above configuration, NMO812 and PM
Since O813 turns from on to off at the same time, electrons from NMO812 go to the drain and source electrodes, and electrons from PMO
Holes are distributed from 813 at the same time. In other words, the current directions of spike noise are opposite to each other,
They will cancel each other out. Further, when the NMO 812 and the PMO 813 are turned on from off, spike noise currents similarly flow in directions that cancel each other out. In this way, the spike noise current itself can be reliably reduced. Therefore, fixed pattern noise caused by variations in spike noise current can also be reduced. Furthermore, even if a processing deviation (variation) due to the semiconductor processing process occurs in NMO812 and PMO813, since NMO812 and PMO813 are connected in parallel, it is considered that NMO812 and PMO813 have almost the same deviation (variation). , PMO81
Cancellation of spike noise by No. 3 acts in the direction of reducing the deviation. That is, not only the absolute value of spike noise but also its variation can be reduced.

なお、上記5MO8部のNMO812は、水平走査回路
4.垂直走査回路5およびホトダイオード1と同様にN
基板上にイオン打ち込み等で形成されたP領域上に形成
し、PMO813はP領域のないN基板上に形成するな
どの通常のCMOSプロセスで容易に製作可能である。
Note that the NMO 812 of the 5MO8 section is the horizontal scanning circuit 4. Similarly to the vertical scanning circuit 5 and photodiode 1, N
The PMO 813 can be easily manufactured by a normal CMOS process, such as forming on a P region formed by ion implantation or the like on a substrate, and forming the PMO 813 on an N substrate without a P region.

また、上記実施例においては、画素をM列×N行の2次
元に配列したMO8形固体撮像素子について説明したが
、本発明はこれに限定されるものではなく、M列の1次
元に配列したMO8形固体撮像素子に適用しても前述と
同様の効果が得られることは勿論である。
Furthermore, in the above embodiment, an MO8 type solid-state image sensor in which pixels are arranged two-dimensionally in M columns and N rows is described, but the present invention is not limited to this, and pixels are arranged in one-dimensionally in M columns. Of course, the same effects as described above can be obtained even if the present invention is applied to an MO8 type solid-state image sensor.

以上説明したように本発明によれば、スパイク雑音を低
減できるとともに、このスパイク雑音のバラツキに起因
する固定パターン雑音を低減できるので、MO8形固体
撮像素子の品質、信頼性等を大幅に向上できまた、撮像
素子からの信号を増幅するプリアンプ回路はスパイク雑
音が小さいので、高い増幅率をもたせることができるな
ど周辺回路も高S/N化、簡略化が可能と々す、カメラ
自体の性能向上がはかれるなど極めて優れた効果が得ら
れる1、
As explained above, according to the present invention, it is possible to reduce spike noise and also to reduce fixed pattern noise caused by variations in this spike noise, thereby significantly improving the quality, reliability, etc. of the MO8 type solid-state image sensor. In addition, the preamplifier circuit that amplifies the signal from the image sensor has low spike noise, so it can have a high amplification factor, making it possible to increase the S/N and simplify the peripheral circuitry, improving the performance of the camera itself. 1. You can get extremely excellent effects such as being able to measure

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のMO8形固体撮像素子の一例を示す要部
回路構成図、第2図はそのパルスタイミング図、第3図
は本発明による固体撮像素子の一例を示す要部回路構成
図である。 12a、12b、12c11拳・・Nチャンネルエンハ
ンスメント形MOSトランジスタ(NMO8)、13a
I 13b、13c@−争・Pチャンネルエンハンスメ
ント形Mos+・ランジスタ、。
FIG. 1 is a circuit diagram showing an example of a conventional MO8 type solid-state image sensor, FIG. 2 is a pulse timing diagram thereof, and FIG. 3 is a circuit diagram showing an example of a solid-state image sensor according to the present invention. be. 12a, 12b, 12c11 fist...N-channel enhancement type MOS transistor (NMO8), 13a
I 13b, 13c@-P channel enhancement type Mos+ transistor.

Claims (1)

【特許請求の範囲】[Claims] 光信号を蓄積するホトダイオードと垂直スイッチMOS
トランジスタとにより形成された画素が少なくとも列方
向に配列され前記画素を水平走査回路および垂直走査回
路により選択させて水平スイッチMO8)ランジスタで
信号電流を外部に読み出すように構成された固体撮像素
子において、前記水平スイッチMO8)ランジスタに、
逆極性の電荷を可動電荷とするMO8+−ランジスタを
並列接続したことを特徴とする固体撮像素子。
Photodiode and vertical switch MOS that accumulate optical signals
A solid-state image sensor configured such that pixels formed by transistors are arranged at least in a column direction, the pixels are selected by a horizontal scanning circuit and a vertical scanning circuit, and a signal current is read out by a horizontal switch MO8) transistor, The horizontal switch MO8) transistor,
A solid-state image sensing device characterized in that MO8+- transistors whose movable charges are charges of opposite polarity are connected in parallel.
JP56105579A 1981-07-08 1981-07-08 Solid-stage image pickup element Pending JPS587983A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56105579A JPS587983A (en) 1981-07-08 1981-07-08 Solid-stage image pickup element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56105579A JPS587983A (en) 1981-07-08 1981-07-08 Solid-stage image pickup element

Publications (1)

Publication Number Publication Date
JPS587983A true JPS587983A (en) 1983-01-17

Family

ID=14411413

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56105579A Pending JPS587983A (en) 1981-07-08 1981-07-08 Solid-stage image pickup element

Country Status (1)

Country Link
JP (1) JPS587983A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0233489A2 (en) * 1986-01-21 1987-08-26 OIS Optical Imaging Systems, Inc. Method of addressing at least one photosensitive pixel or liquid crystal pixel in a matrix array

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0233489A2 (en) * 1986-01-21 1987-08-26 OIS Optical Imaging Systems, Inc. Method of addressing at least one photosensitive pixel or liquid crystal pixel in a matrix array

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