JPS5876727A - Combination measuring method - Google Patents

Abstract

PURPOSE:To improve measuring capability by discharging material to be measured corresponding to the optimum combination from measuring hoppers. CONSTITUTION:The optimum combination, which is equal to or closest to a preset value, is computed from measured signal a1-an set from measuring devices A1-An or individual number signal of the material to be measured which is converted from each measured signal ai. The material to be measured corresponding to the optimum combination is discharged from the measuring hopper B1. The new material to be measured is supplied to the vacant hopper Bi. Operations are performed by specified times in order to obtain the optimum combination, which is equal to or closest to the preset value from the value of the remaining material to be measured that is supplied to the measuring hopper now, until the supplied value becomes the state at which the combination computation can be performed. The material to be measured corresponding to the optimum combination obtained at each computation is sequentialy discharged from the measuring hopper Bi.

Description

[Detailed Description of the Invention] This invention is applicable to fruits and vegetables with large variations in unit weight, fresh foods,
The present invention relates to a combination weighing method for quantitatively weighing secondary processed products, confectionery, etc. with high precision and high capacity.

A weighing method in which the weight of the objects to be weighed supplied to each weighing hopper of a plurality of weighing machines is individually weighed, and each weighing value is added for each different combination to obtain a predetermined weight or a combination of weights N: closest to it. Method and each of the above-mentioned measured values is divided by the amount of single piece of vomit to convert it into a number of pieces, and each number of pieces is added for each different combination. The method of obtaining a predetermined amount of weight liter or number of objects by calculation is such that variations in the individual objects to be weighed do not affect the measurement accuracy, and it is possible to perform extremely high-precision weighing. If disturbances in supply or alignment are directly input into the measurement, they will not lead to errors, high accuracy can be maintained even if the set value becomes large, and errors due to the settings of each weighing machine will not affect the final error. There are advantages.

A major feature of combination weighing, such as Kitaki, is that it allows for highly accurate measurements, but recently, in addition to this 4 + ¥ - sign,
Furthermore, there is a growing demand for improved measurement capabilities.

Therefore, in Japanese Patent Application No. 55-157894, the applicant proposed that the objects to be weighed are discharged from the weighing hopper in an optimal combination that is equal to or closest to the set value, and that the weighing hopper is emptied after being discharged. A new object to be weighed is supplied to the weighing hopper, and the next combination calculation of VC1 is performed until the value of the object fed to the weighing hopper participates in the combination calculation again, and the value obtained in the previous combination calculation is carried out. A combination weighing method and apparatus have already been disclosed for obtaining the next optimal combination that is equal to or closest to the set value from the respective bags of objects to be weighed that do not correspond to the optimal combination.

This invention further develops the above-mentioned invention, and the object to be weighed corresponding to the optimum m & width which is equal to or close to the target setting is discharged from the weighing hopper, and a new weighing object is placed in the weighing hopper. By the time the object is supplied and the case of the object to be weighed that has been supplied to the weighing hopper again participates in the combination calculation, the value of the remaining objects to be weighed that is currently being supplied to the weighing hopper is equal to the set value, The weighing capacity is improved by performing the operation of obtaining the optimum combination that is the closest to the calculation a predetermined number of times, and discharging from the weighing hopper one wave meter that corresponds to the optimum combination obtained in each calculation. The purpose of the present invention is to provide a combination weighing method which is further improved in terms of performance.The details of this invention will be explained below according to the embodiments shown in the drawings.

Fig. 1 is a schematic configuration diagram showing a line of collection mechanisms of a weighing machine used in this invention. Machine weighing hopper〇1
．． 01,...On is a pool hopper, D is a conveyor linked to a packaging machine, and multiple buckets) 81% 8
1%...Kn is provided. Further, F is a discharge timing pulse generator that includes a slit plate F that rotates in synchronization with the compare D, a light projector F, and a light receiver F.

Each of the pool hoppers described above is equipped with an independent supply device f (not shown) for the object to be weighed, and the feeding operation of each feeding device is performed after the corresponding pool hopper has finished discharging the object to be weighed. It starts when the weighing hopper is empty, and stops after supplying objects to be weighed by - pieces, a set number of pieces, or approximately a set weight, and when each weighing hopper above has finished discharging the objects to be weighed and becomes empty. , a conventionally known type of feeding device and weighing mechanism is used which opens and closes a corresponding pool hopper and discharges the object to be weighed into the weighing hopper.

Each bucket) Et s Et,...En is configured to run continuously and to sequentially collect objects to be weighed discharged from the weighing hopper in synchronization with the discharge timing pulse TP of the discharge timing pulse generator F.

Each of the above-mentioned metering devices 9, A1, . . . , .
5) It has a configuration that can be supplied as input to the electronic calculation circuit of the present invention, and now the weighing value signals output from each of the welfare machines 1, . . . , n are 61% 4% . do.

, 42 is a block diagram showing the above-mentioned electronic calculation circuit of the present invention, in which G represents each weighing machine'I, . . .
・Measurement value signals 'l,'1,...alI output from i
The above-mentioned measurement value signals are selectively added based on the addition code from the mtd addition code selection circuit G, which selects a combination of addition codes for selectively adding . In addition to comparing the setting meters jlfLa, each total ji: value signal is added based on the optimal addition code stored in the numbing code storage circuit J, which will be described later.
This is an addition/comparison circuit that compares this addition value β with the addition value α, the lower limit set value b, and the lower limit set value C, respectively.

J is an addition code storage circuit J-1, J( 6) =2,...J-tn is the addition code storage circuit J using the storage command pulse CP output from the storage command signal generation circuit G2, which will be described later, when all the combinations of addition codes are completed.
1st and 2nd which memorize selection, appropriate addition code which is memorized
, . . . m-th addition code storage circuit. This nest 1,
2nd, . . . m-th addition code storage circuits J-1, J-2
,...J-m, the object to be weighed is discharged from one hopper in total, a new object to be weighed is supplied to the weighing hopper, and the value of the object to be weighed that was supplied to the weighing hopper is again subjected to the combination calculation. Until participation, the optimal addition code corresponding to the optimal m8-combination obtained by each combination calculation performed a predetermined number of times based on the balance of the remaining weighed objects currently being supplied to the weighing hopper. , and the optimum addition code corresponding to the stitch number currently being discharged.

Note that the number of combination Pjl calculations performed between the time a weighing hopper performs a discharge operation and the time it participates in the next tl&combination calculation is determined by the number of weighing hoppers and - the number of acid-resistant hoppers performing discharge according to the result of the same combination calculation. The number of objects to be weighed is determined by the number of hoppers and the collecting capacity of the collection mechanism that collects the objects to be weighed discharged from a total of one hopper.

L is a combination of the addition codes of the addition code selection circuit G and the first input manually entered through the selection pattern register K.
, second, . . . m-th addition code storage circuit, T-11
, ■-2, . . . A bit check circuit that performs a bit check with the optimal addition code stored in J-m, R
When all the combinations of addition codes are completed, the selection pattern register K and the preset signal generation circuit G1, which will be described later,
, a decoder counter that outputs a control signal to the storage command signal generation circuit o2.

G1 is a preset signal generation circuit that outputs a preset signal to any one of the first, second, . . . m-th addition code storage circuits J-1, J-2, . 1,
2nd, . . . m-th addition code storage circuits J-1, J-2
, . . . OFF, which is a storage command signal generation circuit that outputs a storage command signal to either of 01
This flip-flop is used to preset any one of the first, second, . . . m-th addition code storage circuits J-1, J-2, .

When all the combinations of addition codes are completed, M is used to control the first, second, . . . , m-th addition code storage circuits J-1, J-2, . . . One of them reads the stored optimal addition code and sends a discharge signal d to the corresponding weighing hopper.

, 1-dnn output/discharge control circuit.

The above-mentioned addition code refers to a code number attached to each weighing tray or each weighing hopper, and the combination of these code numbers. Now, enter the code number of the valley weighing machine as
7. Select...Xn, then the total number of !1 combinations of ``take out one item from the items in i!'' is n ways.Also, the number of combinations to take out 2 items from n items is y ways. In addition, the combination of r numbers from n (9) is n(n-1)k town names X (μm±0-th). It is output from the addition code selection circuit G of the electronic calculation circuit.

Next, the specific configuration of each of the above-mentioned circuits constituting the electronic calculation circuit will be explained as follows. Note that the figures showing the specific configurations all show the case where 12 weighing machines are used.

As shown in FIG. 8, the addition code selection circuit G receives the output of the clock pulse oscillator +11 which oscillates a clock pulse with the calculation start pulse as an input, and is an 18-bit counter (4 stages of binary counters connected in series). 2
), and the output of each bit of the counter (2) changes as shown in FIG. 18 for each clock pulse output from the clock pulse oscillator +11 to generate a combination pattern. Now, each bit output Q7, G2,...Qn of the counter (2) is converted into each counting machine M1, M2,...
・If the code numbers Xl, Xt, ... is 4095 letters. Then, each bit output Q1 of the counter (2),
The inverted outputs of Ql, . . . Qn, 2, .

On the other hand, as shown in Figure 2, a clock pulse oscillator (1
) and the second bit output Q of the counter (2) are connected to the AND circuit (3) to generate a clock pulse m.
Hp (The output of It and the 91st bit output Qn+1 of the counter (2) are connected to the input of an AND circuit (4), and the output of this AND circuit (4) is used as a calculation end signal to the clock pulse oscillator ill. At the same time, the permissible error range check signal 8 from the addition/comparison circuit H, which will be described later, is connected to each input of the AND circuits (5) and (6) which are operated manually. As shown in FIG. 2, the outputs are connected to the R terminal and S terminal of the flip-flop FF, respectively, and the Q output of the flip-flop FF is input to an AND circuit (7).

As shown in Fig. 4, the decoder counter R includes a binary counter (8), a decoder (9), an overlap number change switch (]0), and an OR circuit (11) that outputs a clear signal to the binary counter (8). It consists of
When the clear signal OLR is applied manually to the binary counter (8), only the first step becomes "1", and then the clock signal OLR becomes "1".
When LK is input, only the second step becomes "1" and moves one after another in accordance with the clock signal OLH, returning to the original state after m steps. The decoder output of the decoder counter R is the preset signal generating circuit G1.
, storage command signal generation circuit o2, and selection pattern register Keep it.

The preset signal generating circuit o1 is constructed as shown in FIG. is designed so that the output of the AND circuit (7) is input. On the other hand, at the input terminal of OR circuit 04),
The AND circuit (+ output terminal is input, and the other input terminal is set to input the initial clear signal. Then, these m OR circuits (14a), (14b) - (
14m) are connected to the preset terminals PR of the first, second...m-th addition code storage circuits J-1, J-2...J-m, respectively.

As shown in FIG. 6, the storage command signal generation circuit G2 is composed of m AND circuits (15a), (15b) - (15m), and one input terminal of the AND circuit (I) is connected to a decoder. The decoder output of counter R is connected to the input terminal, and the other input terminal is connected to an AND circuit (6).
The output of is the input.

And m AND circuits (15a), (15b) ・-
(15 m), the outputs of the first, second...mth
The clock terminals OLK of the addition code storage circuits J-1, J-2...J-m, the emission control circuit M and the OR circuit (24
Connect it to 1.

As shown in FIG.・A first adder N that receives as input and adds each measurement value signal based on the combination pattern of the addition code selection circuit G (see FIG. 14).
-1, each measurement value signal a8, a,...an and addition code storage circuit JI7) Optimal combination code output X1, :r:
2...Compare the outputs α and β of the double-legged calculators N-1 and N-2 with the second adder N-2 which takes In as an input and adds each measurement value signal based on this combination code. an additional value comparator P, an output α of the first adder N-1, and a setting meter t.
Total tfl to compare with ria! It is composed of a comparator Q, a lower limit setting value comparator Ru.

Output of the added value comparator P8. is the first adder N-1
When the output α is smaller than the output β of the second adder N-2, that is, α<β, it becomes “1”, and when α is other than β,
That is, when α≧β, rOJ is obtained. Also, the output of the meter value comparator Q8. is "1" if the output α of the first (14) filter N-1 is greater than or equal to the set measurement value n, that is, if α/= ao, then α<a. In the case of , the minus value of "0" should be cut off.Further, check whether the output β of the second adder N-2 is greater than or equal to the lower limit setting 1 and smaller than the upper limit setting C. or if they are equal, that is, within the allowable error range (b≦β≦C), the output 81 of the AND circuit (16) which manually inputs the outputs of both comparators r and 8 will be “1”.
Output 83 if outside the allowable error range (β<b or β>1)
becomes "0". The lower set value is the set weighing value a in order to loosen the allowable error range a little, taking into account that each weighing hopper will oscillate to some extent. Set the value to a somewhat smaller value.

Then, the output 8 of the addition value comparator r. and measurement value comparator Q
The output of the clock pulse oscillator (1) and the output BOK of the pit check circuit (to be described later) are connected to the input of the AND circuit t+7), and a check output of the allowable error range is obtained.8. As mentioned above, the AND circuit tel (connected to each input of 61 (21st zo 1 diagnosis) addition code storage [
The path J is used to store the combination code of the setting value a0, that is, the value closest to the desired setting it, and as shown in FIG. When the number of machines is 12, the inverting outputs of the addition code selection circuit G are connected to the input side, and the second adder N of the addition and comparison circuit H is connected to the output side. -2 and the first,
2nd... m-th addition code storage circuit J-1, J-2.
...J-m respectively, and the outputs X1, X, ...j
n corresponds to input circles, lice, etc., that is, corresponds to code numbers x+, Xt, . . . Then, the output of the AND circuit 07) C (Fig. 2) becomes "1".
'', among the inputs ``1'', ``1'', .

In addition, in this addition code storage circuit J, the initial clear bar 3 selects all codes t,, x, . . . by the calculation start pulse.
- xn is cleared to "1" and all codes are selected.

On the other hand, the first, second, . . . m-th addition code storage circuits J-
1, J-2...J-m all have the same configuration, and as shown in FIG.
9) (19+...), and each input terminal has each code output xI, x of the addition code storage circuit J.

...xn is connected, each output is a selection pattern register K
and discharge control circuit M, respectively. The optimal combination code stored in the addition code storage circuit J is set to the first and second storage command pulses OP, .・
...m-th addition code storage circuit J-1, J-2...J
-m is stored, and the output corresponding to the stored combination code becomes "1".

In addition, each Kaga code storage circuit J-1, J-2...J-m
is preset by either the initial clear pulse or the rlJ output of the preset signal generating circuit o1, and each output thereof becomes "0" and is placed in a state in which no combination code is stored (17).

As shown in FIG. 10, the selection pattern register (6)) is a wired connection of m AND circuits (20a), (20b)-(2Qyy+) using open collector or tristate, and each AND Circuit (20,
2), (20b)...(20m), the decoder output of the above-mentioned decoder counter R is input to one input terminal, and the other input terminal is connected to the first,
2nd... m-th addition code storage circuit J-1, J-2.
・The output of J-m is inputted respectively,
Furthermore, each AND circuit (20a), (20b)...(20
The output of m) is inputted to the pit check circuit. And now the decoder counter R decoder +
All memory data of the addition code storage circuits other than the addition code storage circuit selected at 91 are sent to the bit check circuit.

As shown in FIG. 11, the bit check circuit outputs the inverted outputs of the addition code selection circuit G, .

(18) ...K: tllI as input, both inputs as logic circuit) to Ql: I: 1, Q8 and Kit, -Q
Each bit of n and Kin is checked, and each set (circle, K
z, ), (41, K, Z,) −・−(Qn, Kr
If even one set of J inputs become "1" at the same time and there is no match, the output BOK of the bit check circuit will become "1".
0'' and if no pair matches, the output BOK
The circuit is configured so that the value becomes "1".

Furthermore, the emission control circuit M is a control circuit M as shown in FIG.
The valley control circuits Ma, Mb-Peng have m pieces of A, and the valley control circuits Ma, Mb-Peng are the first, second, . . . m-th addition code storage circuits J-1,
They correspond to J-2...J-m, respectively. and,
These m control circuits Ma1Mb...are each
The output of the storage command signal generation circuit G2 and the discharge timing pulse T from the discharge timing pulse generator F shown in FIG.
P, and when the "1" output of the storage command signal generation circuit G2 is input, a pulse generation circuit ( 2 audiences and each output QA, Q of the circuit demolition
B... and the code output X1 from the corresponding addition code storage circuit among the first, second,...m-th addition code storage circuits J-1, J-2...J-m. ,X,...:t
n is input, Ql, ZI, QB and 2. . . , and outputs discharge signals d, , d, . . . dn to the corresponding weighing machine when both inputs are "1" at the same time.

In addition, the discharge signals dl, d, ... dlI output from each control circuit Ma, M/)...Mm's logic circuit 匈) are O.
It is configured to output via the R circuit.

The operation of this invention having the above-mentioned configuration will now be explained in 1.
A case where the value closest to the set weight a0 is obtained using two weighing machines will be explained as follows.

First, turn on the power and generate an initial clear pulse automatically or manually by turning on a dedicated switch. Then, the counter of the addition code selection circuit G (each output Q of 21, ,
Q, . . . Q, 3 are each cleared to rOJ, and each code output X of the addition code storage circuit J.

, x, . . . x4 are cleared to "1", and all codes are placed in a selected state. At the same time, the decoder counter R is "1" only in the first step and "0" in the second to mth steps.
Further, the Q output of the flip-flop FF is cleared to "0" (wire connection diagram is omitted). Further, each code output of the first, second...m-th addition code storage circuit J-1, J-2...J-m, r, , :t, '°°x1° is also "0". It is preset to a state where no combination code is stored. Then, each output of the storage command signal generation circuit G2 becomes "0", and the output of the OR circuit 1'241 is also "0", so that the conveyor D does not run. In other words, since the discharge timing pulse TP is not output, the discharge control (b) path M
Each output Ql, QB...Q of each pulse generation circuit 122
No pulse is output from L. Therefore, the discharge signal d,,d,・
...dl doesn't come out either. Also, since the first step of the decoder counter R is "1", the selection pattern register K
c. 2nd, 8th... m-th addition code storage circuit J-
2. Each "0" output of J-3...J-m is input to the pit check circuit, while the human power from the addition code selection circuit G of the pit check circuit is all "0" (21). Therefore, the two inputs cannot match, and the output box of the pit check circuit becomes "1". Furthermore, among the inputs to the addition/comparison circuit H, inputs 43, . , , ,f,
...x18 are each "1", and each weighing value signal a
+, a,...”1m is now zero, so the output of the first adder N-1 is α=0, and on the other hand, the output of the second adder N
The output of -2 also becomes β-0. Therefore, the output 81 of the addition value comparator P is "0", and the output 8. of the measured value comparator Q is "0". Also “0”
, the output of the AND circuit 0 which receives the output of the upper limit set value comparator 8 and the output of the lower limit set value comparator T as inputs. also becomes "0". Therefore, the output of the AND circuit 07) is "0".9, and the addition code storage circuit J remains in the all-code selected state.

Also, as mentioned above, AND circuit circuit quantity 8. Since is rOJ, one input of the AND circuit (5) is "1", and the other input is "1" because the output of the AND circuit (4) is rOJ.
0'', therefore the output of the AND circuit ([+) is rOJ
Tonanashi, the Q output of the 7-rig 70-tub FF depends on rOJ (
22) Rearranged Vr becomes consistent.

Next, each weigher 6, bill...Alm weighing spot, <-B
,,B3...B6. Hetani Pool Hopper 01.01・
...Inject each object to be weighed from C1, and measure the weight of each object. When the weighing is completed, a calculation start signal is input to the electronic calculation circuit shown in FIG. 2 using this completion signal or a signal from the packaging machine. The calculation start signal is sent to the counter (2) of the addition code selection circuit G and the addition code storage circuit J.
These are input as clear signals to each of them, but as described above, each of these has already been cleared by the initial clear pulse. The calculation start signal is also input to the aD circuit (7), but the Q output of the flip-flop FF is "0".
”, the output of the cough circuit () is “0”.
It will remain as . On the other hand, when the calculation start signal is input to the clock pulse oscillator fi+ of the addition code selection circuit G, the clock pulse is input to the counter (2) as shown in FIG.
), and the counter (2) outputs the combination pattern, the pick, and the addition combination code Q, , Q, . . . Q6 .
arises from.

Now, each weighing machine A,,A,...mu1. Code Nanno (
- is X1%"l...xl, and the measured values are each 'l * 'l...α□, then the addition combination code output from the counter (2) is as shown in Figure 14. (X, ), (X, ), cXl+xs)... Calculations are performed in this order in the addition and comparison circuit H. First, (Xl
), in FIG. 7, the added value α of the first adder N-1 is α=111. Now, since the addition code storage circuit J is in the all-code selection state, the addition value β of the second adder N-2 is β=a, +a, +..."11. Then, α and β are compared in the addition value comparator P, and the result is α<β, and the output 8 of the comparator r is “1”.
becomes. In addition, if the measurement range of each weighing machine is determined in advance so that the set measurement value a6 is obtained by combining a plurality of each measurement value, for example, 2 to 4, the comparison between α and ao in the measurement value comparator Q The result is α〈a. The output is 8. becomes "0".

Furthermore, the comparison result at the lower limit set value comparator r is b<β, and the comparison result at the upper limit set value comparator S is C<β, which is the check result of the allowable error range for the set weighing value a, AN.
The output S of the D circuit θ6) becomes "0", while the counter (2) of the addition code selection circuit G to the pit check circuit becomes "0".
) input is ``1'', 6...Hiro, respectively ``0''.
”, and the second, eighth, ... m-th addition code storage circuit J-2 is inputted via the selection pattern register K.
, J-8... Each code output Kx from J-m, ,
Since Kx, . this"
1'' is maintained at least until all the first combination calculations are completed. Therefore, each human power S, , S of the AND circuit (17).

, BOK, 8□ is "0", 8. and BOK are each “1
'', and the output of this circuit (lη remains "0"), the addition code storage circuit J does not store the code (xl) selected by the addition code selection circuit 0.

Also, the output 8. of the AND circuit (I6) which is the result of checking the allowable error range of the addition/comparison circuit H. is "0", which is inverted and input to the AND circuit fll), but the other (2
5) Since the input of is "0", the Q output of the flip-flop FF remains "0".

In this way, the counter (2
), the addition combination code (x2), (x+ ”
xl)..., the addition and comparison circuit (2) sequentially performs addition and comparison, and at the same time, the pit check circuit performs a pit check. And now, as above,
Since the output BOK of the pit check circuit remains "1" until all combination calculations are completed, the output 8. and output 8 of weighing value comparison @%Q are both “1”,
That is, α<β, α≧a. At the timing of the next clock pulse from the clock pulse oscillator (1) of the addition code selection circuit G, the AND circuit (if the output of one is "1")
The addition combination code selected by the addition code selection circuit G is stored in the addition code storage circuit J by the rlJ output.

On the other hand, when at least one of the outputs S of the addition value comparator P and the output S of the measured value comparator Q is "0", the memory of the addition code storage circuit J (26) code is updated. The program moves on to the next code combination calculation.

When all the combination calculations are completed as described above, the 13th bit output Q1m of the counter (2) of the addition code selection circuit G becomes "1", and at the timing of the next clock pulse, the calculation end signal is output to the AND circuit. (4) and stops sending out the clock pulse from the clock pulse oscillator (1). At this time, output 8. of the check of the allowable error range of the addition/comparison circuit H. is "1", that is, the addition value β of the addition combination code stored in the addition code storage circuit J is the upper limit setting value C and the lower limit setting f[! If the trench b≦β≦C with cb, the AND circuit (6)
As the output of G2 becomes "1", the storage command signal generation circuit G2
AND circuits (15a) and (15b) configuring =-(
15m) of the first step of the decoder counter R.
1” output is input to the first addition code storage circuit J.
The output of the AND circuit (15a) corresponding to -1 becomes "1", and a storage command pulse op is outputted to the first addition code storage circuit J-1. Next, this pulse OF causes the first addition code storage circuit J-1 to store the addition combination code stored in the addition code storage circuit J, and also connects the emission control circuit M and the OR circuit. This pulse CP+ is sent to the drive motor of the conveyor D via. Then, the conveyor D starts running, and a discharge signal d1 is sent from the control circuit Ma of the discharge control circuit M to the weighing machine corresponding to the addition combination code stored in the first addition code storage circuit J-1 as described below. , d,... is sent,
The objects to be weighed are sequentially discharged from the weight dropper of the corresponding weighing machine into packets E on conveyor D and collected. The weight of the object to be weighed collected in the packet El is within the tolerance range and is equal to or closest to the set weight value a.

On the other hand, when the calculation end signal is output from the AND circuit (4), the output 8s of the addition and comparison circuit H is now "
1", the Q output of the flip-flop FF remains unchanged and remains "0". On the other hand, the binary counter (8)K of the decoder counter R receives the clock signal OLK after the delay time due to the delay operation of the delay circuit θ2), so the decoder output of the decoder counter R becomes rlJ only in the second step. . Therefore, the selection pattern register X sends all memory data of the addition code storage circuits other than the second addition code storage circuit J-2 selected by the decoder output of the decoder counter R to the pit check circuit , in this case, the combination code stored in the first addition code storage circuit J-1), setting meter 1
The combination code closest to #value a will be sent to the pit check circuit.

Then, while the conveyor D is running and sequentially collecting the objects to be weighed into the packets E, a calculation start signal is again input from the packaging machine to the electronic calculation circuit shown in FIG. 2, and a second combination calculation is performed. conduct. That is, in the second combination calculation, within the tolerance range, (29 ) and selects the optimal combination code that is equal to or closest to the set metric value a.

Now, the optimal addition combination code stored in the first addition code storage circuit J-1 as a combination code with a value within the allowable error range and equal to or closest to the set measurement value a, for example (X, ), then the set weight value a is within the allowable error range from among the remaining 10 combinations for this code number (X, ~X, , ) excluding each code number (X x 2). The optimal combination is selected that is equal to or closest to .

When the second calculation start signal is input, like the previous time,
Again each output Q of the counter (2) of the addition code selection circuit G
+, Q=...Qo is cleared to "0" and a clock pulse is sent from the clock pulse oscillator fi+ to the counter (2), and the counter (2) outputs the combination pattern, the summation, and the addition combination code Q Q...Q
It occurs from 4. At the same time, each code output x, . The calculation start signal is also sent to the AND circuit (7), but since the Q output of the flip-flop FT remains at "0", the output of the circuit (1) is "0" it.

On the other hand, in the selection pattern register, since the decoder output of the decoder counter R was switched to "1" only in the second step at the end of the previous combination calculation, it is stored in the first addition code storage circuit J-1. Addition combination code (
Xl +xz) is sent to the bit check circuit. The inputs of Ex, Kx, and Kx of this circuit are each set to "1".

Then, as in the previous combination calculation, in the addition comparison circuit H, the addition combination codes sequentially output from the counter (2) of the addition code selection circuit G are selected by the first adder N-1 of the combination code at that time. The added value α is compared with the added value β of the second adder N-2 of the addition combination code stored in the addition code storage circuit J by the added value comparator P, and the added value α is set as the added value α. The measured value a is compared with the measured value comparator Q, and the above added value β is compared with the lower limit setting value C and the upper limit setting value C.
are compared by the lower limit setting value comparator r and the upper limit setting value comparator B, and the pit check circuit stores the combination code of each combination code at that time in the first addition code storage circuit J-1. A bit check is performed with the optimal combination code in the first combination calculation.

As a result, α<β, α≧a, the comparison output S1.8
! are both “1” and the bit check output box is also “1”.
1'', the combination code at that time is stored in the addition code storage circuit J at the timing of the next clock pulse, and at least one of the eight outputs 81.8□ and BOX is
If one output is "0", the combination code at that time is
It is not stored in the addition code storage circuit J. Then, without updating the stored code, move on to the calculation of the next code combination.

The reason why the memory code is not updated when the output box of the pit check circuit is "0" is because of the first
The object to be weighed selected in the second combination calculation is stored in packet E6.
Since the second and subsequent combination calculations are performed when data is collected sequentially, the optimal combination code selected before the previous time or the additive combination code related to each code number will be used in the next combination calculation. This is to prevent it from being selected as the optimal combination code.

When all the combination calculations for the second time are completed in this way, the counter (2) of the addition code selection circuit G is
The 188th bit output Q1. becomes “1”, AND
The calculation end signal is output from the circuit (4) and the clock pulse oscillator (1) stops sending out clock pulses, and the second bit output of the decoder counter E is now "1".
Therefore, the second
A storage command pulse O is sent to the addition code storage circuit J-2 of
P.

is output. Then, with this pulse OP, a combination code that is within the tolerance range stored in the addition code storage circuit J and that is equal to or closest to the set measurement value a, that is, the optimal set (8B), is created. is then stored in the second addition code storage circuit x-2, and is sent to the conveyor D via the pulse OP, lyE discharge control circuit M and OR circuit.
As in the previous case, the objects to be weighed are sequentially discharged into the packet E3 from the weighing hopper of the weighing machine corresponding to the optimum combination code stored in the second addition code storage circuit J-2 and collected.

On the other hand, as in the case of the previous combinational calculation, now the output 8. of the addition and comparison circuit H. is "l", so the flip-flop F
The q output of F remains rOJ and remains unchanged at "0". On the other hand, the decoder counter is a binary counter (8
), the clock signal OLK is inputted after the delay time by the delay operation of the delay circuit 0, so the decoder output of the decoder counter R becomes "1" only in the eighth step.

For this reason, the selection pattern register 'tc7! In this case, it is not necessary to send all the memory data of the subtraction code storage circuits other than the eighth addition code storage circuit J-9 selected by the decoder output of the coder counter R to the Viratochiera 10A) circuit. are the first and second
The two types of combination codes stored in the addition code storage circuits J-1 and J-2 are sent to the pit check circuit.

Then, the conveyor D travels and transfers the objects to be weighed selected in the first and second combination calculations into packets EI and E.
, a calculation start signal is again input from the packaging machine to the electronic calculation circuit shown in FIG. 2, and the eighth combination calculation is performed. In this 8th combination calculation, the first and second
The code stored in the addition code storage circuits J-1 and J-2 is within the allowable error range from the remaining addition combination codes excluding the related addition combination code, and the set measurement value a
The optimal combination code that is equal to or closest to 0 is selected, and the objects to be weighed selected by this combination calculation are collected in packet E.

In this way, the collection of the objects to be weighed selected in the first combination calculation is completed, and the objects to be weighed are again supplied from the pool hopper to the weighing hopper that has been emptied after discharging, and the objects to be weighed are Until the hopper is ready to participate in the combination calculation again, the combination calculation is performed m times, and each time the combination calculation is completed, the collection operation of the object to be weighed selected in that combination calculation is started. Then, when the m-th combination calculation is completed, the decoder counter R returns to the initial state, and the decoder output is "1" only for the first step.
After that, the (m+1)th combination calculation is started. At this time, the pit check circuits are connected to the second, eighth... m-th addition code storage circuits J-2, J-8,...
...The addition code stored in J-m, that is, the addition code selected in the second to mth combination calculations, is sent and stored in the first addition code storage circuit J-1. The addition code selected in the first combination calculation will not be sent to the pit check circuit, but the
+ When the first combination calculation starts, the weighing hopper selected in the first combination calculation is again supplied with the object to be weighed and is in a state where it can be added to the combination calculation, so there is no problem. After that, the above operation is automatically repeated and continued, m+2+2nd time+8+8th time, 2m+1st time,
The combination calculation is performed as follows: 2m + 2nd time...

Therefore, the 1'82 adder N- in the addition/comparison circuit H
β according to 2 is an added value that has the smallest error with respect to the set metric value other than the added value for each combination code and the addition combination code related to each code number, and indicates the value closest to the set metric value. Therefore, the addition code storage circuit J stores the optimal combination code selected in the previous combination calculation and the addition combination code that is closest to the set measurement value among the combination codes other than the addition combination codes to which each code number relates. The combination code is stored, and the addition value comparator P compares the addition value of the current combination code with the value closest to the previously set weighing value (
87) The comparison result shows that the current value is closer to the set value than the past value, and the optimal combination selected in the previous combination calculation = - code and its respective codes. The memory is updated only when the number is a value other than the value for the related addition combination code.

On the other hand, in each combination calculation, when all combination calculations are completed, the output 8 of the allowable error range check in the addition and comparison circuit (■). is "0", that is, the addition value β for the addition combination code stored in the addition code storage circuit J as the combination closest to the set measurement value a is smaller than the lower limit setting value, or is lower than the upper limit setting value. If it is larger than the set value C, if β<b or β>C, the Q output of the flip-flop FF becomes "1" with the calculation end signal output from the AND circuit (4), but the AND Circuit (6
) remains at "0" and the clock signal OLK is not input to the decoder color/Rn, so the decoder output of the decoder counter R does not change. Therefore, the storage command signal generation circuit G2 (88) does not output the storage command pulse CP, and the addition combination code stored in the addition code storage circuit J is
...m-th addition code storage circuit J-1, J-2...
It is not stored in any of J-m, no ejection signal is output from the ejection control circuit M to the weighing machine, and the selection pattern register X does not change.

Then, when the next calculation start signal is input, each code output x of the addition code storage circuit J with this signal,
Clear jc, ...
Then, the AND circuit (
18a), (18b)-(18m), the output of the AND circuit selected by the decoder counter R becomes "1", and the first, second, . . . 1, which inputs the output of the circuit
8m addition code storage circuit J-1, J-2...J-m
Each code output of any one of is preset to "0". After this, combinational calculations are subsequently performed to recalculate the optimal combinational code. Furthermore, flip-flop FF
With the Q output of the counter (2) on the Q output path G and the clock pulse from the clock pulse oscillator +11,
” and then returned to “0” (see Figure 2).

When this combination calculation is completed, it is determined that the combination code stored in the addition code storage circuit J as the optimal combination code does not fall within the allowable error range.
If the output S of the tolerance range check becomes "0", either stop the operation of the entire weighing device and issue an alarm, or move the conveyor D backwards to remove the objects to be weighed from all weighing hoppers. After collecting the objects in a packet and discharging them from one end of the conveyor D to an appropriate location, and supplying the objects to be weighed again to all weighing hoppers, recombination calculations for all weighing values are performed, or
Alternatively, after additionally supplying the object to be weighed to at least one weighing hopper, a circuit for recombining all weighing values may be provided.

As mentioned above, since the combination calculation is performed for the weight contained in each weighing hopper, that is, the weighing value, each total "li"
The t' machine may set 3 independently, or it may set *iW once.
You can set it to i, so if you put out the gong No. 16 during the mid-day break of the valley hopper, you can automatically select and take out the one of set foot summer. Also, in addition to setting 1 ↑Additional codes are added so that the number of combined codes becomes the desired number, with the number of put-in (2) of temporary mt violet proboscis in the violet hopper as a constant number. Select the combination and then set the power consumption as described above.
Good work.

In addition, the addition comparison (b) path H in the embodiment of this invention is $
Although addition and comparison are performed using analog values as shown in FIG. 7, it is of course possible to use a circuit that performs the addition and comparison using digital values.

Further, in the embodiment of the present invention, the addition code selection circuit G Vc
A combination pattern of addition codes is generated using an N-1-1 bit binary counter, but in this case, /
*The temporal change in the selection opportunity in combination calculation is very different between the 2nd scale W machine and the 1st scale machine, and the /th weighing machine has a change in the clock pulse. Therefore, *IglJ%, but in the Nth total k q shell, Koto1
It is only selected from the first time (see Figure 7V). Therefore, the combination fjT, J4 speed is determined by the analog addition/comparison circuit (Fig. 2) and this clock pulse, and since the window time for external noise is different, This may affect the fire resistance of the device. Therefore, in order to equalize the above probabilities, it is also possible to use a combination pattern generation method using pseudo-random No. 11, such as M-series No. 1. .

The circuit divides each weight value measured by each weighing machine by the single weight of the object to be weighed, converts it into a piece value, performs a combination calculation on the piece value, and calculates the set number of pieces or the number closest to it. It can also be applied to a so-called combination counting device designed to obtain .

Next, the weighing hopper of the weighing machine corresponding to the optimal combination code obtained by the combination calculation is opened, and the weighing object in the weighing hopper is transferred to one of the packets Σ6, E, ... En on the conveyor D. The case of collecting data in packets will be explained.

First, when the calculation end signal is output, one packet El on the conveyor D shown in FIG. 1 is transferred to the first weighing machine 1.
When the packet El travels and comes directly under the seventh weighing hopper B, the next packet E is located directly below the first weighing hopper B. ``I'', El...E
The position of Il is determined mechanically.

Then, when a calculation end signal is output from the AND circuit (4) and a storage command pulse CP is output from the storage command signal generation circuit G2, this pulse is used to generate the optimum value stored in the addition code storage circuit J as described above. The combination code is 1st, 2nd...
- m-th addition code storage circuit J-1, J-2...J
-m, the above-mentioned pulse is sent to the conveyor D and the discharge control circuit M, the conveyor D starts running, and the packet is sent to the weighing hopper from the discharge timing pulse generator F synchronized with the conveyor D. A discharge timing pulse TP is sent to the discharge control circuit M every time the discharge timing pulse TP comes directly below the discharge control circuit M.

On the other hand, for example, if a storage command pulse OF is output from the storage command signal generation circuit G2, in the discharge control circuit M shown in FIG. At this time, for example, the packet E1 is positioned directly below the first weighing hopper B1. Discharge timing pulse T input when it comes directly below the weighing hopper
For each input of P, pulses are output to the logic circuit (231) in chronological order from output QA to output QL.

If the optimal combination code transferred and stored from the addition code storage circuit J to the first addition code storage circuit J-1 using the storage command pulse OP is, for example, (Xs '' ,, each input of xs is "
1", when the packet EI comes directly under the second and fifth weighing hoppers B1 and B, it matches the "1" outputs of the pulse generator circuit Ql and QI. Then, the discharging signals d, , d are sequentially sent from the logic circuit to the corresponding weighing hopper "1", Bl.

will be sent. Then, the objects to be weighed are sequentially discharged from each weighing hopper "1" and "1" to the bucket (E) and collected.

The value of the object to be weighed collected in packet E1 is within the tolerance range and is equal to or closest to the set weight.

In addition, the other control circuits Mb...blood also have memory fingers (45
) When the command pulses OF, .

In addition, if the optimal combination code exists for each combination calculation, the storage command pulses OF, %OF, ... OP m are output from the storage command signal generation circuit G2 at the end of each combination calculation, so that the conveyor D are continuously driven while the first, second, ... m-th addition code storage circuits J-1, J-
If objects to be weighed are collected in separate packets from the weighing hoppers corresponding to the optimal combination code stored in 2...J-m, then the result is K.

＃￥1 In the example shown in the figure, objects to be weighed in all weighing hoppers are collected using one conveyor D and multiple buckets), but it is possible to collect objects to be weighed from all weighing hoppers using one conveyor D and multiple buckets. For example, if there are 12 weighing machines, the objects to be weighed from each of the 1st to 6th weighing hoppers are collected on one conveyor,
It is also possible to collect the objects to be weighed in the 7th to 12th weighing hoppers using the other conveyor (46), thereby increasing the collection efficiency.

In addition, instead of using a conveyor to collect objects to be weighed, each weighing machine is arranged around the circumference, and objects to be weighed that correspond to the optimal combination code are simultaneously discharged from the weighing hopper and delivered to one place through one collecting chute. Although it is possible to collect the objects, in this case, the drop distance in the collecting shade becomes large, so the collecting chute is set so that the objects to be weighed that were discharged last time and the objects to be weighed that will be discharged next time do not mix with each other. Requires special ingenuity or equipment.

In addition, the above explanation was based on the case where combined weighing was performed using 12 weighing machines. In order to use the remaining foldable hoppers to perform a predetermined number of combination calculations before the hoppers are ready to participate in combination calculations again, more weighing machines are actually used to perform combination calculations. It's better to do it.

In addition, the electronic calculation circuit shown in Fig. 2 is shown as a hardware circuit in order to specifically explain its operation, but in reality, it is necessary to add various check functions, so a microcomputer, It is preferable to perform software processing using a microprocessor or the like. As an example of a program in this case, the flowchart in FIG. 15 is shown.

As explained above, in the combination weighing method of the present invention, objects to be weighed that correspond to the optimal combination are discharged from the weighing hopper, and after being discharged, new objects to be weighed are supplied to the empty weighing hopper, and By the time the shift of the objects to be weighed supplied to the weighing hopper is ready to participate in the combination calculation again, the total amount of the remaining roses to be weighed supplied to the weighing hopper must be equal to the set value, or The operation of obtaining the optimum combination that is the closest to that is performed a predetermined number of times, and the objects to be weighed that correspond to the optimum combination obtained in each calculation are sequentially discharged from the weighing hopper, thereby achieving high-speed adhesion resistance. You can improve your weighing ability and
The advantages of conventional combination calculations are that variations in unit weight do not directly affect weighing accuracy, allowing very high precision weighing, and disturbances in supply or alignment do not directly lead to measurement errors. Even if the set value becomes large, the accuracy can be maintained at a high level, and since the actual total of each weighing machine is a combination of values, the error due to the setting of each weighing machine will not affect the final error, and each It is ideal for assembling or packaging objects to be weighed that have variations in weight, single item, bag, or packet to a predetermined weight or number of items.Especially, the error curve is extremely close to zero, making it ideal. In addition, since the objects to be weighed which are out of the optimum combination are not processed and remain in the next combination calculation, there is an effect that the advantages such as not damaging the objects to be weighed can be utilized as they are.

[Brief explanation of the drawing]

Each of the drawings shows one embodiment of the present invention, and the drawings show one embodiment of the invention.
The figure is a schematic configuration diagram of the weighing and collection mechanism of the object to be weighed, and FIG. 2 is a block line (49) diagram of the electronic calculation circuit. Figures 3 to 11 show more detailed block circuit diagrams of individual circuits in the electronic calculation circuit of Figure 2. Figure 8 is an addition code selection circuit diagram, and Figure 4 is a decoder counter circuit diagram. 5 is a preset signal generation circuit diagram, FIG. 6 is a storage command signal generation circuit diagram, FIG. 7 is an addition/comparison circuit diagram, FIG. 8 is an addition code storage circuit diagram, and FIG. 9 is an addition code storage circuit diagram. , 2nd... mth Kaga code storage circuit diagram, 1st
FIG. 0 is a circuit diagram of the selection pattern register, FIG. 11 is a pit check circuit diagram, and FIG. 12 is a discharge control circuit diagram. Also, Fig. 18 is an output waveform diagram of the addition code selection circuit in the electronic calculation circuit of pjG 2, Fig. 14 is a combination pattern diagram of code numbers attached to each weighing machine or each weighing hopper, and Fig. 15 is a diagram of the combination pattern of code numbers attached to each weighing machine or each weighing hopper. 2 is a flowchart showing an example of a program when processing software using a microcomputer, microprocessor, or the like. M1 to Mn... total 1 machine, B, ~BII... weighing hopper, 0. ~Qn... Pool hopper, D.
...Conveyor, E, ~E4...Packet, F...
・Discharge timing (50) Pulse generator, 0... Addition code selection circuit, G1
...Preset signal generation circuit, G2...Storage command signal generation circuit, ■...Addition comparison circuit, J...
・Additional code storage circuit, J-1, J-2...J-
m...first, second...m-th addition code storage circuit,
K...Selection pattern register, L...Pit check circuit, M...Emission control circuit, Ma%Mb
...Mm...Control circuit, N-1...First adder, N-2...Second adder, P...Addition value comparator, Q...Total 1 mutter ratio"+f'i [νW value comparator, 8... upper limit setting value comparator, FF... flip-flop, a.... setting meter grade value, a, ~dn... meter signal)
, b...lower limit setting value, C...upper limit setting value, d
,~d, . . . discharge signal, Sl . . . addition value comparator power, 8, . . . measured value comparison output, 8. ...Tolerance range check output, OF, ,OP, ...OP
m...memory command pulse, TP...discharge timing pulse, BOX...pit check output, x1 to xn
, Kx, ~Kin...Code output. (51) Figure 1? 8th ward, 9th ward, 10th ward, 15th 4-1111''

Claims (1)

[Claims] fi+ The optimal value that is equal to or closest to the set value from the weight signal sent from a plurality of weighing machines or the number pupil signal of each object to be weighed converted from the weight value signal. ffi combination is calculated, the objects to be weighed corresponding to the combination are discharged from the weighing hopper, and after the discharge, a new object to be weighed is supplied to the empty weighing hopper, and the object to be weighed that is supplied to the weighing hopper is From the values of the remaining objects to be weighed that are currently being supplied to the weighing hopper, the optimum combination that will be equal to or the closest value to the set value before the value can be used to participate in the combination calculation again. This combination weighing method is characterized in that the operation of obtaining the above calculation is performed a predetermined number of times, and the objects to be weighed that correspond to the optimum combinations obtained in each calculation are sequentially discharged from the salmon hopper.