JPS5876216U - Volume setting circuit - Google Patents
Volume setting circuitInfo
- Publication number
- JPS5876216U JPS5876216U JP17182981U JP17182981U JPS5876216U JP S5876216 U JPS5876216 U JP S5876216U JP 17182981 U JP17182981 U JP 17182981U JP 17182981 U JP17182981 U JP 17182981U JP S5876216 U JPS5876216 U JP S5876216U
- Authority
- JP
- Japan
- Prior art keywords
- volume
- output
- input signal
- signal source
- variable
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Control Of Amplification And Gain Control (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図はこの考案に係わる音量設定回路の第1実施例を
示すブロック図、第2図は第1図に示すVCAの入出力
特性を示すグラフ、第3図はこの考案の第2実施例の構
成を示すブロック図、第4図は第3図に示すコントロー
ラ31内のROMに記憶されたシステムプログラムの中
で、本考案に係わる部分を取り出して示すフローチャー
ト、第5図は第3図のメモリ32内に設けられた各レジ
スタの内容を示すメモリマツプである。
1〜4・・・入力端子、5〜7・・・入力信号源、9・
・・アナログマルチプレクサ、12〜15・・・入力信
号源切替用プッシュオンスイツ−F’、16・・・VC
A。
17・・・D/A変換回路、19・・・加算回路、20
・・・回転式可変抵抗器、21・・・A/D変換回路、
22・・・RAM、23・・・減算回路、24.24’
・・・波形整形回路、25・・・回転式嫡子、26・・
・指針、27・・・レベル設定用ブツシュブシュスイッ
チ、28・・・直i式嫡子、29・・・エツコーダ、3
1・・・コントローラ、32・・・メモリ。Fig. 1 is a block diagram showing a first embodiment of a volume setting circuit according to this invention, Fig. 2 is a graph showing input/output characteristics of the VCA shown in Fig. 1, and Fig. 3 is a second embodiment of this invention. FIG. 4 is a flowchart showing the part related to the present invention extracted from the system program stored in the ROM in the controller 31 shown in FIG. 3, and FIG. This is a memory map showing the contents of each register provided in the memory 32. 1-4...Input terminal, 5-7...Input signal source, 9.
...Analog multiplexer, 12-15...Push-on suite for input signal source switching-F', 16...VC
A. 17...D/A conversion circuit, 19...Addition circuit, 20
...Rotary variable resistor, 21...A/D conversion circuit,
22...RAM, 23...Subtraction circuit, 24.24'
...Waveform shaping circuit, 25...Rotating legitimate child, 26...
・Pointer, 27... Level setting bushing switch, 28... Direct I type legitimate child, 29... Etsukoda, 3
1...Controller, 32...Memory.
Claims (3)
量を制御するための電圧制御ボリューム回路と、出力音
量を可変調整するための可変調整一 器と、前記可変調
整器の嫡子が所定中央位置にある状態において、前記出
力音量が最適値となるためのデータを、各入力信号源別
に記憶させるためのメモリと、前記切替回路における切
替動作に応答して、該当する入力信号源に対応する前記
データを、前記メモリから読出する読出制御手段と、前
記読出されたデータに基づいて、前記可変調整器の出力
信号を補正する調整器出力補正手段とを備えてなり; 前記調整器出力補正手段で補出された調整器出力により
、前記電圧制御ボリューム回路を制御して、前記可変調
整器の嫡子が所定中央位置にある状態において、最適出
力音量を得るように構成したことを特徴とする音量設定
回路。(1) A switching circuit for selecting an input signal source, a voltage control volume circuit for controlling the output volume, a variable adjuster for variably adjusting the output volume, and a heir of the variable adjuster having a predetermined position. a memory for storing data for each input signal source so that the output volume reaches an optimum value when the output volume is at the center position; and a memory for storing data for each input signal source in response to a switching operation in the switching circuit to correspond to the corresponding input signal source. readout control means for reading out the data from the memory; and regulator output correction means for correcting the output signal of the variable regulator based on the read data; The voltage control volume circuit is controlled by the regulator output compensated by the means, so that an optimum output volume is obtained in a state in which the heir of the variable regulator is at a predetermined central position. Volume setting circuit.
て、かつ前記所定中央位置とは、前記嫡子の指針が真上
に向く位置であることを算機とする実用新案登録請求の
範囲第1項に記載の音量設定回路。(2) The scope of a claim for registration of a utility model in which the legitimate child of the variable adjuster is a rotating legitimate child, and the predetermined central position is a position where the pointer of the legitimate child faces directly upward. The volume setting circuit according to item 1.
、かつ前記所定中央位置とは、その直動ストロークの中
央位置であることを特徴とする実用新案登録請求の範囲
第1項に記載の音量設定回路。(3) The legitimate child of the variable adjuster is a linear acting legitimate child, and the predetermined central position is the central position of its linear movement stroke, Claim 1 of the Utility Model Registration Claim The volume setting circuit described in .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17182981U JPS5876216U (en) | 1981-11-18 | 1981-11-18 | Volume setting circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17182981U JPS5876216U (en) | 1981-11-18 | 1981-11-18 | Volume setting circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5876216U true JPS5876216U (en) | 1983-05-23 |
Family
ID=29963738
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17182981U Pending JPS5876216U (en) | 1981-11-18 | 1981-11-18 | Volume setting circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5876216U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59172818A (en) * | 1983-02-28 | 1984-09-29 | エリクソン ジーイー モービル コミュニケーションズ インコーポレーテッド | Method and device for controlling output volume of radio equipment |
-
1981
- 1981-11-18 JP JP17182981U patent/JPS5876216U/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59172818A (en) * | 1983-02-28 | 1984-09-29 | エリクソン ジーイー モービル コミュニケーションズ インコーポレーテッド | Method and device for controlling output volume of radio equipment |
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