JPS5876216U

JPS5876216U - Volume setting circuit

Info

Publication number: JPS5876216U
Application number: JP17182981U
Authority: JP
Inventors: 木村　重信
Original assignee: ヤマハ株式会社
Priority date: 1981-11-18
Filing date: 1981-11-18
Publication date: 1983-05-23

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図はこの考案に係わる音量設定回路の第１実施例を
示すブロック図、第２図は第１図に示すＶＣＡの入出力
特性を示すグラフ、第３図はこの考案の第２実施例の構
成を示すブロック図、第４図は第３図に示すコントロー
ラ３１内のＲＯＭに記憶されたシステムプログラムの中
で、本考案に係わる部分を取り出して示すフローチャー
ト、第５図は第３図のメモリ３２内に設けられた各レジ
スタの内容を示すメモリマツプである。１〜４・・・入力端子、５〜７・・・入力信号源、９・
・・アナログマルチプレクサ、１２〜１５・・・入力信
号源切替用プッシュオンスイツ−Ｆ’、１６・・・ＶＣ
Ａ。１７・・・Ｄ／Ａ変換回路、１９・・・加算回路、２０
・・・回転式可変抵抗器、２１・・・Ａ／Ｄ変換回路、
２２・・・ＲＡＭ、２３・・・減算回路、２４．２４’
・・・波形整形回路、２５・・・回転式嫡子、２６・・
・指針、２７・・・レベル設定用ブツシュブシュスイッ
チ、２８・・・直ｉ式嫡子、２９・・・エツコーダ、３
１・・・コントローラ、３２・・・メモリ。Fig. 1 is a block diagram showing a first embodiment of a volume setting circuit according to this invention, Fig. 2 is a graph showing input/output characteristics of the VCA shown in Fig. 1, and Fig. 3 is a second embodiment of this invention. FIG. 4 is a flowchart showing the part related to the present invention extracted from the system program stored in the ROM in the controller 31 shown in FIG. 3, and FIG. This is a memory map showing the contents of each register provided in the memory 32. 1-4...Input terminal, 5-7...Input signal source, 9.
...Analog multiplexer, 12-15...Push-on suite for input signal source switching-F', 16...VC
A. 17...D/A conversion circuit, 19...Addition circuit, 20
...Rotary variable resistor, 21...A/D conversion circuit,
22...RAM, 23...Subtraction circuit, 24.24'
...Waveform shaping circuit, 25...Rotating legitimate child, 26...
・Pointer, 27... Level setting bushing switch, 28... Direct I type legitimate child, 29... Etsukoda, 3
1...Controller, 32...Memory.

Claims

[Scope of utility model registration request]

(1) A switching circuit for selecting an input signal source, a voltage control volume circuit for controlling the output volume, a variable adjuster for variably adjusting the output volume, and a heir of the variable adjuster having a predetermined position. a memory for storing data for each input signal source so that the output volume reaches an optimum value when the output volume is at the center position; and a memory for storing data for each input signal source in response to a switching operation in the switching circuit to correspond to the corresponding input signal source. readout control means for reading out the data from the memory; and regulator output correction means for correcting the output signal of the variable regulator based on the read data; The voltage control volume circuit is controlled by the regulator output compensated by the means, so that an optimum output volume is obtained in a state in which the heir of the variable regulator is at a predetermined central position. Volume setting circuit.

(2) The scope of a claim for registration of a utility model in which the legitimate child of the variable adjuster is a rotating legitimate child, and the predetermined central position is a position where the pointer of the legitimate child faces directly upward. The volume setting circuit according to item 1.

(3) The legitimate child of the variable adjuster is a linear acting legitimate child, and the predetermined central position is the central position of its linear movement stroke, Claim 1 of the Utility Model Registration Claim The volume setting circuit described in .