JPH039027U - - Google Patents
Info
- Publication number
- JPH039027U JPH039027U JP6334389U JP6334389U JPH039027U JP H039027 U JPH039027 U JP H039027U JP 6334389 U JP6334389 U JP 6334389U JP 6334389 U JP6334389 U JP 6334389U JP H039027 U JPH039027 U JP H039027U
- Authority
- JP
- Japan
- Prior art keywords
- data
- generation circuit
- output
- memory
- phase
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000004044 response Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 7
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Tests Of Electronic Circuits (AREA)
- Manipulation Of Pulses (AREA)
Description
第1図は本考案に係る波形データ発生回路の一
実施例を示す構成ブロツク図、第2図は第1図の
演算回路5の構成を示す構成ブロツク図、第3図
は第2図のマルチプレクサ51の接続を示す図、
第4図は第1図装置の動作を示す特性曲線図、第
5図および第6図は演算回路5の動作を示す表、
第7図は波形データ発生回路の従来例を示す構成
ブロツク図、第8図は第7図装置のROM2に格
納されている正弦波データを示す図である。
1……位相データ発生回路、2a……メモリ、
5……演算回路。
FIG. 1 is a configuration block diagram showing an embodiment of the waveform data generation circuit according to the present invention, FIG. 2 is a configuration block diagram showing the configuration of the arithmetic circuit 5 of FIG. 1, and FIG. 3 is a configuration block diagram of the multiplexer of FIG. 2. A diagram showing the connections of 51,
4 is a characteristic curve diagram showing the operation of the device shown in FIG. 1; FIGS. 5 and 6 are tables showing the operation of the arithmetic circuit 5;
FIG. 7 is a block diagram showing a conventional example of a waveform data generation circuit, and FIG. 8 is a diagram showing sine wave data stored in the ROM 2 of the device shown in FIG. 1... Phase data generation circuit, 2a... Memory,
5... Arithmetic circuit.
Claims (1)
形データ発生回路において、位相データを発生す
る位相データ発生回路と、この位相データ発生回
路の出力によりアドレス指定されるメモリと、前
記位相データ発生回路の前記出力に対応して波形
データの折れ線近似データを演算しその出力を前
記メモリから読みだされたデータと加算する演算
回路とを備え、メモリが位相データに対応するア
ドレスに波形データと折れ線近似データとの差デ
ータを記憶するように構成したことを特徴とする
波形データ発生回路。 A waveform data generation circuit that outputs waveform data in response to phase data includes a phase data generation circuit that generates phase data, a memory that is addressed by the output of the phase data generation circuit, and a memory that is addressed by the output of the phase data generation circuit. an arithmetic circuit that calculates polygonal line approximation data of the waveform data in response to the output and adds the output to the data read from the memory, and the memory stores the waveform data and the polygonal line approximation data at an address corresponding to the phase data A waveform data generation circuit characterized in that it is configured to store difference data of.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6334389U JPH039027U (en) | 1989-05-31 | 1989-05-31 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6334389U JPH039027U (en) | 1989-05-31 | 1989-05-31 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH039027U true JPH039027U (en) | 1991-01-29 |
Family
ID=31593301
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6334389U Pending JPH039027U (en) | 1989-05-31 | 1989-05-31 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH039027U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS53152803U (en) * | 1977-05-06 | 1978-12-01 | ||
JPS56163957U (en) * | 1980-05-07 | 1981-12-05 |
-
1989
- 1989-05-31 JP JP6334389U patent/JPH039027U/ja active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS53152803U (en) * | 1977-05-06 | 1978-12-01 | ||
JPS5552841Y2 (en) * | 1977-05-06 | 1980-12-08 | ||
JPS56163957U (en) * | 1980-05-07 | 1981-12-05 |