JPS5875899A - Housing for electronic equipment - Google Patents

Housing for electronic equipment

Info

Publication number
JPS5875899A
JPS5875899A JP17411681A JP17411681A JPS5875899A JP S5875899 A JPS5875899 A JP S5875899A JP 17411681 A JP17411681 A JP 17411681A JP 17411681 A JP17411681 A JP 17411681A JP S5875899 A JPS5875899 A JP S5875899A
Authority
JP
Japan
Prior art keywords
layer
electronic
layer board
circuit
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17411681A
Other languages
Japanese (ja)
Inventor
慎吾 山下
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP17411681A priority Critical patent/JPS5875899A/en
Publication of JPS5875899A publication Critical patent/JPS5875899A/en
Pending legal-status Critical Current

Links

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  • Dry Shavers And Clippers (AREA)
  • Casings For Electric Apparatus (AREA)
  • Structure And Mechanism Of Cameras (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は電子ms用筐体に関し、特に回路網を内蔵した
プラスチック筐体に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a housing for an electronic MS, and more particularly to a plastic housing containing a circuit network.

従来、電子機器用筐体は電子部品やプリン)回路板等の
回路網を収納し、保護する容赫としての目的が主であっ
た。最近の電子Il@器はデバイスの龜積化、接続の高
密度化技術の進展に伴い、筐体は単なる4s器すら放M
機能、対人暢詑などを考慮した薄型、小型化傾向にある
。従りて、冥装榊成が襖維化し、組立、保守に非常に多
くの工数を費していた。
Conventionally, the main purpose of electronic device casings was to house and protect circuit networks such as electronic components and printed circuit boards. With the recent advances in device integration and high-density connection technology, the housing of recent electronic Il@ devices, even a simple 4S device, is
There is a trend toward thinner and more compact designs that take into consideration functionality and interpersonal comfort. Therefore, the Meiso Sakaki Sei was made into fusuma fibers, which required a great deal of man-hours to assemble and maintain.

さらに、高密度実装が要求される機器においては回路実
装及び保守面から実装密度に限界が生じていた〇 本発明の目的は、かかる欠点を除去するために電子回路
を敷設し九熱可噌性プラスチ、り板を積層成形し、筐体
と回N網を一体化することによシ実装構成の簡略化及び
高密度実装を実現することにあゐ。
Furthermore, in devices that require high-density packaging, there has been a limit to the packaging density due to circuit packaging and maintenance aspects.The purpose of the present invention is to eliminate such drawbacks by installing electronic circuits and making them heat-resistant. The aim is to simplify the mounting configuration and achieve high-density mounting by laminating plastic and plastic plates and integrating the casing and network.

本発明によれば、熱可飄性プラスチック板を複数枚積層
接着し、真空成形法等によシ成形した電子機器用筐体に
おいて、電子部品取付用のターミナル部を表面に形成し
丸部一層板と電子機器用プリン)回路板と同様な方法に
て構成した電子回路網を片面ある一社両面に形成したI
!層層板前記111層板のターミナル部と第2層板の回
路網ある−は、圏路網聞を電気的に導通するスルーホー
ルと一路網保護jIO外装板とから成ることを特徴とす
る電子機器用筐体が得られる。
According to the present invention, in an electronic device casing formed by laminating and bonding a plurality of thermoplastic plastic plates and molding the same by vacuum forming or the like, a terminal portion for mounting electronic components is formed on the surface, and the round portion is layered. Boards and Printers for Electronic Devices) An electronic circuit network constructed in the same manner as a circuit board is formed on one side and on both sides.
! The terminal section of the 111-layer board and the circuit network of the second layer board are comprised of through-holes for electrically conducting the circuit network and a one-way network protection JIO exterior board. A device casing is obtained.

次に図面をN%/hで本発明の詳細な説明する。Next, the drawings will be used to explain the invention in detail in terms of N%/h.

第1IIは、本発@による電子m器用電体の一部断面説
明図で、lは金属箔を電子部品のリード線取付寸法に舎
せたターミナル部2を具備する菖l゛層板であり1常温
で田ツタウェル硬度M7σ程度以上を有する例えd、硬
質塩化ビ品−ル樹脂、アクリル樹脂、ムB8樹脂、耐衝
〉性プリスチレン樹層、tどom**性樹gill ”
r: h b 。
Part 1 II is a partial cross-sectional explanatory diagram of an electric body for electronic equipment according to the present invention, and l is an iris laminated plate having a terminal part 2 made of metal foil arranged in the dimensions for attaching the lead wires of electronic parts. 1 Examples of materials with a Tatsutawell hardness of about M7σ or higher at room temperature, hard vinyl chloride resin, acrylic resin, B8 resin, impact-resistant pristyrene tree, and hardwood.
r:hb.

3は電子−一部プリン)回路板と同様なエッチシダ法等
で、−IIl的には両筒の回路網4を片面ある−は両面
に**t、た前記111層板と同様な材質の113層板
である・Sはターミナル部2と回路網4あ為−は第8層
板30両面に形成した回路網4間を電気的に導通するス
ルーホールである。
3 is made of the same material as the 111-layer board with **t on both sides. It is a 113-layer board.S is a through hole for electrically conducting between the terminal portion 2 and the circuit network 4 formed on both sides of the eighth layer board 30.

6は成形後、筐体としての外皮とな)、回路網40電気
的絶縁及び物理的保護用の第1層板1.第2層板3と同
様な材質の外装板である。
6 serves as an outer skin as a housing after molding); a circuit network 40; a first layer plate 1 for electrical insulation and physical protection; This is an exterior plate made of the same material as the second layer plate 3.

第2図は、ターミナル部2を熱可璽性プラスチック板に
形成し丸部1層板lの積層接着前の状態説明図であ)゛
、同様に第3図は回路網4を形成した館2層板の説明図
である。
Fig. 2 is an explanatory diagram of the state of the terminal portion 2 formed of a thermoplastic plastic plate before lamination and adhesion of the circular one-layer plate 1), and similarly Fig. 3 shows the state of the terminal portion 2 formed of a thermoplastic plastic plate before lamination and bonding. It is an explanatory view of a two-layer board.

一般的な製造決としては、第2図に示すM1層層板とw
13図に示す第2層板3を、それぞれ電気回路パターン
との関連によシ位置決めし、溶剤あるpは接着剤にて加
圧接着する。
As a general manufacturing decision, the M1 layer plate shown in Figure 2 and w
The second layer plates 3 shown in FIG. 13 are each positioned in relation to the electric circuit pattern, and bonded under pressure using a solvent or adhesive.

ここで、電気的に導通をとる個所にドリル等で穴明けし
、多層プリント回路板の製法に適用している無電解メッ
キ法等によ)スルーホール5を形成する。′46に、外
層板6を接着剤あるーは溶剤にて加圧接着する。
At this point, holes are made using a drill or the like at locations where electrical conduction is established, and through-holes 5 are formed by electroless plating, which is applied to the manufacturing method of multilayer printed circuit boards. At '46, the outer layer plate 6 is bonded under pressure using an adhesive or a solvent.

以上の工程で得九積層鈑を150〜170″’OK加熱
し−わゆる真空成形法などkよ如所定の形状に成形する
。最後に外mr*を縁ど〉し筐体として仕上げる。
In the above steps, the laminated sheet is heated to 150 to 170'' and formed into a predetermined shape using the so-called vacuum forming method.Finally, the outside mr* is bordered and finished as a casing.

本発明の実施例では、中間層として112層板3Oみで
あるが、さらに多数枚を積層することも可能であ〉、逆
にスルーホールSの電気的、物理的保■が不要であれば
、外装板6を省くことも可能である。電気部品の回走方
法としては導電性接着剤、溶接圧接などの方法がある・
 ゛ 以上のととく本発明によれば、筐体と回路網の一体化に
よりて筐体の小型化、実装の高密度化が実現できること
のみならず、回路網が直接外気に輸れていな−ことKよ
シ、信頼性の向上が実現でき、同時に組立工数、保守工
数を低減することかで龜、この分wに対する効果は絶大
である。
In the embodiment of the present invention, only a 112-layer board 3O is used as the intermediate layer, but it is also possible to laminate a larger number of boards.On the other hand, if electrical and physical protection of the through-hole S is unnecessary, , it is also possible to omit the exterior plate 6. There are methods for moving electrical parts such as conductive adhesive and welding pressure welding.
According to the present invention, not only can the casing be made smaller and the packaging density higher by integrating the casing and the circuit network, but also the circuit network is not directly exposed to the outside air. In addition, the reliability can be improved, and at the same time, the assembly and maintenance man-hours can be reduced, which has a great effect on weight.

【図面の簡単な説明】[Brief explanation of the drawing]

館1図は本発明による電子lll5里筐体0一部断面を
食bM視図、第2図は嬉1層板lの状態説明図、第3図
はg雪層板3の状態説明図である。 lは第1層板、!はターミナル部、3は82層板4は一
路網、5はスルーホール、6は外装板である・
Figure 1 is an eclipse bM view of a partial cross section of the electronic ll5 ri housing 0 according to the present invention, Figure 2 is an explanatory diagram of the state of the 1-layer board l, and Figure 3 is an explanatory diagram of the state of the g-snow layer board 3. be. l is the first layer board,! 3 is the terminal part, 3 is the 82-layer board 4 is the one-way network, 5 is the through hole, and 6 is the exterior board.

Claims (1)

【特許請求の範囲】[Claims] 熱可塑性1ツスチツタ板を複数枚積層接着し、真空成形
波等によシ成形した電子ll器用筐体において電子部品
取付用のターミナル部を表面に形成した111層鈑と、
電子機器用プリント回路板と同様な方法にて構成した電
子回路網を片面ある―は両11に形成し丸部2層板と、
前記第1層板のターミナル部とII!2層板の回路網あ
るいは回路網間を電気的に導通するスルーホールと、第
2層板を被う回路網保讃用O外装板とから成ることを特
徴とする電子機−筐体・
A 111-layer board with terminals for mounting electronic components formed on the surface of an electronic device housing made by laminating and bonding a plurality of thermoplastic one-piece ivy boards and forming them by vacuum forming waves, etc.;
An electronic circuit network constructed in the same manner as a printed circuit board for electronic equipment is formed on both sides (11), and the round part is a two-layer board,
The terminal portion of the first layer plate and II! An electronic device housing characterized by comprising a circuit network of two-layer boards or a through hole for electrically conducting between the circuit networks, and an O exterior plate for protecting the circuit network that covers the second-layer board.
JP17411681A 1981-10-30 1981-10-30 Housing for electronic equipment Pending JPS5875899A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17411681A JPS5875899A (en) 1981-10-30 1981-10-30 Housing for electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17411681A JPS5875899A (en) 1981-10-30 1981-10-30 Housing for electronic equipment

Publications (1)

Publication Number Publication Date
JPS5875899A true JPS5875899A (en) 1983-05-07

Family

ID=15972913

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17411681A Pending JPS5875899A (en) 1981-10-30 1981-10-30 Housing for electronic equipment

Country Status (1)

Country Link
JP (1) JPS5875899A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6126295A (en) * 1984-07-09 1986-02-05 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Electric signal distributor
JPH0197486A (en) * 1987-10-09 1989-04-14 Heiwa:Kk Wiring apparatus for pinball machine

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5550696A (en) * 1978-10-06 1980-04-12 Tokyo Shibaura Electric Co Method of manufacturing multilayer printed circuit board

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5550696A (en) * 1978-10-06 1980-04-12 Tokyo Shibaura Electric Co Method of manufacturing multilayer printed circuit board

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6126295A (en) * 1984-07-09 1986-02-05 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Electric signal distributor
JPH0445998B2 (en) * 1984-07-09 1992-07-28 Intaanashonaru Bijinesu Mashiinzu Corp
JPH0197486A (en) * 1987-10-09 1989-04-14 Heiwa:Kk Wiring apparatus for pinball machine
JP2547330B2 (en) * 1987-10-09 1996-10-23 株式会社平和 Wiring device for pachinko machines

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