JPS5875235A - Operation input processor - Google Patents

Abstract

PURPOSE:To eliminate the need to detect switch input for every input block, by referring to a mask table and an input register, and thus detecting the switch input of every function. CONSTITUTION:A mask table 5 (5a, 5b...5i) stored in a memory consists of N- number of tables, which are used for masking functions 1, 2...N respectively. Each table has the same bit area with an input register 3, and in each table, mutually complementary pieces of binary information are written in a bit area assigned to a function corresponding to the table and other bit areas. In the register 3, the on-off state of one input switch is stored in each bit area. Consequently, register areas assigned to the functions of the tables 5 are selected through the tables 5 to detect only on-bit areas among those areas.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an input device used in a road information system, etc., and more particularly to an operation input processing device that processes input from an operation unit that has a large number of input switches and has multiple functions. It is.

FIG. 1 shows a block diagram of an operation input processing device that is the premise of this invention. The operation section is composed of a plurality of input sections 1, and each input section 1 is provided with a plurality of input switches 1a. The operation section is composed of one or more, and each input switch 1a
are classified according to multiple independent functions.

The processing section 2 connected to the operation section is connected to each input switch 1 described above.
A pit area allocated corresponding to a, has an input register 3 that stores the on/off state of the input switch 1a, and while the input switch 1a is on, the bit area of the input register 3 corresponding to the switch is Turn on. FIG. 2 shows the relationship between the assignments of input switches and input registers.

In this way, a normal operation input processing device has an input register 3 having at least the same number of bit areas as the number of input switches of the operation unit, and the processing unit 2 searches the on-pit area of this input register 8. The input is notified to the processing unit of the function to which the turned-on bit area belongs.

In such an operation input processing device, the conventional device divides input data into blocks for each function, and stores the start address and end address of each block in separate storage means as an address table.

Figure 3 (a) shows the configuration of the input register of this device.
B) shows the structure of an address table that manages the start address and end address of the same register.

In FIG. 3, area A1 of the input register 3 is allocated to function 1 as a block, area A2 is allocated to function 2 as a block,
Area AN represents a block in which function N is allocated. Further, the area Bl of the address table 4 stores the start address and the final address of the area AI, and the area B2/i stores the start address and the final address of the area AI.
The area BN stores the proboscis head address and the end address of the area AN.

The operating procedure of this device will be explained with reference to FIG. 4. First, step nl (hereinafter referred to as step ni)
l) reads all the contents of input register 3,
At n2, it is checked whether or not there is an on-pit in block 1, and if there is an on-pit, the input is notified to the function l processing section. The input processing is ended when this work is executed for all blocks.

However, in such conventional devices, the function blocks of the input registers were allocated using a separately prepared address table, and the input registers were divided into blocks for each function. Therefore, when adding input switches, the function corresponding to the switch is When there is a shortage of free space in a block, there are various drawbacks unless the complicated work of changing the address table and changing the allocation of the entire input register is performed. Unfortunately, since the input registers are divided into blocks for each function, each block requires a suitable empty pit area for adding input switches, which makes the use of the manual registers as a whole less efficient. It also had

This invention was made in view of the above, and does not require address management means for input registers such as an address table, and can easily and flexibly change the number of input switches without reducing the usage efficiency of input registers. The purpose is to provide an operation input processing device that can handle 0
To summarize this invention, a plurality of mask tables are provided for each function to mask register areas unrelated to the function, and switch inputs for each function are detected by referring to the mask tables and input registers. This is what I did.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 5 shows the relationship between an input register and a mask table in an operation input processing device according to an embodiment of the present invention.

In the figure, a mask table 5 (
5a, 5b to 51) are composed of N number tables, and each table is used as a mask table for function 1, function 2, and function N.

Each table has the same bit area as input register 3, and in each table, mutually contradictory binary information is written in the bit area allocated to the function that the table corresponds to, and in the other bit areas. It is. In this embodiment, .theta.' is written in the former bit area 1' and in the latter bit area.

On the other hand, in the input register 3, each bit area stores the on/off state of one input switch, as in FIG.

The operating procedure of this input processing device will be explained with reference to FIG. 6. First, the entire contents of the input register 3 are read at nlO, and the AND operation is performed between the read contents at ni+ and the mask table of function l. And the result of this AND is '1
When there is a bit area with ``, the input of that bit area is notified to the processing unit of function i. This operation is executed for all mask tables, and when i=N at n15, the input processing is completed.

As is clear from the above operation, in this input processing device, each mask table masks the register area unrelated to the function with '0' information for each function and is allocated according to the function. This method selects only the registered register area and detects the on-pit area from that area. Therefore, the input register 3 does not need to be divided into blocks for each function,
The bit areas corresponding to one function may be different.

FIG. 7 shows an example of the configuration of the input register.

That is, in this input processing device, the functional bit areas of the input register 30 are managed by the mask table 5. Therefore, the allocation of the input register 3 is no longer divided into blocks, and the vacant bit area for adding input switches, which occurs in the conventional device, can be reduced. In addition, when adding input switches, if the absolute number of bits in input register 3 is sufficient, it can be handled simply by changing the writing state of the corresponding mask table, and it is also possible to add an operation section for new functions. Even in such cases, it can be handled simply by creating a new mask table that supports this function.

As described above, according to the present invention, there is provided an operation input processing device having a flexible structure that can easily respond to increases and decreases in the area of the input switch or the functions of the operation section without reducing the usage efficiency of the input register. You can get it.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an operation input processing device which is the premise of the present invention, and FIG. 2 is a diagram showing the relationship between the allocation of input switches and input registers in the same device. 3(a) shows the configuration of the input register of the conventional operation input processing device, FIG. 3(b) shows the configuration of the address table of the device, and FIG. 4 is a flowchart showing the operating procedure of the device. be. Further, FIG. 5 is a diagram showing the relationship between the input register and the mask table in the operation input processing device which is an embodiment of the present invention, FIG. 6 is a flowchart showing the operating procedure of the device, and FIG. shows an example of the configuration of the input register of the same device. 1...Input section, 1a...Input switch,
2. Processing unit, 3. Input register, 5.
・Mask table. Applicant Tateishi Electric Co., Ltd. Agent Patent Attorney Hisashi Komori Quiver 1 Diagram (1 Figure 2 Figure 4

Claims (1)

[Claims] 1 Multiple operating units with independent functions and/or a single operating unit with multiple independent functions, and the on/off state of each input switch of this operating unit is assigned to each input switch. It has an input register that is stored in a region, and a plurality of mask tables that mask register areas unrelated to the function for each function of the operation section, and the input state of the operation section is determined by referring to the input register and mask table. An operation input processing device that detects.