JPS5872477A - Heat-sensitive recording head - Google Patents

Heat-sensitive recording head

Info

Publication number
JPS5872477A
JPS5872477A JP56171409A JP17140981A JPS5872477A JP S5872477 A JPS5872477 A JP S5872477A JP 56171409 A JP56171409 A JP 56171409A JP 17140981 A JP17140981 A JP 17140981A JP S5872477 A JPS5872477 A JP S5872477A
Authority
JP
Japan
Prior art keywords
layer
resistor
film
thickness
protective layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56171409A
Other languages
Japanese (ja)
Inventor
Michiyoshi Kawahito
川人 道善
Akira Yabushita
薮下 明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56171409A priority Critical patent/JPS5872477A/en
Publication of JPS5872477A publication Critical patent/JPS5872477A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N97/00Electric solid-state thin-film or thick-film devices, not otherwise provided for

Abstract

PURPOSE:To obtain a heat-sensitive recording head having a long life and capable of giving excellent-quality printing by providing a substantially non- steped flat protective layer over a resistor layer and a conductor layer provided on the surface of a substrate. CONSTITUTION:On an alumina substrate 1 with a graze layer 2, an undercoat layer 3 and a resistor layer 4 are formed, a wiring conductor layer 6 (Al film of a thickness of about 1mu) is formed through an adhesive layer 5 (Cr film of a thickness of about 1,000Angstrom ) on the layers 3 and 4, and then a resistor protective layer consisting of an oxidation-resistant protective layer 7 (SiO2 film of a thickness of about 3mu) and a wear-resistant protective layer (Ta2O5 film of a thickness of about 4mu) is formed over these layers to manufacture a heat- sensitive recording head. In this case, a step difference between the protective layer part located on the conductor layer 6 and the protective layer part located on the resistor layer 4 is regulated to 5,000Angstrom or less. To implement this, the protective layers are formed by a bias sputtering method in which a bias boltage of 200-1,000V is applied to the substrate.

Description

【発明の詳細な説明】 本発明は、薄膜形感熱記録ヘッドに関するものであプ、
さらには発熱抵抗体の保護層1を平坦に形成した構造を
有する発熱抵抗体に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a thin film type thermal recording head.
Furthermore, the present invention relates to a heating resistor having a structure in which the protective layer 1 of the heating resistor is formed flat.

薄膜形感熱記録ヘッドの抵抗体は、通常第1図の断面構
造を有する。1g1図において、1はアルミナ等の基板
、2は蓄熱グレーズガラス層、3は[抗体の耐エッチン
ト用アンダーコート層、4Fi発熱抵抗体層、5は発熱
抵抗体と配線導体層との接着層、6は配線導体層、7.
8は抵抗体保護層で通常7は抵抗体の耐酸化層、8は抵
抗体の耐摩耗層である。
A resistor of a thin film type thermal recording head usually has a cross-sectional structure as shown in FIG. In the 1g1 diagram, 1 is a substrate made of alumina or the like, 2 is a heat storage glaze glass layer, 3 is an anti-antibody undercoat layer, 4Fi heating resistor layer, 5 is an adhesive layer between the heating resistor and the wiring conductor layer, 6 is a wiring conductor layer; 7.
8 is a resistor protective layer, 7 is usually an oxidation-resistant layer of the resistor, and 8 is a wear-resistant layer of the resistor.

第1図の構造で、発熱抵抗体部となる10は配線導体厚
さと接着層の厚さの合計厚さ分だけ配線部11よシ低く
、凹となった形状となっている。
In the structure shown in FIG. 1, the heating resistor section 10 is lower than the wiring section 11 by the total thickness of the wiring conductor and the adhesive layer, and has a concave shape.

この凹部には、印画時の発熱抵抗体が発熱した時に印画
−紙の溶融成分がたまシ、これが非印画時冷却されてこ
の凹部に付着する。付着した紙かすは次回からの発熱で
は溶融せず、付着厚さが順次増大する。紙かすの付着量
が増大すると発熱抵抗体と印画紙の接触状態が悪くなり
、かつ発熱の印画紙への伝達も悪化し、画素の印画濃度
のばらつき。
When the heat-generating resistor generates heat during printing, molten components of the printing paper are collected in this recess, which is cooled during non-printing and adheres to the recess. The adhered paper residue will not be melted by the next heat generation, and the thickness of the adhered paper will gradually increase. As the amount of paper residue increases, the contact between the heating resistor and the photographic paper deteriorates, and the transmission of heat to the photographic paper also deteriorates, resulting in variations in the print density of pixels.

印画濃度の低下につながる。This leads to a decrease in print density.

これらの問題に対処するため、現状では発熱抵抗体への
投入電力を大きく設定する必要があシ、ひいてはこれが
発熱抵抗体の寿命を小さくする原因となっている。
In order to deal with these problems, it is currently necessary to set a large amount of power input to the heat generating resistor, which in turn shortens the life of the heat generating resistor.

また、第1図において、抵抗体保護層は凹凸のある基板
上に形成されるため、9部は大きな膜歪な有している。
In addition, in FIG. 1, since the resistor protection layer is formed on a substrate with unevenness, portion 9 has a large film strain.

このため、発熱冷却のサイクルな受けることKよ99部
に微小クラックが発生し、このクラック部から印画時に
溶融した印画紙の成分がしみこみ配線導体を腐食して、
発熱抵抗体の寿命を低下させている。
As a result, micro-cracks occur in the 99th part of the body that undergoes the heat generation and cooling cycle, and components of the photographic paper that were melted during printing seeped into the cracked part and corroded the wiring conductor.
This reduces the lifespan of the heating resistor.

本発明の目的は、上記従来技術の欠点をなくし、印画品
質の向上、寿命の延長をはかる発熱抵抗体の構造、を提
供することKToる。
SUMMARY OF THE INVENTION An object of the present invention is to provide a structure of a heating resistor that eliminates the drawbacks of the above-mentioned prior art and improves printing quality and extends its life.

本発明は、発熱抗体のフォトエツチング工程までは従来
法と同一で、−抵抗体保護層形成条件を選択するだけで
発熱抵抗体部の凹部ななくし、発熱抵抗体と配線部が平
坦化された感熱記録ヘッドができる。
The present invention is the same as the conventional method up to the photo-etching process of the heat-generating antibody, and - By simply selecting the conditions for forming the resistor protective layer, the concave part of the heat-generating resistor part is eliminated and the heat-generating resistor and the wiring part are flattened. A thermal recording head is made.

即ち、発熱抵抗体部の凹部防止法として、抵抗体保護層
の形成方法を考慮するうち、バイアススパッタ法て抵抗
体保護層を形成するととKよシ、凹凸のある基板上に平
坦化した抵抗体保護層を形成した第2図の構造を有する
発熱抵抗体を形成するに至った。
In other words, when considering the formation method of the resistor protective layer as a method for preventing recesses in the heat-generating resistor part, forming the resistor protective layer by bias sputtering is not recommended. A heat generating resistor having the structure shown in FIG. 2 with a body protection layer formed thereon was formed.

すなわち、バイアススパッタ法とは、ターゲット電極に
電力を印加する他に基板にもバイアス電圧を印加するこ
とKよシ、基板上の凸部のスパッタエッチを行ないなが
らターゲット物質をスパッタ成膜する方法である。この
場合、ターゲット電力と基板へのバイアス電圧の比を変
化することKよシ、成膜速度、成膜後の平坦度が相違す
る。
In other words, the bias sputtering method is a method in which a bias voltage is applied to the substrate in addition to applying power to the target electrode, and a target material is sputter-formed while performing sputter etching on convex portions on the substrate. be. In this case, the ratio of the target power to the bias voltage applied to the substrate is changed, the deposition rate, and the flatness after deposition are different.

第2図では抵抗体の耐酸化層としてバイアススパッタ法
で形成した酸化ケイ素(S102)を厚さ3μm、耐摩
耗層として高周波スパッタ法で形成し九五酸化タンタル
(Ta205)を厚さ4μm形成した構造を示した。
In Figure 2, silicon oxide (S102) was formed to a thickness of 3 μm by bias sputtering as the oxidation-resistant layer of the resistor, and tantalum 95 oxide (Ta205) was formed to a thickness of 4 μm by high-frequency sputtering as the wear-resistant layer. The structure was shown.

このときのバイアススパッタ条件はターゲット印加電力
4.0KW、基板への印加電力400V 、スパッタガ
スはアルゴンで圧力は5m Torrであった。
The bias sputtering conditions at this time were that the power applied to the target was 4.0 KW, the power applied to the substrate was 400 V, the sputtering gas was argon, and the pressure was 5 m Torr.

このようKして形成した発熱抵抗体は、抵抗体上への紙
かすの付着量は従来構造のものに比較して1イ。以下と
なシ、発熱抵抗体の寿命は、発熱通電パルス幅α9m5
iec、パルス周期1omsec、発熱抵抗体への印加
電力α70Wの条件で1億パルス以上の寿命があつた。
The heat generating resistor formed by heating in this manner has an amount of paper residue attached to the resistor that is 1. compared to that of a conventional structure. As below, the life of the heating resistor is the heating energization pulse width α9m5
It had a lifespan of more than 100 million pulses under the conditions of iec, pulse period of 1 omsec, and power applied to the heating resistor α70W.

また印画濃度は上記条件で初期濃度平均1.30に対し
1億パルス印加後でも濃度変化は・約4チと小さく、各
画素間の印画濃度ばらつき初期状態から・の変化は認め
られなかった。
In addition, the print density averaged 1.30 under the above conditions, but even after 100 million pulses were applied, the density change was as small as about 4 cm, and no change from the initial state was observed in the print density variation between each pixel.

ここで、抵抗体部の凹部な形成するバイアススパッタ条
件と成膜速度、成膜後の平坦化度について説明する。上
記のとうシ、゛バイアス電力を大きくすると平坦化度は
上昇するがスペッタエッチ率が大きくなルその結果成膜
速度が減少し生産効率が低下した巾下地基板側にスパッ
タダメージを与えることになシ、バイアス電力が小さい
とスパッタエッチ率が小さくなり目的とする平坦化度が
低下する。
Here, the bias sputtering conditions for forming the concave portion of the resistor portion, the film formation rate, and the degree of planarization after film formation will be explained. In the above case, ``increasing the bias power increases the planarization degree, but the sputter etch rate increases.As a result, the film formation rate decreases and the production efficiency decreases.However, there is no risk of causing sputter damage to the underlying substrate side. If the bias power is small, the sputter etch rate becomes small and the desired degree of planarization decreases.

発明者が8102に:ついて実験検討した範囲では、第
2図の接着層と配線導体層の合計厚さが1.1μmで、
ターゲットへの印加電力を4.0KNとした場合、基板
への印加バイアス電圧400v以上では成膜後の510
2は凹凸500X以下に平坦になシ、バイアス電圧20
0v条件ではその凹凸が5oaoXであった。
According to the inventor's experimental study on 8102, the total thickness of the adhesive layer and wiring conductor layer in FIG. 2 is 1.1 μm,
When the power applied to the target is 4.0 KN, if the bias voltage applied to the substrate is 400 V or more, the
2 is flat with unevenness of less than 500X, bias voltage 20
Under the 0V condition, the unevenness was 5oaoX.

以上の結果から、基板へのバイアス電圧は、コンベンシ
ョナル高周波スパッタでは200〜1onovが適当で
ある。
From the above results, the appropriate bias voltage to the substrate is 200 to 1 onov in conventional high frequency sputtering.

以下、本発明を実施例によシ説明する。The present invention will be explained below using examples.

実施例1 グレーズ層を具備し・たアルミナ基板上に、アンダーコ
ート層としてTa205膜を約125OA 、発熱抵抗
体層としてCrSi合金薄膜1200^、抵抗体と配線
層の接着層としてCr膜1oooX、  配線導体層と
してA1膜1μmを形成した後、フォトエツチング法に
よシ幅90μm長さ250μmの発熱抵抗体を形成した
Example 1 On an alumina substrate provided with a glaze layer, a Ta205 film with a thickness of about 125 OA was used as an undercoat layer, a CrSi alloy thin film with a thickness of 1200 Å was used as a heating resistor layer, a Cr film was used as an adhesive layer between the resistor and the wiring layer, and wiring After forming a 1 .mu.m thick A1 film as a conductive layer, a heating resistor having a width of 90 .mu.m and a length of 250 .mu.m was formed by photoetching.

この上層に耐酸化層として5i02膜を3μm形成した
。この5in2は基板と8102タ一ゲツト距離dOm
、IA5MHzの高周波電力4.0 K W基板側への
バイアス電圧400V 、スパッタ時アルゴシ圧力S、
Ql!I’jO1”r条件で9時間スパッタして形成し
た。
A 3 μm thick 5i02 film was formed as an oxidation-resistant layer on this upper layer. This 5in2 is the distance dOm between the board and the 8102 target.
, IA5MHz high frequency power 4.0 KW Bias voltage to the substrate side 400V, Argosi pressure during sputtering S,
Ql! It was formed by sputtering for 9 hours under I'jO1''r conditions.

さちKこの上層に耐摩耗層としてTa205 膜を4μ
m形成した。この’ra2o5は5102形成装置と同
−製電で高周波電力4.0KW、基板側へのバイアス電
圧は印加せず、12時間スパッタして形成し艷 このようにして形成した抵抗体部の形状は第2図に示す
とう夛であシ、5iO2J[厚3μmおよびTa205
膜厚4μmはそれぞれ第2図の12および13の寸法で
あシ、耐摩耗層上では発熱抵抗体部と配線部の段差は検
出できなかった。
A 4 μm Ta205 film is added as a wear-resistant layer on top of this layer.
m was formed. This 'ra2o5 was formed by sputtering for 12 hours using the same electrical manufacturing equipment as the 5102 forming apparatus, using a high frequency power of 4.0 KW and no bias voltage applied to the substrate side.The shape of the resistor part formed in this way was As shown in FIG.
The film thickness was 4 μm, which corresponded to dimensions 12 and 13 in FIG. 2, respectively, and no step difference between the heating resistor portion and the wiring portion could be detected on the wear-resistant layer.

このような構造を有する薄膜感熱記録ヘッドで、通電パ
ルス幅α9m81i10.パルス間隔10ff18eQ
 、発熱抵抗体への印加電力[170W条件で寿命試験
を行なった。このとき、初期濃度は平均1.28.発熱
素子数1728本における濃度ばらつきは±[L06で
あシ、1億パルス印加後においても平均濃度は1、24
 、濃度ばらつき±CL(38,抵抗値変化率平均4、
8 %最大45% 、最小&7%−t’あシ、実用上1
億パルス以上の寿命を確認した。
In a thin film thermosensitive recording head having such a structure, the current pulse width α9m81i10. Pulse interval 10ff18eQ
The life test was conducted under the condition that the power applied to the heating resistor was 170 W. At this time, the average initial concentration was 1.28. The concentration variation in 1728 heating elements is ±[L06, the average concentration is 1.24 even after applying 100 million pulses.
, concentration variation ± CL (38, resistance value change rate average 4,
8% maximum 45%, minimum &7%-t'foot, practical 1
Confirmed lifespan of over 100 million pulses.

実施例2 グレーズを具備したアルミナ基板上にアンダーコート層
として7a2Q、膜を約1250^1発熱抵抗層として
Cr−8i合金薄膜12oo;、抵抗体と配線層の接着
層としてCl−100OA、配線導体層としてA l 
j[1μmを形成した後、フォトエツチング法によ)幅
90μm、長さ250μmの発熱抵抗体を形成した。こ
の上層に耐酸化層として5102膜を3μm形成した。
Example 2 On an alumina substrate with a glaze, 7a2Q was used as an undercoat layer, the film was about 1250^1, Cr-8i alloy thin film was used as a heating resistance layer, Cl-100OA was used as an adhesive layer between the resistor and the wiring layer, and the wiring conductor was used. Al as a layer
A heating resistor having a width of 90 μm and a length of 250 μm was formed (by photoetching after forming a resistor of 1 μm). On this upper layer, a 3 μm thick 5102 film was formed as an oxidation-resistant layer.

この5102は基板とターゲットの距離60■、ターゲ
ットへの投入電力4.0KW。
In this 5102, the distance between the board and the target is 60cm, and the power input to the target is 4.0KW.

基板へのバイアス電圧200V、スパッタ時のアルゴン
圧力!L OmTorr条件で7時間スパッタして形成
した。
Bias voltage to substrate 200V, argon pressure during sputtering! It was formed by sputtering under L OmTorr conditions for 7 hours.

さらKこの上層に耐摩耗層として’ra2o、膜を4μ
m形成した。このTa2O,は5102形成装置と同一
装置で高周波電力4.0KW、基板側へのバイアス電圧
は印加せず、12時間スパッタして形成した。
Furthermore, on this upper layer, a 4μ film of 'ra2o' is applied as an abrasion resistant layer.
m was formed. This Ta2O was formed by sputtering for 12 hours using the same apparatus as the 5102 forming apparatus at a high frequency power of 4.0 KW and no bias voltage applied to the substrate side.

このようにして形成した抵抗体の形状は第3図に示すと
うシであシ、この場合8102膜厚3μmおよび?a2
0.膜厚4μmは第3図の12および13の方法であっ
た。
The shape of the resistor thus formed is a cylinder as shown in FIG. a2
0. The film thickness was 4 μm using methods 12 and 13 in FIG.

第3図のとと< l1la2Q5上層の′発熱抵抗体部
と配線部の段差は約5oooXであシ、従来の高周波ス
パッタで形成したときの段差1μmよ)大幅に小さい。
The difference in height between the heating resistor part and the wiring part in the upper layer of FIG.

またステ、プヵパレージ性は、第3図の14の形状とな
シ、従来法の第1図の9の形状に比較して、抵抗体と配
線部接点近辺の凹部は大幅に改善された。
In addition, in terms of step and clearance properties, the concave portion near the contact between the resistor and the wiring portion was significantly improved compared to the shape 14 in FIG. 3 and the shape 9 in FIG. 1 of the conventional method.

本方法で形成した薄膜感熱記録ヘッドで、通電パルス幅
n9maeo 、パルス周期1omega 、発熱抵抗
体への印加電力α6OW条件で寿命試験を行なった。こ
のとき、初期濃度は平均1.08 、発熱素子数172
8本における濃度ばらつきは士α08であシ、1億パル
ス印加後においても平均濃、[1,05、濃度ばらつき
±109.抵抗値平均変化率2.1%。
A life test was conducted on the thin film thermosensitive recording head formed by this method under the conditions of a current pulse width of n9 maeo, a pulse period of 1 omega, and a power applied to the heating resistor of α6OW. At this time, the average initial concentration was 1.08, and the number of heating elements was 172.
The density variation in the 8 lines was α08, and even after applying 100 million pulses, the average density was [1,05, and the density variation was ±109. Average rate of change in resistance value is 2.1%.

最大&59g、最小1.7%でTo#)、また1億パル
ス印加後でも第3図の15の部分に微小なりラックも発
生しなかった。
(maximum &59g, minimum 1.7% To#), and even after applying 100 million pulses, no slight rack was generated in the part 15 in Fig. 3.

以上説明したごとく、抵抗体保膜層上面において、発熱
抵抗体部と配線導体部の段差を5000A以下とした。
As explained above, on the upper surface of the resistor film-holding layer, the height difference between the heating resistor portion and the wiring conductor portion was set to be 5000 A or less.

本発明法によれば、発熱抵抗体の寿命は1億パルス以上
となシ、この値は従来法の5000万パルスに比較し、
5倍以上の寿命となった。また、印加濃度ばらつきも1
億パルス印加後で±7慢以内と大幅に改善された。
According to the method of the present invention, the life of the heating resistor is 100 million pulses or more, which is compared to 50 million pulses of the conventional method.
The lifespan is more than 5 times longer. Also, the applied concentration variation is 1
After applying 100,000,000 pulses, it was significantly improved to within ±7.

なお、本発明では抵抗体保護層として5102゜Ta2
es Kついて説明したが、他の材料、たとえば窒化シ
リコン、シリコンカーパイ等においても、抵抗体保膜層
上面で発熱抵抗体部と配線部に段差5000A以内の構
造であれば、同様の効果は期待されるものである。
In addition, in the present invention, 5102° Ta2 is used as the resistor protective layer.
Although we have explained about ES K, the same effect can be obtained with other materials such as silicon nitride and silicon carbide, as long as the height difference between the heating resistor part and the wiring part is within 5000A on the top surface of the resistor protective film layer. This is to be expected.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来法における発熱抵抗体部の平面図、第2図
、第3図は本発明の、バイアススパッタ法で抵抗体保護
層を形成した場合の発熱抵抗体部の平面図である。 1・・・・・・アルミナ基板 2・・・・・・グレーズ層 3・・・・・・アンダーコート層 、4・・・・・・抵抗体層 5・・・・・・接着層 。 6・・・・・・配線導体層 7・・・・・・耐酸化保膜層 8・・・・・・耐摩耗保護層 9・・・・・・ステップカバレージ部 10・・・・・・発熱抵抗体部 11・・・・・・配線部 12・・・・・・耐酸化層の膜厚測定位置13・・・・
・・耐摩耗層の膜厚測定位置才 / 因 才2 図 )X3
FIG. 1 is a plan view of a heat generating resistor section according to a conventional method, and FIGS. 2 and 3 are plan views of a heat generating resistor section according to the present invention when a resistor protective layer is formed by bias sputtering. 1... Alumina substrate 2... Glaze layer 3... Undercoat layer, 4... Resistor layer 5... Adhesive layer. 6... Wiring conductor layer 7... Oxidation-resistant protective film layer 8... Wear-resistant protective layer 9... Step coverage portion 10... Heat generating resistor section 11...Wiring section 12...Oxidation-resistant layer thickness measurement position 13...
・・Position for measuring the thickness of the wear-resistant layer

Claims (1)

【特許請求の範囲】[Claims] 基板と、この基板上に形成された抵抗体層、導体層、こ
の抵抗体層とこの導体層が被覆されるように形成された
保護層からな)、かつ、抵抗体層上に位置する保護層と
導体層上に位置する保護層の段差が5000′A以下で
あることを特徴とする感熱記録ヘッド。
a substrate, a resistor layer formed on the substrate, a conductor layer, a protective layer formed to cover the resistor layer and the conductor layer), and protection located on the resistor layer; A thermal recording head characterized in that the step difference between the layer and the protective layer located on the conductor layer is 5000'A or less.
JP56171409A 1981-10-28 1981-10-28 Heat-sensitive recording head Pending JPS5872477A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56171409A JPS5872477A (en) 1981-10-28 1981-10-28 Heat-sensitive recording head

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56171409A JPS5872477A (en) 1981-10-28 1981-10-28 Heat-sensitive recording head

Publications (1)

Publication Number Publication Date
JPS5872477A true JPS5872477A (en) 1983-04-30

Family

ID=15922605

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56171409A Pending JPS5872477A (en) 1981-10-28 1981-10-28 Heat-sensitive recording head

Country Status (1)

Country Link
JP (1) JPS5872477A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103946028A (en) * 2011-11-28 2014-07-23 京瓷株式会社 Thermal head and thermal printer provided with same
JP2015006791A (en) * 2013-05-27 2015-01-15 京セラ株式会社 Thermal head and thermal printer including the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103946028A (en) * 2011-11-28 2014-07-23 京瓷株式会社 Thermal head and thermal printer provided with same
US9238376B2 (en) 2011-11-28 2016-01-19 Kyocera Corporation Thermal head and thermal printer equipped with the same
CN103946028B (en) * 2011-11-28 2016-01-20 京瓷株式会社 Thermal head and possess the thermal printer of this thermal head
JP2015006791A (en) * 2013-05-27 2015-01-15 京セラ株式会社 Thermal head and thermal printer including the same

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