JPS5871250U - Stereo receiver blend circuit - Google Patents

Stereo receiver blend circuit

Info

Publication number
JPS5871250U
JPS5871250U JP16502481U JP16502481U JPS5871250U JP S5871250 U JPS5871250 U JP S5871250U JP 16502481 U JP16502481 U JP 16502481U JP 16502481 U JP16502481 U JP 16502481U JP S5871250 U JPS5871250 U JP S5871250U
Authority
JP
Japan
Prior art keywords
field effect
transistor
circuit
effect transistor
blend
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16502481U
Other languages
Japanese (ja)
Other versions
JPS6238366Y2 (en
Inventor
栗田 徹
Original Assignee
ソニー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソニー株式会社 filed Critical ソニー株式会社
Priority to JP16502481U priority Critical patent/JPS5871250U/en
Publication of JPS5871250U publication Critical patent/JPS5871250U/en
Application granted granted Critical
Publication of JPS6238366Y2 publication Critical patent/JPS6238366Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Stereo-Broadcasting Methods (AREA)
  • Noise Elimination (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案によるブレンド回路を使用し得るラジオ
受信機の一例を示すブロック図、第2図は従来のブレン
ド回路の一例を示す接続図、第3図は本考案によるブレ
ンド回路を示す接続図である。 5L、  6Rは左右信号の伝送路、13は電界効果ト
ランジスタ、14はブレンド素子、1−6はPNP)ラ
ンジスタ、17はスイッチング信号の入力端子である。
Fig. 1 is a block diagram showing an example of a radio receiver that can use the blend circuit according to the present invention, Fig. 2 is a connection diagram showing an example of a conventional blend circuit, and Fig. 3 is a connection diagram showing the blend circuit according to the present invention. It is a diagram. 5L and 6R are transmission paths for left and right signals, 13 is a field effect transistor, 14 is a blend element, 1-6 are PNP transistors, and 17 is a switching signal input terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ステレオ復調回路よりの左信号及び右信号の伝送路間に
、電界効果トランジスタとブレンド素子とを直列に接続
し、上記電界効果トランジスタを、そのゲートにスイッ
チング信号を供給することによりオン又はオフさせるよ
うにしたステレオ受信機のブレンド回路において、正極
性電位及び接地電位の制御信号が印加されるスイッチン
グ信号の入力端子と、該入力端子にベースが接続されて
なるPNP )ランジスタとを有し、該トランジスタの
エミッタを接地し、そのコレクタを上記電界効果トラン
ジスタのゲートに接続すると共に、抵抗器を通じて負極
性電源に接続し、上記PNP )ランジスタのベースを
抵抗器を通じて上記負極性電源に接続してなるステレオ
受信機のブレンド回路。
A field effect transistor and a blend element are connected in series between the transmission paths of the left signal and right signal from the stereo demodulation circuit, and the field effect transistor is turned on or off by supplying a switching signal to its gate. A blend circuit for a stereo receiver configured as described above includes a switching signal input terminal to which control signals of positive polarity potential and ground potential are applied, and a PNP transistor whose base is connected to the input terminal, and the transistor The emitter of the PNP transistor is grounded, the collector thereof is connected to the gate of the field effect transistor, and also connected to the negative power supply through a resistor, and the base of the PNP transistor is connected to the negative power supply through the resistor. Receiver blending circuit.
JP16502481U 1981-11-05 1981-11-05 Stereo receiver blend circuit Granted JPS5871250U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16502481U JPS5871250U (en) 1981-11-05 1981-11-05 Stereo receiver blend circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16502481U JPS5871250U (en) 1981-11-05 1981-11-05 Stereo receiver blend circuit

Publications (2)

Publication Number Publication Date
JPS5871250U true JPS5871250U (en) 1983-05-14
JPS6238366Y2 JPS6238366Y2 (en) 1987-09-30

Family

ID=29957233

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16502481U Granted JPS5871250U (en) 1981-11-05 1981-11-05 Stereo receiver blend circuit

Country Status (1)

Country Link
JP (1) JPS5871250U (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS528704A (en) * 1975-07-09 1977-01-22 Sony Corp Fm receiver
JPS5464408U (en) * 1978-10-09 1979-05-08
JPS55121548U (en) * 1979-02-22 1980-08-28

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS528704A (en) * 1975-07-09 1977-01-22 Sony Corp Fm receiver
JPS5464408U (en) * 1978-10-09 1979-05-08
JPS55121548U (en) * 1979-02-22 1980-08-28

Also Published As

Publication number Publication date
JPS6238366Y2 (en) 1987-09-30

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