JPS58699B2 - Carrier regeneration circuit for multilevel carrier digital signals - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a carrier recovery circuit for multilevel carrier digital signals.

Various signal allocation methods have been studied for multilevel carrier digital transmission systems.

FIG. 1a shows a vector diagram of a four-level QAM signal as an example, and various methods can be considered for obtaining such a modulated signal.

For example, the amplitude ratio of the 4-phase PSK signal (first path) shown in FIG. 1 and the 4-phase PSK signal (second path) shown in FIG.
1 (see Ishio et al.: "A method of multi-phase multi-value carrier digital communication" IEICE communication method study group material C374-158).

Various demodulation methods can be considered, and an example of a known demodulation circuit is shown in FIG.

In Fig. 2, 1 is a 4-level QAM signal input terminal;
is a four-phase phase detector, 3 is an identification regenerator, 4 is a remodulator, 5
1 is a phase comparator, 6 is a loop filter, and 7 is a voltage controlled oscillator, which constitute a so-called remodulation comparison type oscillation transmission regeneration circuit (indicated by a dotted line in FIG. 2).

Further, 8 is a subtraction circuit, 9 is a 4-phase phase demodulation circuit, 10, 1
1, 12, and 13 are baseband pulse output terminals.

In the circuit shown in Fig. 2, when the 4-level QAM signal shown in Fig. 1 is received, the 4-phase PSK signal on the second path can be considered to be a type of interference wave, so the remodulation comparison type carrier wave regeneration circuit The baseband pulse train corresponding to the first path signal is reproduced from terminals 10 and 11 in phase synchronization with the first path four-phase PSK signal having a large value.

Furthermore, since the first path signal is reproduced at the output of the remodulator 4, the second path signal is obtained at the output of the subtraction circuit 8.

If this is demodulated by the 4-phase phase demodulation circuit 8, the terminals 12, 1
3, a baseband pulse train corresponding to the second pass signal is reproduced.

As is clear from the above explanation, in this carrier wave regeneration circuit, the first path regenerated 4-phase PSK signal and the received 4-level Q
A control voltage for the voltage controlled oscillator is obtained by comparing the phase with the AM signal.

In this case, the phase comparison characteristic is the signal combination 51 in FIG.
(S11, S22, S33.544), S2, (S12
, S23, S34.541), 53(S13.S24,
S31, 542), 54 (S14, S21.S32.5
43) can be obtained as the sum of the phase comparison characteristics of each of the four four-phase PSK signals.

It is well known that when a remodulation comparison type transmitted wave regeneration circuit is used, the phase comparison characteristic of a four-phase PSK signal becomes a sharp tooth.

Also, as is clear from Figure 1, when using the S3 signal as a reference, the S1 signal has an amplitude of 3 times and a phase difference of 0, the S2 signal has an amplitude of √5 times and a phase difference of α, and the S4 signal has an amplitude of √5 times and a phase difference of 0. Phase difference -
Since it is a 4-phase PSK signal of α, based on the phase comparison characteristic (S3) of the S3 signal, the phase comparison characteristic (S3) of the S1 signal (
SL) has three times the amplitude and the same phase, and the phase comparison characteristic of the S2 signal (S2) has the amplitude √5 times and the phase is advanced by α,
The phase comparison characteristic (S4) of the S4 signal has an amplitude of √5 times and a phase delayed by α.

In FIG. 3, the phase error (θe) between the S3 signal and the reproduced carrier wave is plotted on the horizontal axis.

S2. S3. Shows S4.

Therefore, in the case of a 4-level QAM signal, the signal becomes ε in FIG.

In FIG. 3, the phase error θe on the horizontal axis shows the characteristics in the range of 1π/4 to π/4, and is calculated assuming that the probability of occurrence of each signal is equal.

In FIG. 3, θe=0. ±θo is a stable point (stable entrainment phase), and is an unstable point (unstable entrainment phase).

Therefore, θ.

In addition to the regular stable point of =0, there is an undesirable stable point (pseudo-assumed phase) of θe=±θo, so θe=
There may be cases where it is pulled to ±θo.

When the signal is pulled into such a pseudo pull-in phase, the reference carrier wave has a phase error of ±θo, so the code error rate deteriorates and, in some cases, a line failure occurs.

Note that the above explanation is for the re-modulation comparison type transmitted wave regeneration circuit, but it is also applicable to the case of the re-modulation comparison type transmitted wave regeneration circuit.
It is well known that carrier wave regeneration circuits such as the Decision Feedback type have similar phase comparison characteristics, and similar problems occur.

The present invention aims to eliminate the drawbacks of the above-mentioned prior art and to provide a regeneration circuit capable of regenerating a carrier wave having only a normal pull-in phase.

FIG. 4 is an electrical block diagram for explaining one embodiment of the present invention. In the figure, 1 to 8 and 10° 11 correspond to each part in FIG. 2, 21 is an absolute value circuit, 22 is a discrimination circuit, 23 is a pulse generation circuit, and these 21 to 2
3 constitutes a pseudo attraction phase detection circuit.

In this circuit, the output of the loop filter 6 is branched into two branches, one of which is directly connected to the voltage controlled oscillator γ, and the other to the absolute value circuit 21.

The output of the absolute value circuit 21 is judged by a judgment circuit 22 at an appropriate level, and when the level is large, "1" is output, and when it is small, "0" is output.

The pulse generator 23 supplies positive and negative pulses of appropriate magnitude to the voltage controlled oscillator 7 only when "1" is received.

In the circuit shown in FIG. 4, the output ε' of the absolute value circuit 21 is as clear from the above explanation as S1, S2, . Since it can be determined as the sum of the absolute values of S3°S4, it becomes as shown in FIG.

In Fig. 5, the horizontal axis is the phase error, and θe=0 and θ
When e=±θo, the value of ε (indicated by B and C in the figure) is different.

Therefore, the discrimination level of the discrimination circuit 22 is A(B) shown in the figure.
<A<C), when θe=±θo, “
1'' is output, and positive and negative pulses are supplied from the pulse generator 23 to the voltage controlled oscillator 7.

The amplitude of the pulse is shown as D in Fig. 6 and has a magnitude of E<D<
F) (however, ±E and ±F are the values of ε when θe=±β).

Therefore, as shown in FIG. 6, when in the retracted state θo, when a positive pulse is supplied, the phase shifts to θ2 corresponding to ε=D, and when the pulse disappears, it returns to the original phase θo. Next, when a negative pulse is supplied, the pulse size D
Since D>E, it passes through the unstable point β and transitions to the phase -01 corresponding to ε=-D, and when the pulse disappears, θe
= 0 normal phase.

Similarly, when in a state of attraction of -θo, a negative pulse returns to θe = -θo, but a positive pulse passes through the unstable point -β and transitions to phase θ1 corresponding to ε = D, and when the pulse disappears, It is drawn into the normal phase of θe=0.

On the other hand, when the phase is pulled into the normal phase of θe=0, no pulse is generated in the output of the discrimination circuit 22, so the voltage controlled oscillator 7 maintains that state.

In this manner, according to this embodiment, even if the phase is pulled into an undesirable pseudo-pulling phase, it can be detected and the phase can be pulled into a normal phase.

Although this embodiment uses the absolute value of the loop filter output, it is clear that the same effect can be obtained by using the square value or the peak value.

FIG. 7 is an electrical block diagram for explaining another embodiment of the present invention, in which 1 to 8 and 10.11 are the second
Corresponding to each part of 1 to 8 and 10 and 11 in the figure,
31 is a pulse generator.

In this embodiment, the voltage controlled oscillator 7 is supplied from the pulse generator 31 with positive and negative pulses of varying amplitude alternately for a certain period of time, or with successive stop pulses followed by negative pulses. supplying.

Therefore, as described in the embodiment shown in FIG.
In the case of synchronization with the pseudo-pulling phase of , the phase is shifted by each positive pulse and then pulled into the normal phase of θe=0.

On the other hand, when the phase is pulled into the normal phase, the amplitude is small even when positive and negative pulses are applied, so the unstable point β or -β
The phase transitions to θ1 or -θ1 without passing through, and returns to the normal phase again when the pulse disappears.

As described above, according to this embodiment, the circuit can be pulled into the normal phase without having to determine the pulling phase as in the embodiment shown in FIG. It can be measured.

In this embodiment, the sending period, pulse width, amplitude, etc. of the pulses supplied from the pulse generator 31 may be determined based on the pull-in time required by the line, stability of circuit operation, etc.

As described above, according to the present invention, a reference carrier wave having a normal phase can be stably obtained in a carrier wave regeneration circuit for a multilevel carrier digital signal without synchronizing with an undesirable pseudo pull-in phase.

Although the above explanation deals with a 4-level QAM (16-value) signal, it is understood that the present invention is generally applicable to multi-value signals of 16 or more values or other multi-value signal arrangement signals. it is obvious.

[Brief explanation of drawings]

Fig. 1 is a vector diagram of a 4-level QAM signal, Fig. 2 is an explanatory diagram of a conventional 4-level QAM signal demodulation circuit, Fig. 3 is a phase comparison characteristic diagram of the carrier regeneration circuit included in Fig. 2, and Fig. 4
The figure is an electrical block diagram for explaining the first embodiment of the present invention, FIGS. 5 and 6 are diagrams for explaining the operation of the circuit in FIG. 4, and FIG. 7 is an electrical block diagram for explaining the first embodiment of the present invention. FIG. 2 is an electrical block diagram for explaining an example. 1...Signal input terminal, 2...4-phase phase detector, 3...Discrimination regenerator, 4...Remodulator, 5... ... Phase comparator, 6 ... Loop filter, 7 ... Voltage controlled oscillator, 8 ...
...subtraction circuit, 9...four-phase phase demodulation circuit,
10.11.12, 13... Baseband pulse output terminal, 21... Absolute value circuit, 22...
...Discrimination circuit, 23゜31...Pulse generator.

Claims (1)

[Scope of Claims] 1. In a demodulation circuit that synchronously detects and identifies and reproduces in-phase components and quadrature components of a received signal using a reference carrier wave, a signal obtained by re-modulating the reference carrier wave with the output of the demodulation circuit and the received signal When the absolute value of the phase comparison output exceeds a certain discrimination level, positive and negative pulses are sent to the carrier wave regeneration circuit that drives a voltage controlled oscillator with this output to reproduce the reference carrier wave. A carrier wave regeneration circuit for multi-level carrier wave digital signals, which is equipped with a pseudo pull-in phase detection circuit that supplies a controlled oscillator. 2. In a demodulation circuit that synchronously detects and identifies and reproduces the in-phase and quadrature components of a received signal using a reference carrier wave, the phase of the received signal is compared with the signal obtained by re-modulating the reference carrier wave with the output of the demodulation circuit, and Carrier wave regeneration for multilevel carrier digital signals, which includes a carrier wave regeneration circuit that drives a voltage controlled oscillator with its output to regenerate the reference carrier wave, and a pulse generator that supplies positive and negative pulses to the voltage controlled oscillator for a certain period of time. circuit.