JPS5868763U - Binary signal regeneration circuit - Google Patents
Binary signal regeneration circuitInfo
- Publication number
- JPS5868763U JPS5868763U JP16281081U JP16281081U JPS5868763U JP S5868763 U JPS5868763 U JP S5868763U JP 16281081 U JP16281081 U JP 16281081U JP 16281081 U JP16281081 U JP 16281081U JP S5868763 U JPS5868763 U JP S5868763U
- Authority
- JP
- Japan
- Prior art keywords
- binary signal
- threshold level
- level
- facsimile image
- image signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Facsimile Image Signal Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案の一実施例における２値信号再生回路の
回路構成図、第２図は同回路の作用説明に用いるための
信号波形図、第３図は従来回路により得られる２値信号
の信号波形図である。
１０・・・第１のレベル比較回路、２０・・・第２のレ
ベル比較回路、３０・・・フリップフロップ。Fig. 1 is a circuit configuration diagram of a binary signal reproducing circuit according to an embodiment of the present invention, Fig. 2 is a signal waveform diagram used to explain the operation of the circuit, and Fig. 3 is a binary signal obtained by a conventional circuit. FIG. 10...First level comparison circuit, 20...Second level comparison circuit, 30...Flip-flop.
Claims (1)
を再生する２値信号再生回路において、前記ファクシミ
リ画信号の基準レベルより正極側に第１のしきい値レベ
ルとこの第１のしきい値レベルより正極側に第２のしき
い値レベルとを各々設定すると共に、前記基準レベルよ
り負極側に第３のしきい値レベルとこの第３のしきい値
レベルより負極側に第４のしきい値レベルとを各々設定
し、前記ファクシミリ画信号が上記第２若しくは第４の
しきい値レベルを越えたとき所定レベルの２値信号を発
生し、かつ上記第２若しくは第４のしきい値レベルを越
えたファクシミリ画信号が上記第１若しくは第３のしき
い値レベル以下になるまで上記２値信号のレベルを保持
する構成としたことを特徴とする２値信号再生回路。In a binary signal reproducing circuit that reproduces a binary signal from a facsimile image signal demodulated by a demodulating circuit, a first threshold level is located on the positive side of the reference level of the facsimile image signal; A second threshold level is set closer to the positive side, a third threshold level is set closer to the negative side than the reference level, and a fourth threshold is set closer to the negative side than the third threshold level. and a binary signal of a predetermined level is generated when the facsimile image signal exceeds the second or fourth threshold level; A binary signal reproducing circuit characterized in that the level of the binary signal is maintained until the facsimile image signal exceeding the threshold level falls below the first or third threshold level.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16281081U JPS5868763U (en) | 1981-10-31 | 1981-10-31 | Binary signal regeneration circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16281081U JPS5868763U (en) | 1981-10-31 | 1981-10-31 | Binary signal regeneration circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5868763U true JPS5868763U (en) | 1983-05-10 |
Family
ID=29955115
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16281081U Pending JPS5868763U (en) | 1981-10-31 | 1981-10-31 | Binary signal regeneration circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5868763U (en) |
-
1981
- 1981-10-31 JP JP16281081U patent/JPS5868763U/en active Pending
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