JPS5867029A - Semiconductor manufacturing device - Google Patents

Semiconductor manufacturing device

Info

Publication number
JPS5867029A
JPS5867029A JP16656381A JP16656381A JPS5867029A JP S5867029 A JPS5867029 A JP S5867029A JP 16656381 A JP16656381 A JP 16656381A JP 16656381 A JP16656381 A JP 16656381A JP S5867029 A JPS5867029 A JP S5867029A
Authority
JP
Japan
Prior art keywords
etching
substrate
gas
cooling gas
processed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16656381A
Other languages
Japanese (ja)
Inventor
Shuzo Fujimura
藤村 修三
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16656381A priority Critical patent/JPS5867029A/en
Publication of JPS5867029A publication Critical patent/JPS5867029A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To reduce variability of processing condition, by a method wherein a substrate to be processed is contacted directly with cooling gas. CONSTITUTION:A target electrode is set at lower section, and a cooling gas conduit that has a jet nozzle 15 is connected to a vacuum container 14 that has an etching gas conduit 12 and exhaust pipe 13. Pressured cooling gas is gusted into an etching room 14 through the jet nozzle 15, causing collision of cooled gas due to Joule effect against the substrate 17, to cool it. As the cooling gas is directly released in the etching room 14, some composition consisting of the same as the etching gas or the main composition of the etching gas must be used as cooling gas in order not to exert influence on the etching. The quantity of the gas must be less than one tenth of the etching gas. In addition, the quantity of the cooling gas should be reduced by gusting it intermittently. The jet nozzle must be faced directly towards the center of the substrate 17. The distance S from the nozzle to the substrate 17 must be covered enough not to generate temperature profiles.

Description

【発明の詳細な説明】 本発明は半導体製造装置に係り、特に半導体製造装置に
於ける被処理基板の冷却手段に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to semiconductor manufacturing equipment, and particularly to a means for cooling a substrate to be processed in a semiconductor manufacturing equipment.

半導体装置を製造する際に用いるプラズマ・エツチング
装置、プラズマ・デボクシ1ン装置、スパッタリング装
置等lこ於ては、処理中にイオン、ラジカル、荷電粒子
等で被処理基板面が叩かれるためにその温kが上昇し、
エツチング・レート、デポジション・レート、スパッタ
膜質等が変動するという問題がある。そこで上記被処理
基板の温度上昇を抑えるために、従来例えばプラズマ・
エツチング装置(リアクティブ・イオンエツチング装#
)番こ於ては、第1図に示すような液冷機構を持つエツ
チング・ターゲットが使用されていた。
In plasma etching equipment, plasma deboxing equipment, sputtering equipment, etc. used when manufacturing semiconductor devices, the surface of the substrate to be processed is bombarded with ions, radicals, charged particles, etc. during processing. temperature k rises,
There is a problem that the etching rate, deposition rate, sputtered film quality, etc. vary. Therefore, in order to suppress the temperature rise of the substrate to be processed, conventional methods such as plasma
Etching equipment (reactive ion etching equipment #
), an etching target with a liquid cooling mechanism as shown in Figure 1 was used.

なお第1図に於て1はステンレス等からなるターゲット
、2はターゲット支軸、3は冷却液導入管、4は冷却液
排出路、5は液流分配手段、6は液流、7は絶縁物から
なる試料ステージ、8は被処理基板を示す。そしてター
ゲット内憂こ流通せしめた水成るいは有機系冷却液(エ
チレン・グリコール等)によってターゲット1及び試料
ステージ7を介して被処理基板8の冷却がなされていた
。しかし上記従来の冷却方法に於ては、被処理基板がタ
ーゲット、試料ステージ等を介して間接的に冷却される
ので冷却速度が遅く、又その冷却効率も試料ステージ面
の仕上がり、被処理基板の反り、被処理基板裏面の仕上
がり等の状態によって変動する。
In Fig. 1, 1 is a target made of stainless steel or the like, 2 is a target support shaft, 3 is a coolant inlet pipe, 4 is a coolant discharge passage, 5 is a liquid flow distribution means, 6 is a liquid flow, and 7 is an insulation. A sample stage 8 is a substrate to be processed. The substrate 8 to be processed is cooled via the target 1 and the sample stage 7 by water or an organic cooling liquid (ethylene glycol, etc.) that is circulated within the target. However, in the above conventional cooling method, the substrate to be processed is indirectly cooled through the target, sample stage, etc., so the cooling rate is slow, and the cooling efficiency is also affected by the finish of the sample stage surface and the thickness of the substrate to be processed. It varies depending on conditions such as warpage and finish of the back surface of the substrate to be processed.

従ってエツチング処理中壷こ被処理基板の温度上昇が激
しく、又エツチング・レートも基板ごとにばらつくとい
う問題があった。又一方最近微細ノくターン形成の際f
こ適用される電子ビーム・リングラフィに於ては、ポリ
メチルメタアクリレート(PM臥)、ポリグリシジルメ
タアクリレート(PMGA)咎ビニール重合によって合
成されたポリマを主成物とするレジストが使用されるが
、これらII I zレジストは温度上昇ζこより急激
に灰化レートが増大し、そのマスク性が失われたり、又
灰化反応の生成物のため正こ更に被エツチング物質のエ
ツチング・レートが変動する等の問題があり、上記従来
構造のエツチング装置ではこれら電子ビーム露光用ボl
レジストをマスク膜に用いてエツチング処理を行うこと
が極めて困難であった。
Therefore, during the etching process, the temperature of the substrate to be processed increases rapidly, and the etching rate also varies from substrate to substrate. On the other hand, recently when forming fine nodules, f
In this applied electron beam phosphorography, resists whose main constituents are polymethyl methacrylate (PM), polyglycidyl methacrylate (PMGA), and polymers synthesized by vinyl polymerization are used. , the ashing rate of these II Iz resists increases rapidly due to temperature rise, resulting in loss of masking properties, and furthermore, the etching rate of the material to be etched fluctuates due to the products of the ashing reaction. There are problems such as, in the etching apparatus of the conventional structure, these electron beam exposure holes
It has been extremely difficult to perform etching using a resist as a mask film.

父上記以外に、上記従来構造のターゲットを用いたイオ
ンビーム嗜エツチング装置に於ても前述のような被処理
基板の温度上昇及びそのばらつきは、エツチング・レー
ト変動の原因普こなり、プラズマ・デポジション装置に
於てはデボクシ1ン膜厚のばらつきの原因になり、スパ
ッタリング装置に於てはスパッタ膜質変動の原因−こな
る。
In addition to the above, even in ion beam etching equipment using targets with the conventional structure, the temperature rise and variation in the temperature of the substrate to be processed as described above is a common cause of etching rate fluctuations. In position equipment, this causes variations in deboxing film thickness, and in sputtering equipment, it causes variations in sputtered film quality.

本発明は上記問題点に鑑み、優れた冷却効率を有し、且
つ冷却効率の変動の少ない被処理基板の冷却手段を有す
る半導体製造装置を提供することを目的とする。
SUMMARY OF THE INVENTION In view of the above-mentioned problems, an object of the present invention is to provide a semiconductor manufacturing apparatus having a means for cooling a substrate to be processed, which has excellent cooling efficiency and less variation in cooling efficiency.

即ち本発明は半導体製造装置に於て、ジエール・トムソ
ン効果により冷やさnた気体を、速力)ζこ被処理基板
に吹きつける機構を具備せしめてなることを特徴とTる
O 以下本発明を実施例について、第2図に示す一実施例の
要部断面模式図、及び第3図iこ示す他Q)一実施例に
於ける要部断面模式図を用G)で詳細番こ説明する・ 第2図は本発明をリアクティブ・イオンエツチング装置
番こ適用した一実施例を示したもQ)であるO即ち本発
明の構造擾こ於ては下部曇こターゲット電極11が配設
され、エツチング・ガス導入管12及び排気管13を有
し、ステンレス等の金属力)らなる通常構造の真空容器
(エツチング室)14(こ、更に冷却ガス噴出孔15を
先端に有する冷却ガス導入管16が追加配設される。そ
して該冷却ガス導入管16内べ送入されたl〜3 (K
l /crt? )程度の加圧冷却ガスを、冷却ガス噴
出孔15を介して10−” (Torr )程度に減圧
されてG)るエツチング室14内に噴出させ、ジ象−ル
・トムソン効果により冷却された該冷却ガスを被処理基
板17iIに衝突させて該基板面の冷却を行う。従って
冷却ガスが直か(こエツチング室14内に放出されるわ
けであるから、エツチングの条件に影Itを及ぼさない
ために、エツチング・ガスと同−組成若しくはその主成
分ガスを冷却ガスとして用いガス量は多くトモエツチン
グφガスのl/10以下にする必要があり、更をこ冷却
ガスの噴出を間欠的に行うことにより冷却ガス量を減少
せしめることがより望ましい。又冷却ガス噴出孔15は
被処理基板17面の中央1こ向って開口せしめられ、該
噴田孔15と基板17面との距離Sは基板17面に温度
分布を生ぜしめないよう、冷却ガスが基板17面全面を
覆うに充分な距離例えば50〜10100(l1程度が
適切である。従って冷却ガス噴出孔15はプラズマ領域
18内iこ位置するよう4こなるので、プラズマを乱さ
ないために冷却ガス導入管16は接地電極となる真空容
器14と絶縁する(19aは絶縁プツシa−)必要があ
り、該冷却ガス導入v16を石英等の絶縁物で形成する
ことは更擾こ鎚ましい。
That is, the present invention is characterized in that a semiconductor manufacturing apparatus is equipped with a mechanism for blowing a gas cooled by the Zierre-Thompson effect onto a substrate to be processed at a high speed. For example, a schematic cross-sectional view of the main part of an embodiment shown in FIG. 2, and a schematic cross-sectional view of the main part of an embodiment shown in FIG. FIG. 2 shows an embodiment in which the present invention is applied to a reactive ion etching apparatus. A vacuum vessel (etching chamber) 14 of a normal structure made of metal such as stainless steel, which has an etching gas inlet pipe 12 and an exhaust pipe 13 (furthermore, a cooling gas inlet pipe 16 having a cooling gas ejection hole 15 at the tip). 1 to 3 (K
l/crt? ) is ejected through the cooling gas ejection hole 15 into the etching chamber 14, which is reduced in pressure to about 10" (Torr), and is cooled by the diagonal Thomson effect. The cooling gas collides with the substrate to be processed 17iI to cool the substrate surface.Therefore, since the cooling gas is directly released into the etching chamber 14, it does not affect the etching conditions. Therefore, it is necessary to use a gas with the same composition as the etching gas or its main component as the cooling gas, and to keep the gas amount to less than 1/10 of the etching φ gas. It is more desirable to reduce the amount of cooling gas by doing this.Also, the cooling gas jetting hole 15 is opened toward the center of the surface of the substrate 17 to be processed, and the distance S between the jetting hole 15 and the surface of the substrate 17 is In order to prevent temperature distribution on the surface of the substrate 17, a distance sufficient for the cooling gas to cover the entire surface of the substrate 17, for example, approximately 50 to 10,100 mm (l1) is appropriate. In order not to disturb the plasma, it is necessary to insulate the cooling gas introduction pipe 16 from the vacuum vessel 14, which serves as a ground electrode (19a is an insulation pusher a-), and the cooling gas introduction pipe 16 must be insulated from quartz or the like. It is difficult to form the insulating material.

又複数枚の被処理基板を同時にエツチング処理する装置
1こ於ては、冷却ガス導入管を複数本設けることが望ま
しい。なお図に於て、19bは絶縁プツシ、、20はシ
ールド部、21は石英成るいは器、Gは接地を示T。
Further, in the apparatus 1 which simultaneously etches a plurality of substrates to be processed, it is desirable to provide a plurality of cooling gas introduction pipes. In the figure, 19b is an insulating pusher, 20 is a shield portion, 21 is made of quartz or a container, and G is a ground T.

第3図は本発明をイオンビーム・エツチング装置に適用
した一実施例を示したものである。即ち本発明の構造f
こ於ては、外周に配設されたマグネチック書コイル23
と内部に配設されたフィラメント(カソード)24及び
アノード、25を有し、ガス導入口26を有するプラズ
マ放電室27と、中性化フィラメント28、シャッタ2
9、ターゲット30を有し、真空排気口31を介して真
空系(図示せず)に接続された試料室32がグリッドG
、、G、、G、を介して接続されてなる通常のイオンビ
ーム・エツチング装置に於けるターゲット30の構造が
改良される。即ち本発明の構造に用いるターゲット30
はターゲット支持管33によりて支えられ、ターゲット
30の中央部には支持管33の内部に通ずる貫通孔34
が形成される。そしてターゲット30.J:面lこは前
記貫通孔34上Jc被処理基板17を気密に固定する基
板気密固持機構35が設けられる。又前記ターゲット支
持管33の内部には冷却ガス噴射管36が設けられる。
FIG. 3 shows an embodiment in which the present invention is applied to an ion beam etching apparatus. That is, the structure f of the present invention
In this case, the magnetic coil 23 disposed on the outer periphery
and a plasma discharge chamber 27 having a filament (cathode) 24 and an anode 25 disposed therein, a gas inlet 26, a neutralized filament 28, and a shutter 2.
9. A sample chamber 32 having a target 30 and connected to a vacuum system (not shown) through a vacuum exhaust port 31 is connected to a grid G.
, ,G, ,G, in a conventional ion beam etching apparatus, the structure of the target 30 is improved. That is, the target 30 used in the structure of the present invention
is supported by a target support tube 33, and a through hole 34 communicating with the inside of the support tube 33 is provided in the center of the target 30.
is formed. And target 30. J: A substrate airtight holding mechanism 35 is provided on the through hole 34 to airtightly fix the substrate 17 to be processed. Further, a cooling gas injection pipe 36 is provided inside the target support pipe 33.

そしてエツチングに際しては冷却ガス噴射管から3〜5
(KJ/i)程度の圧力差で噴出せしめらn、ジ1−ル
・トムソン効果によって冷やされた、例えばアルゴン咎
の不活性ガスにより被処理基板が背面から直かに冷却さ
れる。なお該構造に於ては冷却ガスが試料室32内”の
真空度に影響を与えることはないので、冷却ガス量は冷
却条件に応じて自由に辿ぶことができる。
When etching, 3 to 5
The substrate to be processed is directly cooled from the back side by an inert gas such as argon, which is ejected with a pressure difference of about (KJ/i) and cooled by the Gill-Thomson effect. In this structure, since the cooling gas does not affect the degree of vacuum inside the sample chamber 32, the amount of cooling gas can be freely adjusted according to the cooling conditions.

以上本発明を、リアクティブ・イオンエツチング、イオ
ーンビームエッチング等グツズi・エツチング装置に於
ける適用例について説明したが、本発明はプラズマ会テ
ボジシ璽ン装置やスパッタリング装置にも適用Tること
ができる。
Although the present invention has been described above with reference to examples of its application to etching equipment such as reactive ion etching and ion beam etching, the present invention can also be applied to plasma etching equipment and sputtering equipment. can.

以上説明したように本発明によりは、プラズマ処理スパ
ッタリング処理等に際して被処理基板を、ジュール・ト
ムソン効果によって冷やされたガスにより直かに冷却す
ることができる。従りて冷却ガスの温度を充分に低くす
るこ七が出来るので、冷却効゛率が向上すると同時に被
処理基板の温度を充分に低く保つことができる。そこで
高温に於て灰化レートの極端に高いEBレジストをマス
ク膜としてリアクティブ・イオンエツチングを行うこと
等が容易番こなり、半導体装置の微細化が推進されるO 又本発明によれば被地理基板は、冷却ガス雰囲気に直か
に接触することによって、ステージの面仕上げ、被処理
基板の反り、被処理基板の背面仕上げの如何にかかわら
ず一定の効率で冷却されるので1.プラズマ領域、スパ
ッタリング処理等(こ於ける被処理基板毎の処理条件の
ばらつきか減少し、半導体装置の品質が安定する・
As explained above, according to the present invention, a substrate to be processed can be directly cooled by gas cooled by the Joule-Thomson effect during plasma processing, sputtering processing, etc. Therefore, since the temperature of the cooling gas can be made sufficiently low, the cooling efficiency can be improved and at the same time, the temperature of the substrate to be processed can be kept sufficiently low. Therefore, it is easy to perform reactive ion etching using an EB resist with an extremely high ashing rate at high temperatures as a mask film, which promotes the miniaturization of semiconductor devices. 1. The geographic substrate is cooled with a constant efficiency by coming into direct contact with the cooling gas atmosphere, regardless of the surface finish of the stage, the warpage of the substrate to be processed, or the finish of the back surface of the substrate to be processed. Plasma region, sputtering processing, etc. (variation in processing conditions for each substrate to be processed is reduced, and the quality of semiconductor devices is stabilized.

【図面の簡単な説明】[Brief explanation of the drawing]

第1馬は従来のりアクティブ・イオンエツチング装置に
於けるエツチング・ターゲットの断面図、@2図は本発
明の一実施例に於ける要部断面模式図、第3図は本発明
の他の一実施例に於ける要部断面模式図である。 図に於て、11はターゲット電極、14はX?!容器(
エツチング室)、15は冷却ガス噴出孔、工6はエツチ
ング・ガス導入管、17は被処理基板、18はプラズマ
領域、30はターゲット、31は真空排気口、32は試
料室、33はターゲット支持管、34は貫通孔、35は
基板気密固持機構、36は冷却ガス噴射Vを示T。 第1図 ¥i  z 図
The first figure is a cross-sectional view of an etching target in a conventional adhesive active ion etching device, the second figure is a schematic cross-sectional view of a main part in one embodiment of the present invention, and the third figure is a cross-sectional view of an etching target in another embodiment of the present invention. FIG. 3 is a schematic cross-sectional view of main parts in an example. In the figure, 11 is the target electrode, 14 is X? ! container(
15 is a cooling gas outlet, 6 is an etching gas introduction pipe, 17 is a substrate to be processed, 18 is a plasma region, 30 is a target, 31 is a vacuum exhaust port, 32 is a sample chamber, and 33 is a target support 34 is a through hole, 35 is a substrate airtight holding mechanism, and 36 is a cooling gas injection V. Figure 1¥i z diagram

Claims (1)

【特許請求の範囲】[Claims] ジュール・トムソン効果により冷やされた気体を、直か
に被処理基板に吹きつける機構を具備せしめてなること
を特徴とする半導体製造装置。
A semiconductor manufacturing device characterized by being equipped with a mechanism for directly blowing gas cooled by the Joule-Thomson effect onto a substrate to be processed.
JP16656381A 1981-10-19 1981-10-19 Semiconductor manufacturing device Pending JPS5867029A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16656381A JPS5867029A (en) 1981-10-19 1981-10-19 Semiconductor manufacturing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16656381A JPS5867029A (en) 1981-10-19 1981-10-19 Semiconductor manufacturing device

Publications (1)

Publication Number Publication Date
JPS5867029A true JPS5867029A (en) 1983-04-21

Family

ID=15833577

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16656381A Pending JPS5867029A (en) 1981-10-19 1981-10-19 Semiconductor manufacturing device

Country Status (1)

Country Link
JP (1) JPS5867029A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6024020A (en) * 1983-07-19 1985-02-06 Matsushita Electronics Corp Dry unsealing of resin sealed body

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6024020A (en) * 1983-07-19 1985-02-06 Matsushita Electronics Corp Dry unsealing of resin sealed body

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