JPS5865688A - Ruled line printing system - Google Patents

Abstract

PURPOSE:To ensure the ruled line printing by simple control, in the printing device wherein ruled lines are printed by character data, by providing interpolating data in ruled line character data, and peforming the interpolating processing for the ruled lines by the data. CONSTITUTION:Lateral and longitudinal interpolating bits are imparted to the right end bit part of the ruled line data D1. When the ruled on line data D1 is sent from a CPU, lateral and longitudinal interpolating bit detecting circuits 12 and 13 detect the interpolating bits, respectively, and output the detected signal to lateral and longitudinal data forming circuit 14 and 18. Then the circuit 14 takes the right end bit of the ruled line data D1 to a register 14R and sends a switching signal to coupling circuit 15. Then the coupling circuit 15 is switched so as to select an output line (a) of the circuit 14. The circuit 14 writes the right end bit, which is written in the resistor 14R, to printing register 16 through a coupling circuit 15, and interpolates the space to the next character data.

Description

[Detailed description of the invention] The present invention relates to a ruled line printing method with an interpolation function.

Conventionally, as a printing method for characters/paragraphs, CPH control (e.g., from a character generator (CG), 24 bits) x 24-bit character/parameter data is transferred to a print register and stored, and the printing device prints this data. A commonly used method is to read data from a print register and print it. [-However, when printing ruled lines using the above-mentioned character/curtain printing method, there is a problem that if ruled lines are printed using middle-class data, the ruled lines are interrupted between characters and between lines. In addition, if ruled line data including spaces between characters and lines (including busy spaces so that ruled lines are not interrupted) is stored in a CG, there is a problem that the capacity of the CG becomes extremely large.

The present invention has been made in view of the above points, and it is possible to provide ruled line characters with IK interpolation information, and to perform interpolation processing of ruled lines using this interpolation information, thereby simplifying the process without increasing memory capacity. To provide a ruled line printing method capable of surely performing ruled line printing with strict control.

An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, reference numeral 11 denotes an input line, into which printing vine turn data read out from the CG in the CPU is input. Above C
GK stores various characters and 9 lines, as well as data for various ruled lines. Ita,C
G has an interpolation data storage area of 2 pins and 5 pins corresponding to each ruled line/main turn data, and ``1'' or ``0'' is written depending on the presence or absence of bottom interpolation and right interpolation. It is rare. FIG. 2(a) is an example of 9-turn data for ruled lines that requires bottom interpolation, and FIG. 2(a) is an example of 9-turn data for ruled lines that requires right interpolation.

The printing arm turn data sent from the CPU is sent to the horizontal interpolation bit detection circuit 12 via the input line 11. The data is input to the vertical interpolation circuit 13 and the horizontal interpolation data creation circuit 14, and is also input to the print register 16 via the coupling circuit 15. Then, the output of the horizontal interpolation bit detection circuit 12 is transmitted to the horizontal interpolation data creation circuit 14.
is input to. This horizontal interpolation data creation circuit 14 is %1
=? Register J for storing the right end pit of Yarakuta
4R, and when a detection signal is given from the horizontal interpolation bit/to detection circuit 13, the right end beat of the ruled line turn data (l character) is taken in from the CPU and temporarily stored in register J4H. . For example, the l character is 24y
w) If the configuration is X24 dots, store the rightmost 24 dots in the register 14R. The interpolation data creation circuit 14 has two output lines m*bf, and the output line 1 outputs interpolation data to the coupling circuit 1.
5, and outputs a switching signal from output line b, which is applied to the coupling circuit 15. Further, the output of the horizontal interpolation pit detection circuit I2 is sent to the address/tie kinder control circuit 11. This address/tie ζ puffer control circuit 11 not only specifies the address for the print register IC and controls the timing of writing and reading data, but also outputs a write end signal to the KCPU every time a character is written, and outputs a write end signal for one line. When reading is completed, the reading end signal is
Output to PU and line feed control circuit 19. On the other hand, the output of the vertical interpolation data generation circuit 11. It is sent to the line feed control circuit 19. Further, the vertical interpolation data creation circuit 18 and the line feed control circuit 19 receive a line feed command from the CPU.

data is input. This line feed control circuit 19, CP
When the line feed pitch data is sent from U, the amount of line feed is calculated and provided to the vertical interpolation data creation circuit tgK. In addition, the line feed control circuit 19 and address/timing control circuit 11
When a read end signal is given from , a line feed command is output to a delinter (not shown). When the line feed command is given to the delinter, it performs a line feed operation after completing the busy printing process of one line of data. The vertical interpolation data creation circuit 18 is equipped with a register 18R that stores the lower end bit of print data for one line, and when a detection signal is given from the vertical interpolation bit detection circuit 11, the corresponding pit of the register IIIB is set to 11. is stored, and the interpolation amount is determined according to the line feed pitch data from the CPU and the line feed amount from the line feed control circuit 1g.

The vertical interpolation data created by the vertical interpolation data creation circuit 18 is output from the output line d and sent to the print register I6 via the coupling circuit 15. In addition, a %'l'' signal is output from the output line d of the vertical interpolation data generation circuit jmb and is input as a switching signal to the coupling circuit Fj. 0 input as 0 Next, the operation of the above embodiment will be explained.

Noreen data sent from the CPU is input to the coupling circuit 15 via the input line rtf.

When the switching signal is not applied to the horizontal interpolation data creation (b) path 14 or the vertical interpolation data creation circuit 18, this coupling circuit 15 selects the input line 1K and outputs the Noreen data from the CPU to the print register IC. do. The signal Fi selected by the coupling circuit 15 is written into the print register 16 according to the address control of the address/timing control circuit 11. Then, when data for one line is written into the print register 1δ, the data is read from the print register, sent to the printer, and printed. And now, for example, as shown in the wc3 diagram, ≠ 2 LINE
, Toguri, 3 If we frame each LINE document data, the CPU will send 41" I L
Ruled line data is sent between the INE and the $2 line. First, the ruled line data D at the upper left corner that constitutes the frame is sent from the CPU and written into the print register 16, but this ruled line data D1 requires horizontal and vertical interpolation, and the rightmost pit portion Horizontal and vertical interpolation pits are added to. Therefore, when the ruled line data D1 is sent from the CPU, the horizontal interpolation bit/bit detection circuit 12 and the vertical interpolation bit detection circuit I3 detect the interpolation bits, respectively.
The detection signal is output to the horizontal interpolation data generation circuit 14 and the vertical interpolation bit generation circuit 18. When the horizontal interpolation data creation circuit 14 receives a detection signal from the horizontal interpolation pit detection circuit I2, the right end pit of the ruled line data sent from the CPU to the input line 11 at that time is detected in the register 14RK.
A coupling circuit 15 which takes in the switching signal from the output line b.
Output to. This coupling circuit 15 switches to select the output line island of the horizontal interpolation data generation circuit 14 when the switching signal is applied. The horizontal interpolation data creation circuit 14
Then, the rightmost bit written to the register 14Et is written to the print register l- via the coupling circuit 15, and the period up to the next character data is interpolated. When the address/timing control circuit 11 finishes controlling the writing of interpolated data between characters to the print register 16, it outputs a completion signal to the CPU. In addition, the horizontal interpolation data creation circuit 14 writes the interpolation data to the print register 1gK, and then outputs it to the output line b and returns the b switching signal to 10#.This causes the coupling circuit 1j to select the input line 11 again. It will switch to On the other hand, when the vertical interpolation pit generation circuit 18 receives the vertical interpolation video detection signal, it writes 11'' into the corresponding pit position in the register IIIRK.
When a data write end signal is sent from the PU address/timing control circuit 11, the next 4th turn data fl! is sent from the CG. In the same way, horizontal interpolation processing is performed for each Yarakuta in the print register 16.
/4 turn data and horizontal interpolation data are written. When data for one line, that is, ruled line data in this case, is written to the print register 16, the stored data is controlled by the address/timing control circuit 11.
It is read out by C and sent to the printer to perform ruled line printing. On the other hand, according to the detection signal of the vertical interpolation data creation circuit 18 and the vertical interpolation bit detection circuit 13, register IIIH is read out.
Write one line of interpolation data to 0. However, when the address/timing control circuit 17 reads out the stored contents of the print register 16 to the printer, it outputs a read end signal to the CPU and line feed control circuit 9. . As a result, the line feed control circuit 19 outputs a line feed command to the printer, and the CPU
outputs line feed pitch data up to the next printing line of document data to the vertical interpolation data creation circuit 18 and the line feed control circuit 19. When the line feed control circuit 19 receives the line feed pitch data from the CPU, it calculates the line feed amount and outputs it to the vertical interpolation data creation circuit 18. Vertical interpolation data creation circuit with 18 CP
Line feed pitch data and line feed amount from U (2) Determine the amount of interpolation according to the line feed amount from circuit 1g, output interpolated data for one line per second from output line C, and output a paper switching signal from output line d. , to the coupling circuit 15. The above interpolation amount is performed based on the line feed pitch bar. The coupling circuit 15 selects the interpolation data from the vertical interpolation data creation circuit 1g based on the switching signal, and writes it into the print register ffK. and,
One line of vertical interpolation data written in the print register 16 is output as an MP under the control of the address/timing control circuit 17 and sent to the printer. As a result, the printer performs vertical ruled line interpolation printing between the horizontal line at the top of the frame and the 2 LINK of the document data, as shown in FIG. When the address/timing 11111 control circuit 11 finishes reading the print register 16, the address/timing 11111 control circuit 11 outputs a vertical interpolation data continuous output end signal to the CPU.
As a result, Sho C1'U sends out no-turn data for +2 LINE.

Also, line break control section! address/timing 111I
In response to the read end signal from the control circuit 11, all line feed commands are output to the printer. Following the same process, F)l! As shown in Figure 3, interpolation between characters in the horizontal direction and interpolation between lines in the vertical direction are performed. In the above embodiment, E and TAG are used so that all interpolation is performed only by interpolation in the right direction and interpolation in the downward direction. , leftward and upward interpolation may be performed.

As described above, according to the present invention, the character data for ruled lines has interpolation information, and the interpolation processing of the ruled lines is performed using this interpolation information. ) allows you to reliably print ruled lines.Furthermore, the amount of vertical interpolation is calculated based on the line feed pitch, so even if you change the line feed pitch, the lines 15F1 will always be printed.
This has the effect of printing in the center between the lines.

[Brief explanation of the drawing]

The drawings show one embodiment of the present invention, and FIG. 1 is a circuit configuration diagram, FIG. 2 (al (b) is a diagram showing /# turns of ruled lines that require interpolation, and FIG. 3 is an illustration of the interpolation operation. It is a diagram showing an example of ruled line printing for explaining. FJ...Input line % 12...Horizontal interpolation pit detection circuit, 13...Vertical interpolation bit detection circuit, 14...Horizontal interpolation data creation circuit , 18... Vertical interpolation data creation circuit, 19... Line feed control circuit.

Claims (1)

[Claims] In a printing device that prints ruled lines using character data, there is provided a means for adding at least rightward and downward interpolation information to ruled line character data, and means for detecting interpolation information in input ruled line character data and detecting the interpolation information in the inputted ruled line character data. A ruled line printing method 0 characterized in that it is equipped with means for printing by interpolating between characters in the right direction for interpolation information and by interpolating between lines in the downward direction for downward interpolation information.