JPS586361B2 - automatic train control device - Google Patents

Description

[Detailed description of the invention] The present invention relates to an automatic train control device.

Automatic train control equipment (hereinafter abbreviated as ATC) that prevents train collisions, derailments, etc., and automatically controls train operation safely.
The system sends a speed limit signal predetermined in multiple stages according to the train operating conditions to the track circuit or track loop, receives the speed limit signal at the train running on the track, and compares it with the train's running speed. However, if the speed limit is exceeded, the brakes are applied to slow the train to a safe speed.

As this speed limit signal, a signal is generally used in which a carrier wave in the audio frequency band or guided radio band is modulated with a low frequency signal (hereinafter referred to as a tone signal) selected corresponding to each of the multiple speed limits. .

FIG. 1 shows the general configuration of the above-mentioned ATC, which also includes a signal receiving section 1, a signal decoding section 2, a speed detecting section 3, and a speed checking section 4.

First, a signal 6 picked up by the antenna 5 is received by a receiving section and demodulated to obtain a low frequency tone signal 7.

This tone signal 7 is subjected to frequency discrimination by the decoding unit 2, and is one of the plurality of separated speed limit signals 8i.
(81-8n) are obtained.

This signal 81 is applied to the speed checking section 4 together with the speed signal 9 detected by the speed detecting section 3, and by comparison of both, a command is given to pressurize the brake when the train speed exceeds the speed limit, and a command to release the pressure otherwise. is output as an output signal 10.

In the above configuration, conventionally, as shown in FIG.
, AC amplifiers 221 to 22n, rectifiers 231 to 23n,
The relays 241 to 24n close one of the relay contacts 251 to 25n in response to an input signal, and one of the corresponding speed limit signals 81 to 8n is obtained.

In such a configuration, the decoding section uses a relay, and a circuit for driving the relay is also necessary and large, which causes an increase in cost and a decrease in reliability.Therefore, there is a need to simplify the structure.

However, simply converting the relay circuit into a solid state does not provide the fail-safe characteristics of the relay, and a compact and fail-safe configuration has been desired.

In view of the above points, the present invention includes a relay in the decoding circuit.
The purpose of this invention is to provide an ATC with a compact and highly reliable configuration.

Another object of the present invention is to provide an ATC that is as fail-safe as when a relay is used in the decoding circuit.

In order to achieve the above object, the present invention outputs the speed limit signal from the decoder as an AC signal by removing the relay in the decoder, and combines the AC speed limit signal with the train running speed signal. The brake command signal obtained by comparing the two is output via an AC relay.

In such a configuration, only one AC relay is included at the output terminal that outputs the brake command signal, making it possible to be compact and highly reliable.Moreover, the AC signal has fail-safe properties, that is, no AC is output in the event of a failure. Due to its nature, fail-safe ATC is obtained.

Hereinafter, the present invention will be explained in detail with reference to Examples.

FIG. 3 shows an embodiment of the present invention, including a receiving section 1, a signal decoding section 2, a speed detecting section 3, a speed checking section 4, and a receiving antenna 5.
It may also be configured.

The signal decoding unit 2 includes bandpass filters 211 to 213,
and constituted by waveform shaping circuits 261 to 264,
In this example, four types of speed limit signals can be decoded.

In addition, the speed check unit 4 receives the decoded speed limit commands 81 to 81.
a speed pattern generating section 41 that generates a speed limit pattern vP according to 84, and a speed measuring section 42 that converts the speed signal obtained by the speed detecting section 3 into a value proportional to the train speed vT.
, the speed limit VP obtained by the speed pattern generating section 41 and the speed measuring section 42 is compared with the train speed vT, and when the train speed vT exceeds the speed limit VP, "1" is output, and when it is below, the opposite is output. When the speed comparator 43 outputs "0" and the alternating output of "1" and 1O is output from the speed comparator 43, the AC amplifier 11 amplifies it, and the output of the amplifier 11 and the brake drive Transformer 12 and rectifier diode 1 for insulating relay 14
3 are also configured.

In the above configuration, when one type of speed limit signal among the four types of speed limits is input, 81 to 8 corresponds to the speed limit.
The decoding unit 2 outputs alternating outputs of I1' and '0' in one of the four signals.

``1'' of this police box signal is a level vP corresponding to the speed limit.
i, and "0" has a level corresponding to zero speed limit.

As a result, if the train is running below the speed limit,
As the output of the speed comparator 43, alternating outputs of "1" and "40" are obtained.

That is, a speed pattern signal in which a signal of "1" having a level of vP-VPl and a signal of "0" having a level of VP=o alternate is applied as a human power to the speed comparator 43, and the train speed VT is When 0<VT<VPi, in the section vP-vPi, vT<■2, and in the section vP-0, VT>vP.

As a result, it can be seen that the speed comparator 43 outputs the alternating signal when the train is running at the speed limit or less.

Here, ■Pi indicates a level corresponding to the currently input speed limit.

On the other hand, if the train speed VT exceeds the speed limit vP, that is, 0〈v,i×vT, then ■T冫■2 will always hold throughout the section where Vp is O and the section where V, is VPi. As a result, the speed comparator 43 outputs only a value representing overspeed and does not generate an alternating output.

FIG. 4 shows the above operation.

The speed limit signal is received and outputted to the fourth band pass filter 1221 of band pass filters 211 to 214 in FIG. 3, for example.
When the signal S1 shown in the figure appears, the corresponding output of the waveform shaping circuit 25i of FIG.
An on/off signal like the one shown appears.

The speed pattern generation section in FIG. 3 generates a speed pattern VPi corresponding to this ISi, which is, for example, I8i=
Outputs VP-VPi only when it is "1", and I8, - "0"
”, outputs Vp=O.

Therefore, when 81 is on or off, vP becomes an alternating output having values of vPi and O as shown in FIG.

Comparing this speed limit V, with the train speed VT, if the train speed VT is lower than the current speed limit VPi, the output of the speed comparator 43 will be as shown in OB in FIG. 4, according to the above-mentioned principle. Output appears.

If this AC signal oB is AC amplified by the AC amplifier 11 shown in FIG. 3 and the relay 14, which operates only with AC, is driven, the relay 14 is in an ON state while this signal OB appears.
In other words, the brake is off.

On the other hand, when the train speed vT exceeds the speed limit vPi, the OB signal 4 becomes a DC current of "0" as described above, and no output appears in the AC amplifier 11, and the relay 14 is turned off, that is, the brake is turned on.

Further, when the speed limit signal Si disappears, the input signal ISi, which causes the AC output, is no longer turned on and off, and as a result, the brake is activated.

In other words, if the human power signals Si and I81 are lost due to wire breakage, or if they are fixed at the "1" side, or if the infinite speed is exceeded, the speed comparator 43 will fail and its output will become "1" or If it is fixed to “0”,
If the AC amplifier 11 breaks down, the relay 14 is disconnected, or the contact contacts fail, etc., the brake side will be applied, and therefore it will be on the safe side.

It should be noted that if the relay contacts are welded, the brake will not be applied and it will be unsafe. However, with the current technology, there are relays with almost no welding, and the probability of welding is negligible.

Although the above embodiments are examples in which the present invention is implemented using independent elements, the functions of the speed check section 40 shown in FIG. 3 can also be implemented by program processing using a microcomputer or the like.

FIG. 5 shows an embodiment in which the present invention is implemented using a program processing device, and FIG. 6 shows an example of the processing procedure in the form of a flowchart.

In FIG. 5, 45 is a human power circuit that inputs the speed limit signal 8 and train speed signal 9, 46 is a processing device containing a program and memory, and 47 is an output circuit that outputs a brake signal.

As shown in FIG. 6, first, the speed limit signal 8 (Vci,
i = 1 to 4), and if Voi is all ``0'',
Let the speed limit pattern VP be O.

On the other hand, when vCi becomes “l”, Vci (i=1 to 4
) is selected and set as VP-Pi.

Next, the train speed VT is manually input and compared with the speed limit vP, and when VT>VP, for example, the brake output B is set to "1".
By outputting B as "0" when "VT<V" and repeating the above processing, it is possible to realize the same function as when configured with independent elements.

The above uses the inverted speed limit signal OB as is,
Although a method of inverting the output of the speed comparator has been described, since the modulation frequency of the speed limit signal generally uses a low frequency of about 10 Hz to 100 Hz, there is a drawback that the AC amplifier becomes large.

As a method to improve such drawbacks, the speed limit signal 8
There is a method of multiplying the frequency and inputting it to the speed checking section 4, or multiplying the alternating output of the speed checking section 4.

In the case of FIG. 7, a frequency multiplier circuit 15 is inserted between the signal decoding section 2 and the speed comparison section 4 in FIG. 3, and in FIG. This figure shows the case where a doubler circuit 16 is inserted.

As explained above, according to the present invention, by removing the relay in the decoding section, the speed limit signal is output from the decoding section as an AC signal, and the AC brake command signal is outputted via the AC relay, thereby making it possible to control the speed of the device. It has remarkable effects such as simplifying the process and improving safety at the same time.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a conventional ATC device,
2 is a block diagram showing the decoding unit for the speed limit signal shown in FIG. 1, FIG. 3 is a block diagram showing the configuration of an embodiment of the present invention, and FIG. 4 is for explaining the operation of FIG. 3. FIG. 5 is a block diagram showing an embodiment in which a part of the present invention is realized by a program processing device, FIG. 6 is a flowchart showing an example of the processing procedure, FIGS. The figures are block diagrams showing the configuration of an embodiment in which input signals and output signals are frequency-multiplied. 1...Signal receiving section, 2...Signal decoding section, 3...Speed detection section, 4...Speed checking section, 5...-・Antenna, 211-214...
・Band pass filter, 261-264...
Waveform shaping circuit, 41... speed pattern generation section,
42...1 speed measurement section, 43...speed comparison section, 11...-1-1 AC amplifier, 14...1 AC relay, 15, 16...・Frequency multiplier.

Claims (1)

[Scope of Claims] 1. Means for receiving an alternating current signal indicating a speed limit permissible for trains to run, and converting the received alternating current signal into an alternating current signal whose amplitude corresponds to the speed limit. means for generating a speed pattern consisting of; and means for generating a train speed signal that changes in accordance with the traveling speed of the train;
and means for comparing the speed pattern and the train speed signal, outputting a signal corresponding to the police box signal only when the train speed is lower than the speed limit, and outputting a brake command when the signal is not present. An automatic train control device featuring: 2% Allowance The automatic train control device according to claim 1, wherein the alternating current signal indicating the speed limit has a different frequency corresponding to a plurality of speed limits. 3. In the device according to claim 1, the speed pattern generating means waveforms the alternating current signal indicating the speed limit into a digital signal that alternately avises levels of "1" and "0"; An automatic train control device characterized in that the automatic train control device is configured to generate a signal whose level is proportional to the speed limit. 4. The device according to claim 1, characterized in that the speed comparison means is configured to output an AC signal only when the train speed is equal to or higher than the speed limit, and to output this signal through an AC relay. Automatic train control equipment. 5% Allowance An automatic train control device according to claim 1, characterized in that the speed comparison means is configured to execute calculations using a program processing device. 6. An automatic train control device according to claim 1, further comprising a frequency multiplier circuit on the input or output side of the speed comparison means.