JPS5856532A - Optical logical operating element - Google Patents

Abstract

PURPOSE:To logically operate and process a plurality of optical signals and to output the result as the optical signals, by constituting the combination of electrical conductive and nonconductive states through the combinations of presence/absence of the optical signals in a semiconductor including a photodetecting, a light emitting and a light absorbing region. CONSTITUTION:In a semiconductor epitaxial crystal, an N-Ga1-xAlxAs layer 1, an N-Ga1-yAlyAs layer 2 and an N-Ga1zAlzAs layer 3 form a light emitting region, an N-Ga1-tAltAs layer 5, an N-Ga1-uAluAs layer 6, an N-Ga1-vAlvAs layer 7 and an N-Ga1-wAlwAs layer 8 constitute a photodetecting region and an N-GaAs layer 4 forms a photoabsorbing region. A P-region (crossed lines) 9 is formed in the layers 1, 2 with impurity diffusion and a high resistance region (oblique lines) 10 is formed to each layer through the injection of proton. An insulation film 11 and electrodes 12 are formed with SiO2. Photodetection regions X, Y are arranged in series with the high resistance region, and only when the two photodetecting regions receive an optical input signal and turn on, the light emitting region Z is conductive, allowing to operate logical product.

Description

Detailed Description of the Invention [Invention #'i] Development of various optical elements is progressing toward the practical application of optical fiber transmission, which relates to an optical logic operation element that arithmetic processes multiple optical input signals and outputs them as optical signals. Various types of light emitting devices, light receiving devices, optical circuit devices, etc. have been proposed, but these devices generally have a single function, and when a logical operation t'' is performed on an optical signal, The method used is to first convert the signal into an electrical signal, perform the necessary calculations, and then convert it back into an optical signal.For this purpose, structural changes such as incorporating a photoelectric conversion circuit and an electronic circuit into one element are used. The manufacturing process is complicated. The optically controlled semiconductor light emitting device previously proposed by the present inventor in Application No. 854-081084 provides one suggestion for solving this problem.

The optically controlled semiconductor light emitting device according to the above proposal basically has the following features:
An optical switch region is provided on the input light irradiation side, which becomes electrically conductive or non-conductive depending on whether the input light is irradiated or not, and a light emitting region including a semiconductor pn junction is provided on the output side. When a bias voltage is applied in series to the region and in the forward direction to the pn junction, the optical switch region becomes conductive;
A light emitting element configured to emit or stop light of a predetermined wavelength from the light emitting region depending on a non-conducting state, the light switch region and the light emitting region being optically isolated between the light switch region and the light emitting region. The main feature is that a light absorption region is provided.

The present invention is based on the above proposal and aims to solve the above problems by providing a monolithic optical logic operation element that performs logic operation processing on a plurality of optical input signals and outputs them as optical signals. The purpose is to provide a highly resistive area and/or a pn-inverted region in an epitaxial crystal semiconductor that includes a required number of light-receiving regions and light-emitting regions and a light-absorbing region that optically blocks the light-receiving region and the light-emitting region. A circuit including at least three regions, the light receiving region, the light absorbing region, and the light emitting region, is arranged in series and/or in parallel, and a light input signal to the light receiving region is formed. An optical logic device characterized in that an optical output signal is emitted from the light emitting region and the circuit is then stopped by configuring all the combinations of electrically conductive states and non-conductive states of the circuit corresponding to the combination of presence and absence of the circuit. This is accomplished by an arithmetic element.

In particular, the light-receiving region has a one-conductivity type low-resistance layer and a one-conductivity type that has a smaller forbidden band width than the low-resistance layer that is electrically conductive or non-conductive depending on the presence or absence of optical input. a low-resistance layer, and a low-resistance layer of one conductivity type having a bandgap narrower than that of the high-resistance layer, and the light emitting region includes a semiconductor pn junction, and The above object can be easily achieved when using a structure in which a bias voltage is applied in the forward direction.

Hereinafter, the present invention will be specifically described by way of examples with reference to the drawings.

FIG. 1 shows a cross-sectional view of a semiconductor epitaxial crystal used in an example of the present invention. In the figure, 1 is n-Ga1-x
A1xA+ layer 12 is n-Ga1-yAlyA8 layer, 3 is n-Ga1-z Alz As Mk, and y<
x.

2, the entire light emitting area is composed of the above three layers,
The n-Gah-yAlyAs layer 2 constitutes the active layer of the light emitting region, and the wavelength of the optical output signal is determined by the composition y of this layer. In addition, the n -Gal-x Al This shows that the forbidden band width is small.

Also, 5tln-Gal-tAA'tAs layer, 6tj:
n-Ga1-u AJu As @, 7 is 1(n)
-Gax -v Alv As layer, 8 is H-Ga1-w
A7w As N k, v(t, u, w, the light receiving area is composed of the above four layers. t(or n
) -GILI-vAJvAs layer 7 is a high-resistance layer forming an active layer that generates one cage/hole pair in the original input signal and provides photoconduction. Also n-Gal-wAj! wA
The S layer 8 serves as an electrode contact layer and a minority carrier confinement layer, and has a sufficiently high impurity concentration to ensure ohmic contact of the electrode, has low resistance, and is optically transparent when used as an optical window for optical input signals. Its composition W is set so that it is transparent to input signals. Furthermore, n-Gat
-tAJ tAsAs layer n-Ga1-uAluAs
-6 forms a heterojunction with the 1(n)-Ga1-vAlvAs layer 7, similar to the n-Gax-wA1wAs layer 8, and transfers the minority carriers (holes in this example) generated by the original input signal to the 1(n)-Ga1-vAlvAs layer 7. 1(n) Gax -vAlvAs 0 which serves to confine within layer 7 and thus layers 5°6 and 8
The forbidden band width of is set to be larger than that of layer 7, and as described above, <, v<t, u, w. Note that the layer 7 is formed by a selective growth method, a method of inserting it into a groove provided in the layer 6, or the like. Furthermore, 4 in FIG. 1 is an n GaAs layer, which forms a light absorption region and completely optically blocks the light emitting region made up of the layers 1 to 3 and the light receiving region made up of the layers 5 to 8. fulfill one's role. Therefore, this n-Ga
Although the thickness of the As layer 4 must be sufficiently larger than the light penetration length, a thickness of several μm is usually sufficient for this purpose.

However, it is convenient to have the n-GaAs layer 4 support the mechanical strength of the entire device, and considering this point,
The thickness is preferably about 100 μm to 100 μm. Particularly in this case, the n-type impurity is contained at a relatively high concentration so as not to increase the parasitic resistance in the n-GaAs layer.

A two-step growth method is also effective, using an H-QaAs substrate as the n-GaAs layer 4 and growing layers 3, 2, and 1 and layers 5, 6, 7, and 8'ft, respectively, on the top surface of the substrate. The growth method for each layer may be any method such as liquid phase growth, vapor phase growth, or molecular beam epitaxy.

Figures 2 to 6 show the photonic J! In Figures 2 to 6, which show cross-sectional views of the 1i element, a region 9 indicated by intersecting diagonal lines is a p-type region formed by impurity diffusion or implantation, and a region 10 indicated by diagonal lines is a p-type region formed by proton implantation or implantation. A high resistance region 11 formed by ion implantation or the like is 8101.
5 is an insulating film made of N4 or AJtol, and 12 represents an electrode.

In addition, in each of the following examples, 1. Lasers 2' and 3 constitute a light emitting region 2 with a striped structure, and the stripes extend in a direction perpendicular to the plane of the paper.

In addition, a case is shown in which two light receiving regions 5, 7', 6, and 8 and 5,7", 6, and 8 constitute independent light receiving regions X and Y, respectively, and a forward bias voltage is applied to the pn junction,
The optical input signals incident on 7 and 7' and the optical output signal emitted from 2' are both in the direction perpendicular to the plane of the paper.

FIG. 2 shows a cross-sectional view of an AND element.

In this AND element, since the light receiving areas X and Y are arranged in series, the two light receiving areas receive the optical input signal at the same time.
The light-emitting region Z is ON only when the N state is reached, and the logical product operation is performed.0 Figure 3 shows a cross-sectional view of the logical sum (OR) element. Since it is arranged in parallel to the light emitting region 2, the two light receiving regions
Alternatively, when at least one of Y is in the ON state, a logical OR operation is performed with the light emitting region ZFiON. 〕Given. The light receiving area of this INVER8ION element is only X, and when the light receiving area X is OFF, the light emitting area 2 is in the ON state, but when the light receiving area 0, the light emitting region Z is in the OFF state.
This is a negative operation.0 Figure 5 shows a cross-sectional view of a negative logical product (NAND) element.
0 this NAN given by the bias constant current source
In the D element, the light-emitting region 2 turns OFF only when both light-receiving regions shows,
The bias is given by a constant current source.
In the element, at least one of the light-receiving areas X or Y is ON.
When this state is reached, the light emitting region 2 is in the OFF state and a NOR operation is performed.

The embodiment described above with reference to FIGS. 2 to 6 is based on the first embodiment.
AN from one type of semiconductor epitaxial crystal shown in the figure.
D, OR, INVER8ION, NAND, and NOR optical signal logic operation elements are formed.

In the embodiments described above, the p-type region was formed by impurity diffusion or implantation after crystal growth, but it is also possible to form it by a method of selectively growing a p-type region during crystal growth.

Furthermore, in the above embodiment, the light emitting region is P-? −
Although a laser diode with an N-heterojunction stripe structure was used, it is also possible to use a distributed feedback laser, a light emitting diode, etc., and the wavelength of the optical output signal can be freely selected independently of the wavelength of the optical input signal. It is possible to do so.

Previous V! In the example, GaAJAs-based crystal was used as the semiconductor material, but InGaAsP-based, GaAlAsSb
It is also possible to construct a similar optical logic operation element using other semiconductor materials such as the It is possible to configure an optical logic operation element that processes three or more optical input signals by combining nine superimposed basic operation functions, as in the example, and to further operate complex logic.

As explained above, the present invention has a number of light receiving areas.

A circuit including at least - of the three regions is arranged in an epitaxial crystal semiconductor including a light emitting region and a light absorption region,
A forward bias is applied to the light emitting region or the pn junction of the light emitting region by configuring a combination of an electrically conductive state and a non-conductive state of the circuit corresponding to the combination of the presence and absence of an optical input signal to the light receiving region. This can be easily realized when creating a structure for applying voltage to an element, and has a great effect on the practical application of optical logic operation elements.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of a semiconductor epitaxial crystal used in an embodiment of the present invention, and FIGS. 2 to 6 are cross-sectional views of the embodiments of the present invention. In the figure, 1 is an n-Gal-xAlxAs layer, 2 and 2' are n-Ga1-yAJyAs layers, and 3 is an n-Ga
+ -zAlzAs layer, 4 is n-GaAg layer, 5 is n
-Gal-tAJtAs layer, 6 Fin-Gal-
uAluAm layer, 7. 7' and 7" are 1(n)-
Gal-vAJvAa layer, 8 Fin-Gal-W
AA''WAI layer, 9 is a p-type region, 10 is a high resistance region, I
I#-1 insulating film, 12 indicates an electrode. Figure 1

Claims (2)

[Claims] (1) Highly resistive areas and/or areas within the virtual crystal semiconductor including a light receiving region, a light emitting region, and a light absorbing region that optically blocks the light receiving region and the light emitting region.
or by forming a pn inverted area, a circuit including at least three areas of the light receiving area, the light absorbing area, and the skeleton light emitting area is arranged in series and/or in a row,
A light output signal is emitted from the light emitting region or stopped depending on a combination of an electrically conductive state and a non-conductive state of the circuit corresponding to the combination of presence and absence of an optical input signal to the light receiving region. Kotot-Featured optical logic operation element 0 (2) The light-receiving region has a negative bandgap width that is smaller than that of the -conductivity type low-resistance layer, which becomes electrically conductive or non-conductive depending on the presence or absence of an optical input signal. The light emitting region includes a conductivity type low resistance layer and a conductivity type low resistance layer having a larger bandgap width than a high resistance layer, and the light emitting region includes a semiconductor pn junction, and #pn is formed in the shell layer. 2. The optical logic operation element according to claim 1, wherein a forward bias voltage is applied to the junction.