JPS58560U

JPS58560U - Television receiver power control device

Info

Publication number: JPS58560U
Application number: JP1981094549U
Authority: JP
Inventors: 服部　弘一
Original assignee: 日本電気ホームエレクトロニクス株式会社
Priority date: 1981-06-25
Filing date: 1981-06-25
Publication date: 1983-01-05

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図は本案に係るテレビジョン受像機の電源制御装置
の実施例ブロック回路図、第２図および　　　゛第３図
はいずれも第１図の回路における動作を説明するための
タイムチャートである。Ｎ□・・・・・・同期信号検出回路のナントゲート、Ｔ
１・・・・・・タイマ回路、Ａ１・・・・・・論理回路
のアンドゲート、Ｚ□・・・・・−・パルス発生器、Ｄ
ｌ・・・・・・パルス弁別器、ＳＷ□・・・・・・スイ
ッチ回路。FIG. 1 is a block circuit diagram of an embodiment of the power control device for a television receiver according to the present invention, and FIGS. 2 and 3 are time charts for explaining the operation of the circuit in FIG. 1. N□・・・・・・Nant gate of synchronization signal detection circuit, T
1: Timer circuit, A1: AND gate of logic circuit, Z□: Pulse generator, D
l...Pulse discriminator, SW□...Switch circuit.

Claims

[Scope of claim for utility model registration] Reception channels are sequentially switched by control pulses□
In a television receiver having a channel selection device that is controlled as much as possible, there is provided a synchronization signal detection circuit that detects the presence or absence of a synchronization signal present in a multi-valley video signal, and a synchronization signal detection circuit that generates a predetermined output voltage at a set time. a timer circuit; a logic circuit that obtains an AND output of a detection output of the synchronization signal detection circuit indicating the absence of the synchronization signal and an output voltage of the timer circuit; and a logic circuit that obtains an AND output of the output voltage of the timer circuit; a pulse generator that sequentially generates pulses as the control pulses of the logic circuit; a pulse discriminator whose output is inverted when the sequential passlesses are counted up to a predetermined value, and which is reset by the AND output of the AND circuit of the logic circuit; A power supply control device for a television receiver, comprising a switch circuit that shuts off a power supply circuit in response to the inverted output of the pulse discriminator.