Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co LtdfiledCriticalNippon Electric Co Ltd
Priority to JP48009068ApriorityCriticalpatent/JPS585551B2/ja
Publication of JPS4998111ApublicationCriticalpatent/JPS4998111A/ja
Publication of JPS585551B2publicationCriticalpatent/JPS585551B2/ja
Memory interfacing method and circuit of variable length decoder for accessing external memory when empty portion of internal memory exceeds a predetermined level