JPS5851353A - Program control circuit - Google Patents

Abstract

PURPOSE:To allow plural circuits to operate synchronously and to improve the flexibility of program control, by operating an additional function logical integrated circuit element while supplying some of instructions to the element when the additional function integrated logical circuit element is added. CONSTITUTION:When an additional function integrated logical circuit element II is connected, the contents of a program memory III specified by an address register 1 are supplied to an instruction register 4 and at the same time, part of the output of the program memory III is supplied to the additional function integrated logical circuit element II as well. The contents are decoded by a decoder 10 and the contents of a register 12 are executed by an operating device 11. The contents of a register 6 are processed by the operating device 11 through control gates 9 and 14. Its output is stored in the register 6 through control gates 13 and 8. This series of operations is performed synchronously by the same instruction.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a program control circuit for an information processing device using integrated logic circuit elements.

Conventionally, when configuring this type of device, a plurality of integrated logic circuit elements are configured independently, each integrated logic circuit element has an independent control circuit, and each operates with independent timing and processing sequences. Therefore, a timing margin is required for time alignment of multiple elements, resulting in a speed reduction, and since the processing sequence is fixed, it is difficult to transfer data in the middle of processing due to changes in the processing sequence, etc. There was an issue where it was not possible to modify the functionality.

In order to eliminate these drawbacks, the present invention aims to provide an additional function integrated logic circuit element to an integrated logic circuit element that performs information processing by supplying storage program control commands such as microphone o program commands from the outside. A part of the circuit is supplied to an additional function integrated logic circuit element to operate it, and multiple circuits are operated in synchronization, and the flexibility of program control is used to easily change the function of the additional function.

The figure shows an embodiment of the present invention, where ■ is the king integrated logic circuit element r, ■ is the added integrated logic circuit element, and
if program memory for program storage, ] is program address register, 2 is program address +1
3 is a selector for selecting a program address, an instruction register for executing a 4-digit program, 5 is an instruction decoder, 6 is a register for executing operations, 7 is an arithmetic unit, 8,
9 is a control gate for sending data to the data bus, 10 is an instruction decoder, 11 is an arithmetic unit, 12 is registers, 13゜1
4 is a data transmission control gate to the data bus. 20
is a determiner for the calculation result.

In order to explain the operation of this device, we will first explain the case where it is operated as a conventional ordinary processing device. In this case, the main circuit is a combination of two integrated logic circuit elements I and a program memory (2).

The contents of the address specified by the instruction address register 1 are read from the program memory (2), and the contents are stored in the instruction register 4. According to the contents of the instruction register 4, the instruction decoder 5 sends control signals to each circuit in the integrated logic circuit element I to execute the instruction. At the same time, the address of the address register 1 is incremented by 1 by the +1 adder 2, but the selector 3 selects whether to set the address of the next instruction as a +1 address or a jump address, depending on the output result of the performance result judger 20. . In this way, the instructions are executed one after the other. Next, the operation of the present invention in which the additional function integrated logic circuit element (2) is connected will be explained.

The contents of the program memory specified by the address register 1 are supplied to the instruction register 4, and at the same time, a part of the output of the program memory IJI is also supplied to the additional function integrated logic circuit element 2, and this content is supplied to the decoder 10. The contents of the register 12 are executed by the arithmetic unit 11. Also, the contents of register 6 are control gate 9.14
It is calculated by the calculating unit 11 via the. Further, this output is stored in the register 6 via the control gate 13.8. This series of operations is executed synchronously by the same instruction. Although this example shows an example in which the operation result is determined by the operation result determiner 20, the additional function integrated logic circuit element Fll also has a determiner, and the determination result signal line is connected to the integrated logic circuit element 1. [It is also possible to have a configuration in between.

As explained above, since the main integrated logic circuit element has the main control circuit, the additional function integrated logic circuit element only needs a small-scale circuit for the control function, and an integrated logic circuit that performs basic logic processing. Element I also has a simpler circuit because there is no need to incorporate circuitry that takes into account application to many applications. Furthermore, since multiple devices are operated in synchronization with a program, high-density coupling can be achieved between multiple devices. Even for complex objects, it is possible to sequentially change the order of operations and input/output data between multiple elements, and even for multiple types of integrated logic circuit elements that use this type of control method. The same additional function integrated logic circuit elements can be applied flexibly.

[Brief explanation of the drawing]

The drawings are diagrams showing embodiments of the invention. ■ ・・・・・・・・・Main integrated logic circuit elements,
■・・・・・・Additional function integrated logic circuit element, ■
・・・・・・・・・Program memory, 1-・・・・・・
...Program address register, 2...
...+1 adder, 3...Selector, 4 ......Instruction register, 5...
...Instruction decoder, 6...Registers, 7...Arithmetic unit, 8.9...
...Gate, lO...Instruction decoder, 11...Q operator, 12...
...Registers, 13.14...Gate, 15...Instruction register, 20...
...Judgment device.

Claims (1)

[Claims] In an information processing circuit configuration using a program-controlled integrated logic circuit element that executes an instruction each time an instruction is supplied from the outside, a part of the instruction is provided separately from the integrated logic circuit element. A program control circuit that is also supplied to a circuit element and operates an internal circuit of the integrated logic circuit element and an internal circuit of the separately provided integrated logic circuit element in synchronization.