JPS5850746U - receiving device - Google Patents

receiving device

Info

Publication number
JPS5850746U
JPS5850746U JP12331782U JP12331782U JPS5850746U JP S5850746 U JPS5850746 U JP S5850746U JP 12331782 U JP12331782 U JP 12331782U JP 12331782 U JP12331782 U JP 12331782U JP S5850746 U JPS5850746 U JP S5850746U
Authority
JP
Japan
Prior art keywords
signal
receiving device
output
circuit
rest time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12331782U
Other languages
Japanese (ja)
Inventor
中田　昭雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP12331782U priority Critical patent/JPS5850746U/en
Publication of JPS5850746U publication Critical patent/JPS5850746U/en
Pending legal-status Critical Current

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  • Emergency Alarm Devices (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図はこの考案品の電気回路図、第２図は送信装置と
組合せた状態図、第３図は送信装置の電気回路図である
。 １・・・・・・同調回路、２・・・・・・無信号検出回
路、３・・・・・・可聴信号発生器、４・・・・・・パ
ルス発生回路、５・・・・・・送信回路、６・・・・・
・タイマー回路。FIG. 1 is an electric circuit diagram of this device, FIG. 2 is a state diagram of the device in combination with a transmitter, and FIG. 3 is an electric circuit diagram of the transmitter. 1... Tuning circuit, 2... No signal detection circuit, 3... Audible signal generator, 4... Pulse generation circuit, 5... ...Transmission circuit, 6...
・Timer circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] １　　　　　ワイヤレスの信号を送信する送信装置に対
して、該ワイヤレスの信号を受信する為の同調回路を設
け、該同調回路の出力は無信号検出回路に接続され、該
無信号検出回路の無信号時出力で、可聴信号発生器を作
動させる受信装置に於て、前記送信装置のワイヤレス信
号を一定の休止時間を持つパルス信号とすると共に、受
信装置の無信号検出回路にはタイマー回路を内装し、休
止時間を持つパルス信号に対して休止時間より長い無信
号検出時、可聴信号発生器を作動させることを特徴とす
る受信装置。1. A transmitting device that transmits a wireless signal is provided with a tuning circuit for receiving the wireless signal, and the output of the tuning circuit is connected to a no-signal detection circuit, and the output of the no-signal detection circuit is determined when there is no signal. In a receiving device that operates an audible signal generator as an output, the wireless signal of the transmitting device is made into a pulse signal with a certain rest time, and a no-signal detection circuit of the receiving device is equipped with a timer circuit, A receiving device that operates an audible signal generator when detecting no signal longer than the rest time for a pulse signal having a rest time.
JP12331782U 1982-08-14 1982-08-14 receiving device Pending JPS5850746U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12331782U JPS5850746U (en) 1982-08-14 1982-08-14 receiving device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12331782U JPS5850746U (en) 1982-08-14 1982-08-14 receiving device

Publications (1)

Publication Number Publication Date
JPS5850746U true JPS5850746U (en) 1983-04-06

Family

ID=29917222

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12331782U Pending JPS5850746U (en) 1982-08-14 1982-08-14 receiving device

Country Status (1)

Country Link
JP (1) JPS5850746U (en)

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