JPS5850720U - Muting circuit - Google Patents
Muting circuitInfo
- Publication number
- JPS5850720U JPS5850720U JP14024081U JP14024081U JPS5850720U JP S5850720 U JPS5850720 U JP S5850720U JP 14024081 U JP14024081 U JP 14024081U JP 14024081 U JP14024081 U JP 14024081U JP S5850720 U JPS5850720 U JP S5850720U
- Authority
- JP
- Japan
- Prior art keywords
- switching means
- frequency amplifier
- low
- muting circuit
- turned
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Control Of Amplification And Gain Control (AREA)
- Noise Elimination (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
図面は本考案に係るミューティング回路の実施例を示す
回路図である。
Ａ・・・・・・低周波増幅器、Ｃ１・・・・・・出力コ
ンデンサ、ＳＱ・・・・・・スケルチ信号、Ｓ工・・・
・・・第１のスイッチング手段、Ｓ２・・・・・・第２
のスイッチング手段、ＳＰ・・・・・・スピーカー、十
Ｂ・・・・・・電源。The drawing is a circuit diagram showing an embodiment of a muting circuit according to the present invention. A...Low frequency amplifier, C1...Output capacitor, SQ...Squelch signal, S engineering...
. . . first switching means, S2 . . . second
Switching means, SP...Speaker, 10B...Power supply.
Claims (1)
るように構成されている受信機用低周波増幅器において
、 スケルチ信号によって制御されて上記低周波増幅器の電
源のオン・オフを制御するための第１のスイッチング手
段と、上記スケルチ信号によって制御され、上記第１の
スイッチング手段による電゛ 源オフ時に上記低周波
増幅器の能動素子を開放状態となるように制御するため
の第２のスイッチング手段とを備えたことを特徴とする
ミューティング回路。[Claims for Utility Model Registration] In a low-frequency amplifier for a receiver configured to block direct current to a speaker by an output capacitor, the power supply of the low-frequency amplifier is turned on and off by being controlled by a squelch signal. a first switching means for controlling the low frequency amplifier; and a second switching means for controlling the active element of the low frequency amplifier to be in an open state when the power is turned off by the first switching means, which is controlled by the squelch signal. A muting circuit characterized in that it is equipped with a switching means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14024081U JPS5850720U (en) | 1981-09-21 | 1981-09-21 | Muting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14024081U JPS5850720U (en) | 1981-09-21 | 1981-09-21 | Muting circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5850720U true JPS5850720U (en) | 1983-04-06 |
Family
ID=29933410
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14024081U Pending JPS5850720U (en) | 1981-09-21 | 1981-09-21 | Muting circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5850720U (en) |
-
1981
- 1981-09-21 JP JP14024081U patent/JPS5850720U/en active Pending
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