JPS5850677Y2 - AGC circuit - Google Patents

Description

[Detailed Description of the Invention] The AGC circuit for video signals is configured as shown in FIG.

That is, the video signal from the input terminal 1 passes through the buffer amplifier 2, the gain control circuit 3, the amplifier 4, and the output terminal 5.
The video signal obtained at the output terminal 5 is supplied to the level detection circuit 6, and the synchronization signal PH is clamped to a constant level ES as shown in FIG. The level EP of the pedestal is detected, and the detected output is supplied as a gain control voltage to the gain control circuit 3 through the low-pass filter 7 and the DC amplifier 8 to control the gain.

By the way, when a human-powered video signal is reproduced from a magnetic tape or the like, and when the signal is reproduced by so-called Mviora reproduction or still motion reproduction, so-called guard band noise occurs because the head straddles adjacent tracks. occurs.

If there is guard band noise NG in the input video signal as shown in FIG. 3A, the level at the pedestal position taken out from the level detection circuit 6 changes greatly at the guard band noise as shown in FIG. 3B. However, the voltage obtained from the low-pass filter 7 is in a state in which an error due to noise is integrated for a period of time equal to the time constant of the filter 7, as shown by line 9 in FIG.

Therefore, the level of the controlled output video signal taken out to the output terminal 5 fluctuates after the guard band noise, as shown in the figure.

A method for improving this is shown in FIG. 4A.

It is also possible to supply the level detection output taken out from the level detection circuit 6 at the pedestal position to a limiter, and supply the output of this limiter shown in FIG. .

It is also possible to make the time constant of the low-pass filter 7 sufficiently large, but if you do this, as shown in Figure 4C, the error will shift by the noise integral value JV, and the overall level of the output video signal will change. The target will change.

In consideration of this point, the present invention maintains the previous error while there is an abnormal input such as guard band noise, so that the level of the output video signal fluctuates due to the abnormal input such as guard band noise. This is to prevent it from happening.

Hereinafter, a specific example of the present invention will be explained with reference to FIG. 5 and subsequent figures.

In FIG. 5, reference numeral 13 denotes a gain control circuit, and an MO8 whose gate is a resistance layer serves as a variable impedance element for control between the emitters of the transistor 21 and the transistor 32.
FET 23 is connected, input terminal 11 is led out from the base of transistor 21, and a negative polarity input video signal is supplied to this, and a controlled video signal is taken out from the collector of transistor 22, which is transmitted through emitter follower transistor 24. , the amplifier 14, and the emitter follower transistor 25 to the output terminal 15.

The video signal obtained at the output terminal 15 is supplied through an amplifier 26 to a level detection circuit 16 that detects the level of the pedestal.

The level detection circuit 16 includes a clamp circuit 27 and a gate circuit 3.
It consists of 0.

The clamp circuit 27 includes transistors 28 and 29, and the synchronization signal of the output video signal is clamped to a constant level.

The gate circuit 30 has a switching FET 31, the video signal clamped by the clamp circuit 27 is supplied to its drain, and this clamped video signal is also supplied to the synchronization pulse separation circuit 32 to generate the synchronization pulse. This is taken out and supplied to the monostable multivibrator 33 to obtain a pulse having a constant pulse width from the synchronization pulse, which is supplied to the monostable multivibrator 34 to obtain a negative pulse at the pedestal position, and this negative pulse At this point, the transistor 35 turns on, which turns on the FET 31, and the pedestal level of the clamped video signal is taken out from the FET 31.
This level detection output is taken out through the Nance Hollow FET 31.

The level detection output taken out from the FET 37 is supplied to the hold capacitor 52 through the gate FET 51, and the voltage obtained at the hold capacitor 52 is used as a gain control voltage through the amplifier 18 as a variable impedance element of the gain control circuit 13 described above. MO8FET2
It is supplied to the gate which is made into a resistance layer of No. 3.

As a result, the impedance of the MO8FET 23 is controlled, the gain in the gain control circuit 13 is controlled, and the level of the output video signal is made constant.

In this case, by adjusting the volume 53, the control voltage supplied to the gain control circuit 13 can be adjusted, and therefore the level of the output video signal obtained at the output terminal 15 can be adjusted.

Then, the level detection output taken out from the FET 37 is supplied to the level comparison circuit 41.

The level comparison circuit 41 includes two level comparators 42 and 43.
When the level detection output is pressed to the level comparator 42, it is compared with a certain upper limit level vH, and when it becomes larger than this, a negative pulse is obtained, and in the level comparator 43, It is compared with a certain lower limit level vL, and when it becomes smaller than this, a negative pulse is obtained, and both are combined in the AND circuit 44.

When there is guard band noise NG in the input video signal as shown in FIG. change,
The level exceeds the range of the above-mentioned levels vH and vL, and the level comparators 42 and 43 produce negative pulses Pc and PD as shown in FIG.
As shown in Figure E, the negative pulse P in which both are combined
E is obtained.

This pulse PE is supplied to the NAND circuit 45, and the Ridrigger type monostable multivibrator 46 is triggered by the pulse PE of Mataco, and the output pulse is sent to the NAND circuit 45.
supplied to

Then, when the output of the NAND circuit 45 becomes "1", the transistor 47 is turned off, and the gate FET 51 described above is turned off.
is turned off.

The time period 1 during which the Ridrigger type monostable multivibrator 46 maintains the metastable state is, for example, two horizontal periods.

Therefore, when there is guard band noise as described above, the detection output of the level at the pedestal position obtained from the FET 37 of the level detection circuit 16 is higher than the above-mentioned level vH or higher than the level vL at a time interval within at least two horizontal periods. Since the interval between the negative pulses PE is within two horizontal periods, the ridrigger type monostable multipipe I/-46 is in a state where guard band noise exists, as shown in Figure 6F). The output PF continues to be in the "O" state.

Therefore, while the guard band noise is present, the output PG of the NAND circuit 45 becomes "1" as shown in FIG. G, the transistor 47 is turned off, and the gate FET 51 is turned off.

That is, while guard band noise exists, the pedestal level detection output taken out from the FET 37 of the level detection circuit 16 is not supplied to the hold capacitor 52, and guard band noise occurs in the control voltage obtained at this capacitor 52. Retains the previous value.

Then, if the guard band noise disappears, the gate FE
T51 is turned on and the pedestal level detection output is supplied to the capacitor 52.

Therefore, the control voltage is not affected by the guardband noise, that is, the error due to the noise is not integrated, and the output video signal has a level after the guardband noise, as shown in Figure 6H. will not change.

As described above, the present invention has the advantage that the output level does not fluctuate due to abnormal input such as guard band noise.

[Brief explanation of the drawing]

Fig. 1 is a system diagram of an example of an AGC circuit, Figs. 2 to 4 are waveform diagrams for explaining the same, and Fig. 5 is an AGC circuit according to the present invention.
A connection diagram of an example of the circuit, and FIG. 6 is a waveform diagram for explaining the connection diagram. 11 is a video signal input terminal, 13 is a gain control circuit, 15 is a video signal output terminal, 16 is a level detection circuit, 51 is a gate FET, 52 is a hold capacitor, 41 is a level comparison circuit, 46 is a redriger It is a monostable multivibrator.

Claims (1)

[Scope of utility model registration request] A gain control circuit connected between an input terminal to which a video signal is supplied and an output terminal from which a gain-controlled video signal is taken out, and a level detection circuit to detect the pedestal level of the video signal from the input terminal or output terminal. a switching element that gates the output of this level detection circuit; a holding capacitor to which the output of this switching element is supplied to obtain a gain control voltage supplied to the gain control circuit; and a holding capacitor that gates the output of the level detection circuit; a level comparison circuit which forms a first pulse signal when the level exceeds one level, and forms a second pulse signal when the level falls below a second level; a control circuit configured to turn off the switching element when the first pulse signal or the second pulse signal is generated, and when the switching element is turned off, the control circuit holds the output of the level detection circuit. AGC whose supply of capacitors is blocked
circuit.