JPS5845699A - Memory protection circuit - Google Patents

Abstract

PURPOSE:To prevent the destruction of content of storage in a memory protection area at a failure, by providing a means which can designate the memory protection area in the hardware, by means of jumpers. CONSTITUTION:In designating a memory protection area with a software instruction so that the content of a storage device can not be destructed, parts shown in broken lines (b) of a jumper set circuit 9 are jumpered. In fixing the hardware, parts as shown in a broken line (a) of the circuit 9 and a broken line (c) for the output of an access area selection circuit 8 for the area to be memory-protected, are jumpered. That is, an output of a memory address comparison circuit 2 set with the software instruction is inactivated as the broken line (a) of the circuit 9 and an arbitrary protection area is jumpered with one or a plurality of designations for the broken line (c) of the circuit 9.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to memory protection for preventing content destruction of a storage device W.

Information processing devices that read out information one by one from a storage device, decipher it, and execute it have become common, ranging from microconbeaters to large converters and switchboards. As a means for preventing this, the following memory protect circuit has conventionally been used.

FIG. 1 shows a general interface unit with a storage device. 1 is a memory access request reception circuit that accepts multiple memory access requests, performs competition, waiting control, etc.; 2;
5 is an order N-fold circuit that analyzes the order of various access requests (such as load, store, refresh, etc.), and 5 is a memory protection designation circuit that specifies the area to be protected by software instructions before memory access. , 4 compares the memory protect area set in the memory protection designation circuit 5 with the memory address to be accessed, and inputs a memory write enable to the storage device only when the order analysis circuit 2 determines that it is a store request. 5 is a memory conflict management circuit that smoothly controls the order analysis circuit 2, comparison circuit 4, etc.

Further, FIG. 2 shows in detail the portion 4 related to memory protection in FIG. 1. In Fig. 2, 6 is a memory protection designation circuit, and the memory 70 is an area unit of any size that you want to protect.
have multiple . Reference numeral 7 denotes a memory address comparison circuit that determines whether an address within the memory protect area designated by 6 is accessed.

In FIG. 1, memory protection is required only when a store is requested, and access is enabled during other orders. In FIG. 2, there may be a plurality of areas to be memory protected, and when the area matches the access memory address, memory write enable output is prohibited.

In the case of such a conventional method, a memory protection area can be specified using only a command, and is therefore very effective at a time when software is not yet established, such as during system development. (
Established software should be protected and prevented from being destroyed.

)However, after the software has been developed and is ready for operation, at that point the protected areas F and F that have been specified due to an arbitrary external factor.

If a card is sent, there is a risk that the memory contents will be destroyed and the system will go down.

An object of the present invention is to eliminate the drawbacks of the prior art described above, to prevent the storage contents of the memory protect area from being destroyed in the event of a failure, and to provide a complete memory protect circuit that can easily protect the memory both during development and during operation. It is about providing.

In order to achieve the above object, the present invention provides means for specifying a memory protect area using a software instruction to prevent the contents of a storage device from being destroyed, as in the past, and a means for specifying a memory protect area using a software instruction during software stabilization. In this case, a means for specifying a memory protect area using a jumper is provided.

FIG. 5 shows a memory protect circuit actually configuring the present invention. 6 and 7 are a memory protect designation circuit and a memory address comparison circuit which are designated by software as in FIG. Is 8 the address when memory is accessed? An access area select circuit decodes the data and converts it into a protect area unit level, and 9 is a jumper setting circuit that uses jumper III to specify whether or not to set protection for each protect area.

In FIG. 5, when a memory protect area is designated by a software instruction to prevent the contents of the storage device from being destroyed, as in the conventional case, the jumper .largecircle. In addition, if you want to fix the memory protect area by hardware without specifying the memory protect area by a software command, put a jumper on the jumper setting circuit 9 (■) and the area you want to protect memory as shown in the access area select circuit 8 and (■). .

In other words, the output of the memory address comparison circuit 2 set by the 77 gt instruction is inactivated with the @ of the jumper setting circuit 9, and an arbitrary protect area is set with a jumper line by specifying one or more @ of the jumper setting circuit 9. do.

As explained above, according to the present invention, unlike the conventional method, the memory contents of the memory protected area are not easily destroyed by software, and memory protection can be easily performed during both development and operation. It is possible to provide a memory protection circuit that can perform

[Brief explanation of drawings]

Figure 1 is a conceptual diagram of a general interface with a storage device.
FIG. 2 is a conventional memory protection circuit diagram, and FIG. 5 is a diagram showing an embodiment of the memory protection circuit according to the present invention. 1: Memory access request reception circuit, 2: Order analysis circuit, 5 = Memory protection specification circuit, 4: Comparison circuit, 5: Memory conflict management circuit, 6: Memory protection specification circuit, 7: Memory address comparison circuit, 8: Access Area select circuit, 9: Jumper setting circuit. Agent Patent Attorney Susuki 1) Toshiyuki 3 regrets ll-1zoX! timesαtsu← ゝ■ ゛eagle; qtsu\Q Q 1to,

Claims (1)

[Claims] 1. Multiple memory access requests in an information processing device that reads information one by one from a storage device, decodes and executes it? It has a circuit for accepting, a circuit for identifying a write signal of a memory access request, and a comparison circuit for determining whether the memory protect area matches the memory area to be accessed, and the storage contents of the storage device are not destroyed only when writing to the memory. A means for setting and protecting a memory protect area before memory access using a software instruction, and a means for setting and protecting a memory protect area by having a plurality of memory area designation terminals and connecting arbitrary terminals; 1. A memory protection circuit comprising: a memory protection means setting terminal; and means for selecting the two protection means by connecting an arbitrary terminal.