JPS5873099A - Data processor - Google Patents

Abstract

PURPOSE:To prevent the runaway of a program, by comparing an address signal in an address bus and an upper/lower limit address at each accessing of a stack memory and generating an interrupting signal to a CPU when both the address are coincident. CONSTITUTION:When a program advances and write is done for all stack area SM, since a value 7,000 set to an upper limit register 4 and an address 7,000 instructed to a memory 2 via a bus B from a stack pointer SP are made equal, a coincidence circuit 6 outputs an interruption signal INT. A CPU1 receives it and writes the content from the address 7,000 of the stack memory SM to the address 7FFF is written in a floppy disc 3 at an upper limit coincidence interruption processing routine, then the SM is vacant and the SP in the CPU1 is reset to the address 8,000. Thus, the program runaway when the stack pointer overflows, can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a data processing device having a last-in, first-out memory, that is, a stacked memory, and particularly relates to a
This invention relates to a device in which, when a starter pointer is overflowed, the overflowed data is saved to a secondary storage device.

Commercially available 8-bit microprocessors have one stack pointer in 5, but if the stack pointer exceeds 7
In a data processing device using a CPU without a function of checking 0-, it is difficult to determine how much memory capacity to allocate to the stack area. If the stack consumption is predictable (in which case you can calculate the maximum consumption value), if not, you can try running the boogram once or use worst-case test data. We conducted experiments to create and process
Usually, the size of the stack area is determined. However, these methods do not fundamentally solve the problem caused by stack pointer overflow. For example, if it cannot be reproduced in a real-time control application, the stack consumption is based on unknown data, which often leads to fatal runaway.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a data processing device which eliminates the above-mentioned drawbacks and eliminates the potential danger of a program due to stack pointer overflow.

The present invention has a stack pointer overflow check function, and even when the stack pointer exceeds 70, the overflow data is temporarily saved from the stack memory using a secondary storage device, and data processing continues. It is characterized by being harmonized so that it can be performed easily.

Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the data processing apparatus of the present invention. Here, 1 is a central processing unit (CPU) having a stack pointer sp, 2 is a memory, and 3 is a floppy disk, and these are connected via a path. It is assumed that the CPU 1 uses a certain area in the memory, for example, from address 7000 in hexadecimal to address 7FFF, as the stack memory SM. Here, assuming that the stack memory 8M extends in the direction of address 0 (in the first direction upward, that is, in the direction indicated by oooo near the bus),
CPU 1 sets 1000 for upper limit register 4 & C and c 5ooo for lower limit register 611C 1, 6
and f are matching circuits. Furthermore, the stack pointer gF in CPU I is soo when the stack memory 8M is empty.

is initialized to . Here, the stack pointer SP always writes (writes, pwsh-d@vn
) is a register that indicates the address of the current topmost element. Therefore, one element is pushed into the above-mentioned empty stack memory 8M, and the stack pointer points to 7FFF.

7000 when the stack memory SM is full
will be instructed.

Now, when the program starts running and the entire stack area is written, the value 7000 set in the upper limit register 4 and the address 7000 specified by the stack from the ink BF to the memory 2#C via the bus l are Since they are equal, the six matching circuits output an interrupt signal INτ. C.P.
U1 is the upper limit match percentage in the interrupt processing routine that is activated by the interrupt signal INT W-.

Stack memo 9 BM's 70 with "Including jl&ll routine"
Write the contents of address 7FFF from address 00 to 70TB disk 3. As a result, the stack memory is 8M it
It becomes empty and the stack pointer 5pit8 in CPU i
It is reset to 000 and the interrupt MIJ is terminated.

Furthermore, when the program continues to run, stack memory 8M spaller datagram elements are sent, and if the stack memory is not full, even if the sending of written contents is stopped at &f address γλAM, the stack pointer 8P is AAAK is set. Stack memory B
When M becomes full again, that is, 7000 K, the contents from 1000 to 7FFF in the stack are written to floppy disk 3#C, and the stack pointer SP is easily set to 000 K, as described above. moreover,
When the stack memory 8M becomes full, similar processing is performed.

Next, let us consider a case where a pop-up (pot-up) is performed when the stack memory 8M becomes empty. In other words, the stack pointer SP exceeds 7FFF and becomes 5oo.
When an attempt is made to pop the contents of address o, a signal of address 8000 flows on bus B, so coincidence circuit 7 outputs an interrupt signal. cpυ1 reads the data of the last written block from the floppy disk 3 by the [lower limit match interrupt processing routine] in the interrupt processing routine activated by the interrupt signal INT.
Store from FFF to stack memory SM with 7000 write locations.

After this operation is completed, set the stack pointer SP to 760
The flag is set to 0, the pop operation is restarted, and the interrupt processing is ended.

From then on, no matter how the push and pop operations continue in any order, the stack pointer 8P remains between the -high and low limits.
That is, as long as the value is between 7000 and 7FFF, the stack memory 8M is used normally, and if it matches either of the upper or lower limits, the "interrupt processing routine" corresponding to the above-mentioned sum is executed. This is 1 in 5. Thus, program processing continues without being aware of the overflow of the stack pointer 8P.

Here, the above-mentioned [interrupt processing routine] will be explained from a different perspective. Figure 2 shows a schematic diagram of the entire memory assuming that a large stack is formed, including the data on the floppy disk 3. Here, the ``upper limit match interrupt handling routine'' is executed three times in a row. It shows the state of memory after being exposed. In the above example, floppy disk 3 contains ! for each address! If you are assigning a word,
It is considered that the push and pop operations are performed on the floppy disk 3#c in push unit with approximately 4 words as one block. Pointer D8P indicating the current position of the memory contents in the floppy disk 3
can be considered a pointer to the floppy disk S. Since the stack is in the memory 2, considering that the upper limit current address of the stack is indicated in detail by the stack pointer SP, the related operations between the stack in the memory 2 and the 70-bit disk 3 in the example shown in the iris 1 can be easily performed. Decomposed.

In the embodiment illustrated in v11, the stack pointer 8P mentioned above is different from the stack pointer used for interrupt control, but all the registers in the part KCPUI other than the stack area in the memory 2 are If there is enough room for allocation, a common stack pointer can be used for the stack area and other memory parts.

As is clear from the above description, according to the data processing device of the present invention, it is not necessary to determine in advance how much memory capacity should be allocated to the stack area, so the stack pointer may exceed 70 -. This method prevents program abuse and allows programs to be executed without interruption, even in cases where the program is not interrupted, and provides an effective stacking method even when using a microprocessor that does not have a flow check function that is generally available on the market. can do.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is an explanatory diagram of the operation of FIG. 1. 1...CPU, 2...Memory, 3
···floppy disk. 4... Upper limit register, 5... Lower limit register,
6.7... Match circuit, B... Path, sp-... Stack pointer, INT...
...Interrupt signal, DBP...floppy disk pointer. Patent applicant Canon Co., Ltd. agent Patent attorney Yoshi Tani - Figure 1 Figure 2

Claims (1)

[Claims] 1) A stack memory and a register storing the upper limit address and lower limit address of the stack memory, respectively, are connected to a medium-terminal device via an address bus.
The device compares the address signal in the address bus with the upper and lower limit addresses each time the stack memory is accessed, and when the two addresses match, generates an interrupt signal to the central processing unit. . A data processing device with 41 images. 2. In the apparatus according to claim 1, "C, a part or all of the memory contents in the stack memory are processed by the interrupt signal generated by the coincidence of the upper limit address and the address signal. A portion of the memory contents saved in the secondary storage device are restored to the stack memory by the interrupt signal generated by the match between the lower limit address and the address signal. A data processing device with 4I characteristics.