JPS5843933B2 - D-A converter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a D-A converter, and particularly to a D-A converter that can extremely reduce power consumption no matter when the power is turned off. .

A DA converter converts a digital signal into a corresponding analog signal, and in recent years has come to be used in electronically tuned receivers having a memory function.

FIG. 1 shows an embodiment of a conventional D-A converter circuit with a memory function.
A conversion processing section 2 and 3 are resistors and capacitors 5 forming a low-pass filter that passes only the output low frequency portion of the DA conversion processing section 1 and supplies an analog signal to the output terminal 4.
stores the digital input, and corresponding to this stored value, D-A
6 is a clock oscillator that supplies clock signals to the DA converter 1 and the memory 5; 7 and 8 are power inputs for the DA converter 1, the clock oscillator 6, and the memory 5; When the power is turned off, the discharge current of the capacitor 8 constitutes an auxiliary power source.

Reference numerals 9 and 10 denote resistors and capacitors constituting an enable signal generating section that supplies disable signals to the DA conversion processing section 1, memory 5, and clock oscillator 6 when the power is turned off.

In the D-A converter configured in this way, the power supply Vc
When c is supplied, this power supply Vcc charges the capacitor 8 through the diode 7 and is then supplied to each part.

Furthermore, as power is supplied, the capacitor 10 is charged via the resistor 9, thereby releasing the disable signal to each circuit.

In this state, when a digital input signal is supplied to the D-A conversion processing section 1, the D-A conversion processing section 1 generates a pulse signal with a period or width corresponding to the input value in response to the output of the memory 6. Send.

The pulse signal sent from this D-A conversion processing section 1 is
For example, the signals will be as shown in FIGS. 2a and 2b.

The output signal of this DA conversion processing section 1 is converted into an analog signal shown by dotted lines in FIG.

Next, when the power supply Vcc is turned off for some reason, the output of the enable signal generation circuit made up of the resistor 9 and the capacitor 10 becomes L++, which supplies a disable signal to each circuit, and at that moment Operation stops.

However, in the D-A converter having the above-described configuration, current consumption becomes extremely large depending on the timing at which the disable signal is generated.

In other words, the output stage of the D-A conversion processing section 1 is composed of CMO8, etc., and when the disable signal is supplied and stopped while the output signal is in the 'H'' state, the output signal continues to flow to the load. As a result, the charge in the capacitor 8 serving as an auxiliary power source is instantly discharged.

Furthermore, when the enable signal is generated when the output signal of the D-A conversion processing section 1 is "L+1", the current consumption in this part disappears and becomes only the static current for holding the memory 5, which is extremely small. Therefore, memory retention by the capacitor 8 can reach several tens of hours.

As described above, in the conventional DA converter, the current consumption changes significantly depending on the generation timing of the disable signal, and the holding time varies.

The probability that this holding time becomes longer is lower in the case of FIG. 2a, where the "H" level period is longer.

This invention was made to eliminate the above-mentioned drawbacks, and will be described in detail below with reference to the drawings.

FIG. 3 is a circuit diagram showing an embodiment of the DA converter according to the present invention, and the same parts as in FIG. 1 are designated by the same symbols.

In the figure, 11 is an inverter that inverts the power output;
2 is an inverter that inverts the output of the D-A conversion processing unit 1;
Reference numeral 13 denotes a Nant gate which receives the outputs of both inverters, and constitutes an enable signal generating section.

In the circuit configured in this way, when the power is turned off, the output of the inverter 11 becomes "H".

Then, when the output of the DA conversion processing section 1 also becomes "L", the output of the inverter 12 also becomes "H", and at this point the output of the Nant gate 13 becomes 'L' for the first time, and an enable signal is sent out.

In other words, in this circuit, the disable signal is generated only when both the power supply and the output of the D-A conversion processing section 1 become "L?+".
The A conversion processing section 1 stops only when the output is "Ln", thereby preventing power consumption and saving power.

It goes without saying that the power supply of the enable signal generating circuit composed of the inverters 11, 12 and the Nant gate 13 is maintained until the sending of the disable signal is completed.

In the above explanation, each part was controlled using a disable signal, but the same effect can be obtained by using an enable signal if polarity is considered.

As explained above, the D-A converter according to this explanation is
Since the configuration is such that the disable signal is generated only at the timing when both the power supply and the output of the D-A conversion processing section are "Lll", the power consumption when the enable signal is generated is limited to the memory holding current. Therefore, the memory can be reliably retained by the auxiliary power supply when the power is turned off.

[Brief explanation of drawings]

Figure 1 is a circuit diagram showing a conventional D-A converter, Figure 2a,
b is a waveform diagram showing the output side of the D-A converter shown in FIG. 1, and FIG. 3 is a circuit diagram showing an embodiment of the D-A converter according to the present invention. 1...D-A conversion processing section, 2...Resistor, 3, 8...Capacitor, 5...Memory, 6... Clock oscillator, 7...diode, 11.12...inverter, 13.
...Nantes Gate.

Claims (1)

[Claims] 1. A power source that supplies power supply voltage via an auxiliary power source, a memory that stores digital input values and holds the memory using the auxiliary power source, and a D-A conversion process that generates a pulse signal with a period or width corresponding to the memory output. In a D-A converter having a D-to-A conversion processing section, a disable signal is output by detecting that both the power supply output and the output of the D-A conversion processing section are "L".
- A DA converter comprising an enable signal generation circuit for supplying to an A conversion processing section.