JPS5843226Y2 - Element inspection equipment - Google Patents

Element inspection equipment

Info

Publication number
JPS5843226Y2
JPS5843226Y2 JP16268277U JP16268277U JPS5843226Y2 JP S5843226 Y2 JPS5843226 Y2 JP S5843226Y2 JP 16268277 U JP16268277 U JP 16268277U JP 16268277 U JP16268277 U JP 16268277U JP S5843226 Y2 JPS5843226 Y2 JP S5843226Y2
Authority
JP
Japan
Prior art keywords
section
inspection
punching
classification
sample detection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP16268277U
Other languages
Japanese (ja)
Other versions
JPS5488271U (en
Inventor
信雄 中村
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP16268277U priority Critical patent/JPS5843226Y2/en
Publication of JPS5488271U publication Critical patent/JPS5488271U/ja
Application granted granted Critical
Publication of JPS5843226Y2 publication Critical patent/JPS5843226Y2/en
Expired legal-status Critical Current

Links

Description

【考案の詳細な説明】 本考案は素子の性能検査工程における所要時間を短縮す
る制御装置に関するものである。
[Detailed Description of the Invention] The present invention relates to a control device that reduces the time required in a device performance testing process.

一般に、数字表示素子、フオ′トトランジスタ又は発光
ダイオードの如く数個をフレームに取り付けた状態で製
造される素子の性能検査工程では、供給のしやすさを考
慮して被検査素子をフレームに10個前後取り付けた状
態で検査を行なっている。
In general, in the performance testing process for elements such as numeric display elements, photo transistors, or light emitting diodes, which are manufactured by attaching several pieces to a frame, the elements to be tested are mounted on a frame for 10 minutes in consideration of ease of supply. Inspections are conducted with each unit installed.

1ピツチ送る(素子1個分)のに要する時間をtl、前
記素子1個の電気的特性を検査するために要する時間を
t2、素子を取付板から打抜き、分類するのに要する時
間をt3.1枚のフレームを供給してから取り出すまで
に必要な送りピッチ数をNとすると供給してから取り出
すまでの所要時間は(t 1+ t 2+ t 3)
XN(秒〕で表わされる。
The time required to feed one pitch (for one element) is tl, the time required to inspect the electrical characteristics of one element is t2, the time required to punch out the element from the mounting plate and classify it is t3. If the number of feed pitches required from supplying one frame to taking it out is N, the time required from supplying to taking it out is (t 1 + t 2 + t 3)
It is expressed in XN (seconds).

従来この種の装置においては装置の機械的な大きさ、制
御のしやすさを考慮してフレーム1枚供給から取り出し
までの送りピッチ数Nを30前後(フレーム2〜3枚分
)としまた1ピツチ送るために要する時間t 1.素子
1個の電気的特性を検査するために要する時間t2およ
び打抜き分類するのに要する時間t3の間にはt2>t
l>t3の関係がある。
Conventionally, in this type of device, the number of feed pitches N from feeding one frame to taking it out was set at around 30 (for 2 to 3 frames) in consideration of the mechanical size of the device and ease of control. Time t required to send pitches 1. Between the time t2 required for inspecting the electrical characteristics of one element and the time t3 required for punching and classification, t2>t.
There is a relationship l>t3.

そして検査部または打抜分類部に被検査素子がない場合
にはt2.t3が不要にもかかわらず送り動作の周期に
tl+t2+t3を要していたので被検査素子の供給か
ら取出しまでに(t2+t3)Ni分だけ無駄時間が発
生する欠点があった。
If there is no element to be tested in the inspection section or punching classification section, t2. Although t3 is unnecessary, the period of the feeding operation requires tl+t2+t3, so there is a drawback that a wasted time equal to (t2+t3)Ni is generated from supplying to taking out the device to be tested.

ここにNiは検査部または打抜分類部に被検査素子がな
い場合に送るピッチ数である。
Here, Ni is the number of pitches to be sent when there is no device to be tested in the inspection section or the punching and classification section.

本考案の目的は、上述の欠点を除去し、電子回路で構成
することにより容易に素子の性能検査工程における所要
時間を短縮する素子検査装置を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide an element testing apparatus that eliminates the above-mentioned drawbacks and easily shortens the time required in the element performance testing process by being configured with an electronic circuit.

本考案によれば、送り部、検査部及び打抜分類部から戒
す、前記検査部での被検査素子の有無を検出し検査部の
駆動を制御する第1試料検出部と、前記打抜分類部での
被検査素子の有無を検出し打抜分類部の駆動を制御する
第2試料検出部と、前記送り部、検査部および打抜分類
部が全て非駆動状態の場合にパルスを発生するトリガパ
ルス発生部と、このトリガパルス発生部の出力信号によ
り一定間隔のタイミング信号を発生するタイミングパル
ス発生部と、このタイミングパルス発生部の出力信号に
より、前記送り部、検査部および打抜分類部の駆動信号
を発生する駆動信号発生部とを備えた素子検査装置が得
られる。
According to the present invention, the first sample detection section detects the presence or absence of an element to be tested in the inspection section and controls the drive of the inspection section, which is detected by the feeding section, the inspection section, and the punching classification section; a second sample detection section that detects the presence or absence of an element to be inspected in the sorting section and controls the driving of the punching and sorting section, and generates a pulse when the feeding section, the inspection section, and the punching and sorting section are all in a non-driving state. a trigger pulse generating section that generates timing signals at regular intervals based on the output signal of the trigger pulse generating section; According to the present invention, there is obtained an element testing apparatus including a drive signal generating section that generates a drive signal for the section.

以下本考案について図面を参照して詳細に説明する。The present invention will be described in detail below with reference to the drawings.

第1図は本考案の一実施例を示す構成図である。FIG. 1 is a block diagram showing an embodiment of the present invention.

101は被検査素子の1種類である数字表示素子、10
2は数子表示素子101を設置したフレーム、1はフレ
ーム102を検査部および打抜分類部に運ぶ送り部、2
は送り部1より送られた数字表示素子を発光させて電気
的特性を測定する検査部、3は検査部2の測定結果によ
り、数字表示素子101をフレーム102から打抜き、
良品、不良品に分類する打抜分類部である。
101 is a numeric display element which is one type of element to be tested;
2 is a frame in which the numeral display element 101 is installed; 1 is a feeding section that carries the frame 102 to the inspection section and the punching classification section; 2;
Reference numeral 3 indicates an inspection section that makes the numeric display elements sent from the sending section 1 emit light to measure their electrical characteristics; 3 punches out the numeric display elements 101 from the frame 102 based on the measurement results of the inspection section 2;
This is a punching classification section that classifies good products and defective products.

4は送り部1、検査部2および打抜分類部3のどの入力
も論理値O(論理回路における低電位レベル(0〜0.
4 V)の時パルスを発生するトリガパルス発生部で、
その出力は送り部1、検査部2および打抜分類部3の動
作、停止タイミングパルスを発生するタイミングパルス
発生部50入力に接続する。
4 is a logic value O (low potential level in a logic circuit (0 to 0.
A trigger pulse generator that generates a pulse when the voltage is 4 V),
Its output is connected to an input of a timing pulse generator 50 which generates operation and stop timing pulses for the feeding section 1, inspection section 2 and punching and sorting section 3.

6はタイミングパルス発生部5の出力信号により一定期
間論理値1(論理回路における高電位レベル(2,4〜
5V)に保持するクリップフロップ回路等から成る駆動
信号発生部で、その出力は送り部1の入力、第1ゲート
部7の一方の入力および第2ゲート部8の一方に接続す
る。
6 is a logic value of 1 (high potential level in the logic circuit (2, 4 to
5V), and its output is connected to the input of the sending section 1, one input of the first gate section 7, and one of the second gate section 8.

論理積として働く第1ゲート部7の他方の入力は検査部
2に設置しである第1試料検出部9の出力に接続し、第
1ゲート部7の出力は検査部2の人力に接続する。
The other input of the first gate section 7, which acts as a logical product, is connected to the output of the first sample detection section 9 installed in the inspection section 2, and the output of the first gate section 7 is connected to the human power of the inspection section 2. .

第2ゲート部8の他方の入力は打抜分類部3に設置しで
ある第2試料検出部10の出力に接続し、第2ゲート部
8の出力は打抜分類部3の入力に接続する。
The other input of the second gate section 8 is connected to the output of the second sample detection section 10 installed in the punching classification section 3, and the output of the second gate section 8 is connected to the input of the punching classification section 3. .

第1試料検出部9および第2試料検出部10はランプ、
フォトトランジスタ等で構成し、被検査数字表示素子を
検出した時論理値1を出力する。
The first sample detection section 9 and the second sample detection section 10 are lamps,
It is composed of a phototransistor, etc., and outputs a logical value of 1 when a numeric display element to be inspected is detected.

第2図は横軸を時間、縦軸を電圧で表わしたタイミング
図である。
FIG. 2 is a timing diagram in which the horizontal axis represents time and the vertical axis represents voltage.

第1図に示したトリガパルス発生部4の出力をTR、タ
イミングパルス発生部5の出力で送り部1の動作タイミ
ング信号をSl。
The output of the trigger pulse generator 4 shown in FIG.

停止タイミング信号をR1,検査部2の動作タイミング
信号を52、停止タイミング信号をR2打抜分類部3の
動作タイミング信号を53、停止タイミング信号をR3
、駆動信号発生部6の出力で送り部1の駆動信号を01
.検査部2の駆動信号を02、打抜分類部3の駆動信号
を03、第1ゲート部7の出力をGl、第2ゲート部8
の出力を62、第1試料検出部9の出力をDl、第2試
料検出部10の出力をDlとすると、送り部1の駆動信
号θ1は、TRパルスに同期しているため、区間aでは
早い周期で出力される上、第1試料検出部9の出力が論
理値0のときにおけるθ1の周期T2はDlが論理値1
のときにおけるθ1の周期T1の約半分となり送り部1
を早い周期で駆動することが可能となる。
The stop timing signal is R1, the operation timing signal of the inspection section 2 is 52, the stop timing signal is R2, the operation timing signal of the punching classification section 3 is 53, and the stop timing signal is R3.
, the drive signal of the sending section 1 is set to 01 by the output of the drive signal generating section 6.
.. The drive signal of the inspection section 2 is 02, the drive signal of the punching classification section 3 is 03, the output of the first gate section 7 is Gl, and the second gate section 8
Assuming that the output of In addition to being output at a fast cycle, when the output of the first sample detection section 9 is a logic value 0, the cycle T2 of θ1 is such that Dl is a logic value 1.
It is approximately half of the period T1 of θ1 when
can be driven at a fast cycle.

次に図を参照して本実施例の動作を説明する。Next, the operation of this embodiment will be explained with reference to the drawings.

まず送り部1に被検査数字表示素子をセットするととも
に駆動信号発生部6をリセットし駆動信号θ1〜θ3を
論理値Oにした後トリガパルス発生部4からパルスTR
を発生する。
First, the number display element to be inspected is set in the sending section 1, and the drive signal generation section 6 is reset to set the drive signals θ1 to θ3 to the logical value O, and then the trigger pulse generation section 4 generates a pulse TR.
occurs.

この時には送り部1、検査部2、および打抜分類部3の
入力信号が全て論理値Oであるためにパルス発生が可能
である。
At this time, since the input signals of the feeding section 1, inspection section 2, and punching and sorting section 3 are all at the logical value O, pulse generation is possible.

トリガパルス発生部4から出力されたパルスTRは、タ
イミングパルス発生部5に入力され、送り部1の動作タ
イミングSl、停止タイミング信号R1,検査部2の動
作タイミングS2、停止タイミング信号R2および打抜
分類部3の動作タイミング信号S3、停止タイミング信
号R3を出力する。
The pulse TR output from the trigger pulse generator 4 is input to the timing pulse generator 5, and is used to generate the operation timing Sl of the sending unit 1, the stop timing signal R1, the operation timing S2 of the inspection unit 2, the stop timing signal R2, and the punching unit. It outputs an operation timing signal S3 and a stop timing signal R3 of the classification section 3.

駆動信号発生部6では、タイミングパルス発生部5より
出力される動作タイミング信号S1〜S3の立上がりか
ら停止タイミング信号R1〜R3の立上がりまでの間論
理値1の信号を出力する。
The drive signal generator 6 outputs a signal with a logic value of 1 from the rise of the operation timing signals S1 to S3 output from the timing pulse generator 5 to the rise of the stop timing signals R1 to R3.

(01〜θ3) 送り部1に被検査数字表示素子を供給した時点では、検
査部2に設置しである第1試料検出部9および打抜分類
部に設置しである第2試料検出部10の出力DI、D2
は論理値0となっている。
(01 to θ3) At the time when the numerical display element to be inspected is supplied to the feeding section 1, the first sample detection section 9 installed in the inspection section 2 and the second sample detection section 10 installed in the punching classification section Output DI, D2
has a logical value of 0.

即ち、検査部2に最初の被検査数字表示素子が送られて
きて、第1試料検出部9の出力D1が論理値1になるま
でトリガパルス発生部4は送り動作が終了した時点(θ
1が論理値0になる時)でパルスを発生し、また送り動
作を行わせる(θ1を論理値1にする)というように送
り動作だけの繰り返しとなり早送り(θ1のa区間)す
る。
That is, when the first numeric display element to be inspected is sent to the inspection section 2, the trigger pulse generation section 4 generates a signal at the time when the feeding operation is completed (θ
1 becomes a logic value of 0), a pulse is generated, and the feed operation is performed again (theta1 becomes a logic value of 1), and thus only the feed operation is repeated, resulting in fast forwarding (section a of θ1).

検査部2および打抜分類部3に被検査数字表示素子が送
られた場合、即ち第1試料検出部9および第2試料検出
部10の出力DI、D2が論理値1の時は、送り部1、
検査部2および打抜分類部3の入力信号が論理値0(θ
1.G1.G2が全て0レベル)となった時に、トリガ
パルス発生部4がパルスTRを出力し、送り、検査、打
抜分類の動作を行い、以下前記動作を繰り返す。
When the numerical display element to be inspected is sent to the inspection section 2 and the punching classification section 3, that is, when the outputs DI and D2 of the first sample detection section 9 and the second sample detection section 10 are logical value 1, the sending section 1,
The input signals of the inspection section 2 and the punching classification section 3 have a logical value of 0 (θ
1. G1. When G2 becomes all 0 level), the trigger pulse generator 4 outputs the pulse TR, performs the operations of feeding, inspection, and punching classification, and thereafter repeats the above operations.

(周期T1)、送り部1より被検査数字表示素子が断続
的に送られる場合は、第1試料検出部9または第2試料
検出部の出力D1またはD2がOレベルとなり、第1ゲ
ート部7または第2ゲート部8の出力G1またはG2の
出力を0レベルとし検査または打抜分類の動作を行わな
いためトリガパルス発生部4の入力条件が通常の場合よ
りも早いタイミングで満足され検査部2または打抜分類
部3に被検査数字表示素子が来るまで早送りを行なう。
(cycle T1), when the number display element to be inspected is intermittently sent from the sending section 1, the output D1 or D2 of the first sample detecting section 9 or the second sample detecting section becomes O level, and the first gate section 7 Alternatively, since the output G1 or G2 of the second gate section 8 is set to 0 level and no inspection or punching classification operation is performed, the input condition of the trigger pulse generating section 4 is satisfied earlier than in the normal case, and the inspection section 2 Alternatively, fast forwarding is performed until the numeric display element to be inspected arrives at the punching classification section 3.

送り部1に被検査数字表示素子がなくなった場合で第1
試料検出部9の出力が論理値1の間に送り、検査、打抜
分類の動作を繰り返すが、論理値0になると送り、打抜
分類の動作の繰り返しを第2試料検出部10の出力D2
が論理値0になる進行ない(G1のb区間)、従って早
送りを行なう。
If there is no longer a numeric display element to be inspected in the feed section 1, the first
While the output of the sample detection section 9 is at a logical value of 1, the inspection and punching and classification operations are repeated, but when the output reaches a logical value of 0, the output is sent and the punching and classification operations are repeated at the output D2 of the second sample detection section 10.
There is no progress until the logical value becomes 0 (section b of G1), so fast forwarding is performed.

本実施例では被検査素子として数字表示素子を用いたが
、他の素子、例えばフオ))ランジスタや発光ダイオー
ドであっても第1図の構成は全く同じであり、第2図の
タイミング関係図も全く同一である。
In this example, a numerical display element was used as the element to be tested, but even if other elements such as transistors or light emitting diodes are used, the configuration shown in Fig. 1 is exactly the same, and the timing relationship diagram shown in Fig. 2 is the same. are also exactly the same.

被検査素子が何であるかは本考案の構成に影響を及ぼさ
ない。
The structure of the present invention is not affected by what the device to be tested is.

以上説明したように本考案によれば、第1.第2試料検
出部を設けて検査部、打抜分類部の駆動を制御している
ため、特別の操作用スイッチを設置しないで、性能検査
工程の所要時間を著しく短縮できる上、論理回路で構成
しているため小型で安定な検査装置を提供し得る等の効
果を奏する。
As explained above, according to the present invention, first. Since a second sample detection section is provided to control the driving of the inspection section and punching classification section, the time required for the performance inspection process can be significantly shortened without installing a special operation switch, and it is configured with a logic circuit. Therefore, it is possible to provide a small and stable inspection device.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例を示す構成国、第2図は本考
案の実施例のタイミング関係図である。 図において、1は送り部、2は検査部、3は打抜分類部
、4はトリガ発生部、5はタイミングパルス発生部、6
は駆動信号発生部、7は第1ゲート部、8は第2ゲート
部、9は第1試料検出部、10は第2試料検出部を表わ
す。
FIG. 1 is a diagram showing the constituent countries of an embodiment of the present invention, and FIG. 2 is a timing diagram of the embodiment of the present invention. In the figure, 1 is a feeding section, 2 is an inspection section, 3 is a punching classification section, 4 is a trigger generation section, 5 is a timing pulse generation section, and 6
7 represents a drive signal generation section, 7 a first gate section, 8 a second gate section, 9 a first sample detection section, and 10 a second sample detection section.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 送り部、検査部及び打抜分類部とから成り、前記検査部
での被検査素子の有無を検出し検査部の駆動を制御する
第1試料検出部と、前記打抜分類部での被検査素子の有
無を検出し打抜分類部の駆動を制御する第2試料検出部
と、前記送り部、検査部および打抜分類部が全て非駆動
状態の場合にパルスを発生するトリガパルス発生部と、
このトリガパルス発生部の出力信号により一定間隔のタ
イミング信号を発生するタイミングパルス発生部と、こ
のタイミングパルス発生部の外力信号により、前記送り
部、検査部および打抜分類部の駆動信号を発生する駆動
信号発生部とを備えたことを特徴とする素子検査装置。
A first sample detection section, which is composed of a feeding section, an inspection section, and a punching classification section, detects the presence or absence of an element to be inspected in the inspection section and controls the drive of the inspection section; a second sample detection section that detects the presence or absence of the element and controls the driving of the punching classification section; and a trigger pulse generation section that generates a pulse when the feeding section, the inspection section, and the punching classification section are all in a non-driving state. ,
A timing pulse generating section generates timing signals at regular intervals based on the output signal of the trigger pulse generating section, and drive signals for the feeding section, inspection section, and punching/classifying section are generated by external force signals of the timing pulse generating section. An element testing device comprising: a drive signal generating section.
JP16268277U 1977-12-02 1977-12-02 Element inspection equipment Expired JPS5843226Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16268277U JPS5843226Y2 (en) 1977-12-02 1977-12-02 Element inspection equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16268277U JPS5843226Y2 (en) 1977-12-02 1977-12-02 Element inspection equipment

Publications (2)

Publication Number Publication Date
JPS5488271U JPS5488271U (en) 1979-06-22
JPS5843226Y2 true JPS5843226Y2 (en) 1983-09-30

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Application Number Title Priority Date Filing Date
JP16268277U Expired JPS5843226Y2 (en) 1977-12-02 1977-12-02 Element inspection equipment

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Country Link
JP (1) JPS5843226Y2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5825243A (en) * 1981-08-07 1983-02-15 Hitachi Ltd Manufacturing device

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Publication number Publication date
JPS5488271U (en) 1979-06-22

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