JPS5842326A - Converter circuit - Google Patents
Converter circuitInfo
- Publication number
- JPS5842326A JPS5842326A JP13955381A JP13955381A JPS5842326A JP S5842326 A JPS5842326 A JP S5842326A JP 13955381 A JP13955381 A JP 13955381A JP 13955381 A JP13955381 A JP 13955381A JP S5842326 A JPS5842326 A JP S5842326A
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- local oscillation
- circuit
- oscillation
- phase correction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
- H04B1/26—Circuits for superheterodyne receivers
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Superheterodyne Receivers (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は抵抗負荷の高周波増幅回路をそなえる混合発m
回路における位相補正に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention provides a mixed generator equipped with a high frequency amplifier circuit with a resistive load.
Concerning phase correction in circuits.
近年、受信機は小型化の傾向が強く、ポケットラジオや
超小型ラジオでは、高周波トランスや3連バリコンの不
要な抵抗負荷の高周波増幅回路が用いられつつある。又
、ローコスト化やり一パワー化、小型化の為に部品数が
少(できる方式つまり1つの増幅回路で局部発振と周波
数変換を行う回路方式が主流になっている。In recent years, there has been a strong trend toward miniaturization of receivers, and pocket radios and ultra-compact radios are increasingly using high-frequency amplification circuits with resistive loads that do not require high-frequency transformers or triple variable capacitors. In addition, in order to reduce costs, increase power, and reduce size, circuit systems that use a small number of components (that is, one amplifier circuit performs local oscillation and frequency conversion) have become mainstream.
従来、コンバータ回路は第1図に示す構成になっておシ
、バーアンテナ1で目的の周波数をとらえ、トランジス
タ4で高周波増幅し、混合発振用のトランジスタ5に入
力する。抵抗2は高周波増幅用トランジスタ4の負荷抵
抗として働くと同時’S8発コイル3と共にトランジス
タ6の発振ループ管形成している。高周波増幅の利得を
入電(するKは抵抗2を大龜(すゐ必要がある。しかし
、局発コイルのQ中トッンジスIのkf−の下る高い周
波数オでトッンジXI5が安定に局部発振する為に社帰
還ループ内Khる抵抗鵞が小さくなければならない、又
、トランジスIsの入力容量による帰還信号の位相達観
が生じ、高い周波数で局部発振がllfつたり止壜っ7
+?、jlする事を防ぐ為に抵抗2を小さくする必要が
ある6以上より、抵抗2を小さくすれば、発振は安定す
るが、利得はとれないという欠点があ)、抵抗2を大き
くすれば利得は大きくなるが発Stt不齋定にな〉高い
周波数が受信できなくなるという欠点、及びムG。Conventionally, a converter circuit has the configuration shown in FIG. 1, and a bar antenna 1 captures a target frequency, a transistor 4 amplifies the high frequency, and inputs it to a mixed oscillation transistor 5. The resistor 2 serves as a load resistor for the high-frequency amplification transistor 4, and at the same time forms an oscillation loop tube for the transistor 6 together with the S8 oscillation coil 3. It is necessary to input the gain of the high frequency amplification (K requires a large resistance 2). However, in order for the tone XI5 to stably locally oscillate at a high frequency that falls below the kf- of the tone I in the Q of the local oscillator coil, The resistance in the feedback loop must be small, and the input capacitance of the transistor Is causes a phase shift of the feedback signal to prevent local oscillation from occurring at high frequencies.
+? If resistor 2 is made smaller than 6, the oscillation will be stabilized, but the disadvantage is that the gain cannot be obtained). The problem is that high frequencies cannot be received;
入力によりトランジス−5の動作点が変化しすぎるとい
う欠点があった。There was a drawback that the operating point of transistor 5 changed too much depending on the input.
本発明は位相補正によ)上記欠点を除去し、高周波利得
が大きく局部発IIIが安定した小型2ジオ用コンバ一
タ回路を実現す1事を目的とする。An object of the present invention is to eliminate the above-mentioned drawbacks (by phase correction) and realize a compact 2-geo converter circuit with a large high frequency gain and a stable local oscillator.
以下第2図から第4図に基づき本発明の詳細な説明する
。第2図は本発明実施例であり、中波AM帯の超小型ラ
ジオに応用した例である。1#iバーアンテナ、6は局
発コイル、7は11丁(中間同波トランス〕、8は四−
ノイズ高周波増幅用のトランジスタ、9は混合発振用の
トランジスタ、10F1ラジオ回路管集積回路化したラ
ジオ10,11け高周波増幅用トランジスタ8の負荷用
の抵抗、13は混合発振用トランジスタ9のバイアス用
の抵抗、12 、14はトランジスタ9の発振用帰還信
号の位相遅延を補正する位相補正コンデン量であ)、容
量が小さくて済む場合には、両面プリント基板の表と裏
に形成した対向するパターン間、もしくけ配線パターン
の静電容量を利用し、部品数とスペースの削減をはかる
。又、位相補正コンデンすけ抵抗11と抵抗13のうち
、どちらの抵抗と並列に入nてもよい、さらにプリント
板の配線容量を使う場合には、トランジスタ8のコレク
タがら局発コイル6に到る配線Ca点】tでのすべての
容量を等価的に位相補正コンデ/す12 、14で表現
した場合には、補正に必l!な容量t2分割し、抵抗1
2.13罠そnぞれ並列接続した事Kt石。The present invention will be explained in detail below based on FIGS. 2 to 4. FIG. 2 shows an embodiment of the present invention, which is an example of application to a medium-wave AM band ultra-compact radio. 1 #i bar antenna, 6 is local oscillator coil, 7 is 11 pieces (intermediate same wave transformer), 8 is 4-
A transistor for noise high frequency amplification, 9 a transistor for mixed oscillation, 10 F1 radio circuit integrated circuit radio 10, 11 resistance for load of high frequency amplification transistor 8, 13 for bias of mixed oscillation transistor 9. The resistors 12 and 14 are phase correction capacitors that correct the phase delay of the oscillation feedback signal of the transistor 9).If the capacitance is small, it is necessary to connect the resistors 12 and 14 between the opposing patterns formed on the front and back sides of the double-sided printed circuit board. , Utilizes the capacitance of the mesh wiring pattern to reduce the number of parts and space. Also, it may be connected in parallel with either of the phase correction capacitor resistor 11 and the resistor 13. Furthermore, when using the wiring capacitance of a printed circuit board, it can be connected from the collector of the transistor 8 to the local coil 6. If all the capacitances at wiring point Ca] t are equivalently expressed as phase correction capacitances 12 and 14, it is necessary for correction! Divide the capacitance t2 and resistor 1
2.13 Kt stones connected in parallel.
次に動作について説明する。パーアンテナ1で必要な電
量波信号を拾いこれをトランジスタ8を含む高周波増幅
回路で増幅し、局発コイル6の発振用帰還e線を介して
、混合発振用のトランジスタ9に入力する。トランジメ
タ會の出力のうち中間周波成分を工1テアで取出し、局
S尭振周液数成分を局発コイル6で取出す0局発コイル
601次と2次の巻線の極性を正帰還となる様KWI!
続しであるので、トランジスタ9は局発コイル6の共振
周波数で発振する。Next, the operation will be explained. A necessary electromagnetic wave signal is picked up by the antenna 1, amplified by a high frequency amplifier circuit including a transistor 8, and inputted to a transistor 9 for mixed oscillation via the oscillation feedback e-line of the local oscillation coil 6. Out of the output of the transistor, the intermediate frequency component is extracted by the 1-tare, and the oscillating frequency component is extracted by the local oscillator coil 6.0 local oscillator coil 60 The polarity of the first and second windings becomes positive feedback. Dear KWI!
Therefore, the transistor 9 oscillates at the resonant frequency of the local oscillator coil 6.
次に@3図と第4図、第5図を中心に発振用帰還信号の
位相達観が発生する原因と補正法について説明する。第
3WJは等an路によゐ位相運気のy!、jl′を示し
、第4図は周波数に対する位相を示し第5図は周波数に
対する発振強度を示す、第3図で15は周発プイル60
2次*mが電圧源である事を示し、16はトランジス!
Sの出力抵抗Rgと抵抗】1と抵抗13の並列抵抗と位
相補正コンデンナ9゜又は(Os +” 鳳)からなる
時定数を屯つ出力等価回路であり、17はトランジスタ
170入力抵抗R(sと入力容量0(外からなる時定数
管もつ入力等価回路である0周波数に関係なく1点と6
点の位相が同位相になるためKは入力等価回路16と出
力等価回路の時定数が等しくなけnばならない。例えば
’*t/Rg/Ra中Rs* / R11冨3 e 5
K QRjs=+500KQ
O4n=2.5P’!
ただし、R6はトランジスタ8のコレクタの出力抵抗
とすると
O1中O4s x R4s : ’ u / Ru中3
60F?
となる、第4図に示す様に0曹がこれより小さけnば、
6点の電圧は高い周波数で位相が遅れる事になる。なぜ
ならば、出力等価回路16の抵抗と入力等価回路17の
O(s及び大刀抵抗R(sで遅延回路を構成するからで
ある。従ってO,==Qの時に8QQKEImから位相
が遅れ、@MEN付近で拡90@近い位相遅れが、発振
用帰還信号に生じ発振が止ってしまう1位相遅n量よゐ
高い周波数での局部発揚の停止を防ぐKは、0□m5s
oyyであれば完全であるが、CIがトランジスタ8の
負荷インピータンスを小さくして、高周波増幅の利得を
下げてし重う事がある。受信周wL数の上@l、gMH
zについて述べるとOKよるインピーダンスは
Z 11−1 / 2 K f (1−27@ QOl
がない時の負荷抵抗は351COであるから高周波利得
は2f)48以上低下する事になる。っ1)。Next, the cause and correction method of the occurrence of the phase deviation of the oscillation feedback signal will be explained with reference to Fig. 3, Fig. 4, and Fig. 5. The 3rd WJ is y of phase luck due to the equal path! , jl', FIG. 4 shows the phase with respect to frequency, and FIG. 5 shows the oscillation intensity with respect to frequency. In FIG.
The secondary *m indicates a voltage source, and 16 is a transistor!
This is an output equivalent circuit with a time constant consisting of a parallel resistance of 1 and 13, and a phase correction capacitor 9° or (Os and input capacitance 0 (input equivalent circuit with time constant tube consisting of external 0) 1 point and 6 regardless of frequency
Since the phases of the points are the same, the time constants of the input equivalent circuit 16 and the output equivalent circuit must be equal to each other. For example, '*t/Rg/Rs in Ra*/R11 3 e 5
K QRjs=+500KQ O4n=2.5P'! However, if R6 is the output resistance of the collector of transistor 8, O4s in O1 x R4s: ' u / 3 in Ru
60F? As shown in Figure 4, if 0 carbon dioxide is smaller than this, then
The voltage at 6 points will have a phase delay at high frequencies. This is because a delay circuit is formed by the resistance of the output equivalent circuit 16, O(s) of the input equivalent circuit 17, and the long sword resistance R(s. Therefore, when O,==Q, the phase is delayed from 8QQKEIm, and @MEN The K that prevents the local oscillation from stopping at a frequency higher than the amount of 1 phase delay n, which causes a phase delay close to 90@ in the oscillation feedback signal and stops oscillation, is 0□m5s.
If it is oyy, it is perfect, but CI may reduce the load impedance of the transistor 8 and reduce the gain of high frequency amplification. Above the reception frequency wL number @l, gMH
Regarding z, the impedance according to OK is Z 11-1 / 2 K f (1-27 @ QOl
Since the load resistance without it is 351CO, the high frequency gain will drop by 2f)48 or more. 1).
、x3fiQp7とするのは適切でない、鯖4W4に示
す様に
27F≦0. ≦59FF
fFio、−00時とa、−3@0?FF)時とf)中
間の特性を示す、第5図からゎかる様に局部発振周波数
の上限の約’l、MH厘において、位相遅n量か安定に
発振できる範囲内でかつトランジスタ8の負荷インピー
ダンス會極端に下けないという条件のC,が存在する。, x3fiQp7 is not appropriate, as shown in Saba4W4, 27F≦0. ≦59FF fFio, -00 o'clock and a, -3@0? As shown in Fig. 5, the upper limit of the local oscillation frequency is about 'l, the phase delay n is within the range where stable oscillation can be achieved, and the load of transistor 8 There is a condition C that the impedance cannot be lowered to an extremely low value.
(実験の、結果、’1が2〜50Pνの範NK最適fI
IILがある事が多い、)たとえば2MHm[で安定に
発振する条件から0鴛藁IQ P F i選んだとする
。仁の時の0.によるインピーダンスは1.6MH!+
で
Za中10にΩ
01がない時のトランジスタ8の負荷抵抗は3゜5xΩ
であるから高周波増幅利得の低下は1.6M!、でも3
dB糧度でありsx−6MnMn下では、さらに利得の
低下は少(なる。(Experimental results show that '1 is in the range NK optimal fI of 2 to 50 Pν
For example, assume that 0 IQ P F i is selected from the conditions for stable oscillation at 2 MHm (often with IIL). 0 at the time of Jin. The impedance is 1.6MH! +
So, when there is no Ω01 in 10 in Za, the load resistance of transistor 8 is 3゜5xΩ
Therefore, the drop in high frequency amplification gain is 1.6M! , but 3
dB gain, and the gain decreases even less under sx-6MnMn.
又、〇−が10P1程度の場合、両面プリント基板の表
と裏に形成した対内するパターンや配線パターンによる
容量が使える。これt実現する異体的方法として
(1)チップ部品のランドを大きめにと9、その裏側の
バタニン管了−スや電源パターンとt、a。Moreover, when 0- is about 10P1, the capacitance due to the pairing patterns and wiring patterns formed on the front and back sides of the double-sided printed circuit board can be used. A different way to achieve this is (1) by making the land of the chip component a little larger, and by adding a batanine control space and a power supply pattern on the back side of the land.
(2配1IIt太めに長めKと多、その裏側のパターン
を7−ス又は電源パターンとする。(2 lines, 1IIt, thick and long K, and the pattern on the back side is the 7-space or power supply pattern.
(3)工1丁やじゅしモールドタンタルコンデンサ等の
部品の下のパターンを利用し、基板の表と裏に対向する
パターンtagする。(3) Using the pattern under the parts such as a molded tantalum capacitor or a molded tantalum capacitor, tag the opposite patterns on the front and back of the board.
等の方法がある。There are other methods.
以上本発明によれば、以下の効果を有する。According to the present invention, the following effects are achieved.
(1)高周波増幅部は抵抗負荷でも高利得(20〜30
dB)が得られる。(1) The high frequency amplification section has a high gain (20 to 30
dB) is obtained.
特に超小型ラジオは薄形ポケットラジオに(らペアンテ
ナが小さくなるかむの分の感度低下を補う事が可能。In particular, ultra-compact radios can compensate for the decrease in sensitivity due to the small size of the antenna.
(2) 1つの増幅回路で混合発mを行う為、部品数が
少い事及び、3連バリプン中高周波同調コイルが不要な
事から超小型化に適する。(2) Since the mixed oscillation is performed using one amplifier circuit, the number of components is small and a triple-variable mid-high frequency tuning coil is not required, making it suitable for ultra-miniaturization.
(3) OR結合の混會発5g1mに起る発振停止を基
板に形成したバター7間客tを用いる事で、部品増加な
しで補正でIIA@
(り超ローイイズ、高し中Wlrl11波数の高岡液ト
ッンジス!がディスタリー)亀ので、ラジオ用xOはロ
ーパワー化やローコスト化が可能。(3) The oscillation stop that occurs at 5g1m due to OR coupling can be corrected without increasing the number of parts by using a butter 7-meter t formed on the substrate. Because liquid tonges! is distal), xO for radio can be made with low power and low cost.
第1図は従来例を示し、第2図は本発明実施例の回路図
を示し、第3図は、等価回路による位相遅砥の原理を示
す図、第4図は周波数に対する位相を示し第5図1[波
数に対する発振強度管示す1、、パーアンテナ 2.
。抵抗
3.6.。局発コイル 4,5.。Fランシフ0.工
FT Q、9゜。ト2 スタ10、、ラジオ用I
Oンジスタ
11 、13゜、抵抗 12 、14 、。位相補正
コンデン量
以上Fig. 1 shows a conventional example, Fig. 2 shows a circuit diagram of an embodiment of the present invention, Fig. 3 shows the principle of phase retarding grinding using an equivalent circuit, and Fig. 4 shows the phase with respect to frequency. 5 Figure 1 [Oscillation intensity tube showing wave number 1, Par antenna 2.
. Resistance 3.6. . Local oscillator coil 4,5. . F run shift 0. Engineering FT Q, 9°. 2 Star 10, I for radio
On resistors 11, 13°, resistors 12, 14,. More than phase correction capacitor amount
Claims (1)
の増幅回路で行ない前記高周波アンプとOR結合をし九
混合発振回路、前記高周波アンプの負荷抵抗又は次段の
#記混合発11回路のパイブス抵抗と並列に入った位相
補正プンデン号、局部発振用トランス、中間周波トラン
スを備え、抵抗結合の混合発振回路KjiPいて局S斃
提帛の帰遺信愕の位相遅延により受信周波数範囲の上限
で起きる局部発振の停止を、前記位相補正コンデン葉に
よp防止した事を特徴とするコンバータ回路。 @前記位相補正コンデン量の容量によゐインピーダンス
が前記高周波アンプの負荷抵抗にくらべて大き(な夛、
かつ局部発振の上限周波数つまり中波で#i2.2M1
imjでの周波数について安定に局部発振する様Kll
記位相補正コyデンナの値12pyから50PνのlI
!圀で設定した事を特徴ト基板の表と裏に形成した対向
するパ!−ン間の静電容量を用いた婁を特徴とする特許
請求の範囲第N項及び第2項のコンバータ回路。(1) A high-frequency amplifier with a resistive load, which performs local oscillation and mixing in the same amplifier circuit and performs an OR combination with the high-frequency amplifier to generate a 9 mixed oscillator circuit, a load resistance of the high-frequency amplifier, or a mixed oscillator 11 circuit in the next stage. The resistance-coupled mixed oscillator circuit KjiP, which is equipped with a phase correction circuit connected in parallel with the piping resistor, a local oscillation transformer, and an intermediate frequency transformer, can reach the upper limit of the receiving frequency range due to the significant phase delay of the station S output. A converter circuit characterized in that stoppage of local oscillation that occurs in P is prevented by the phase correction capacitor. @The impedance due to the capacitance of the phase correction capacitor is larger than the load resistance of the high frequency amplifier.
And #i2.2M1 at the upper limit frequency of local oscillation, that is, medium wave
Kll to stably local oscillate about the frequency at imj
lI of 50Pν from the value of phase correction coydenna 12py
! It is characterized by the opposing pads formed on the front and back of the board! The converter circuit according to claims N and 2, characterized in that the converter circuit uses a capacitance between the terminal and the terminal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13955381A JPS5842326A (en) | 1981-09-04 | 1981-09-04 | Converter circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13955381A JPS5842326A (en) | 1981-09-04 | 1981-09-04 | Converter circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5842326A true JPS5842326A (en) | 1983-03-11 |
JPS6322690B2 JPS6322690B2 (en) | 1988-05-12 |
Family
ID=15247939
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13955381A Granted JPS5842326A (en) | 1981-09-04 | 1981-09-04 | Converter circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5842326A (en) |
-
1981
- 1981-09-04 JP JP13955381A patent/JPS5842326A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6322690B2 (en) | 1988-05-12 |
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