JPS5842221A - Method of producing electronic part - Google Patents

Method of producing electronic part

Info

Publication number
JPS5842221A
JPS5842221A JP56140578A JP14057881A JPS5842221A JP S5842221 A JPS5842221 A JP S5842221A JP 56140578 A JP56140578 A JP 56140578A JP 14057881 A JP14057881 A JP 14057881A JP S5842221 A JPS5842221 A JP S5842221A
Authority
JP
Japan
Prior art keywords
conductive material
base material
cap
metal cap
attached
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56140578A
Other languages
Japanese (ja)
Other versions
JPS6314848B2 (en
Inventor
進 森
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP56140578A priority Critical patent/JPS5842221A/en
Publication of JPS5842221A publication Critical patent/JPS5842221A/en
Publication of JPS6314848B2 publication Critical patent/JPS6314848B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Ceramic Capacitors (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 この発明L%中キャップ方式外部電極を構成する電子部
品の製造方法KIImするものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a method for manufacturing an electronic component constituting an L% medium cap type external electrode.

従来から、キャップ方式で外部電極管構成する抵抗−や
コンデンサーなどの電子部品は、大略第1図のl−で装
造されている。
Conventionally, electronic components such as resistors and capacitors that constitute an external electrode tube using a cap method have been generally mounted as shown in FIG. 1.

すなわち、容量電極中m抗体が形成されている電子部A
O基材は、この両端面に銀ペーストなどの導電材會m布
し、焼付1横を経て基材両端面に外部電極tiit着さ
せる。次にリード線を有する金mIIキャップを上記両
端面の外部電極部を扱うようKはめ込み、このキャップ
と外部電極部を接合させゐ丸め、フツツクスtm布し半
田付けを行い、II憂アラツクスを洗浄除去して後、エ
ポキシ樹脂中シリコン1tflIk料などで塗装を行い
完成品とするものである。
That is, the electronic part A in which the m antibody is formed in the capacitive electrode
A conductive material such as silver paste is applied to both end faces of the O base material, and external electrodes are attached to both end faces of the base material through baking. Next, fit a gold mII cap with a lead wire so as to handle the external electrode parts on both end faces, roll the cap and the external electrode part together, apply FutsTM cloth and solder, and wash and remove the II metal. After that, the finished product is painted with silicone 1tflIk in epoxy resin.

しかしながら、上記半田付は工+i1において、基材両
msiの外部電極部と、その上に装着したリード線を有
する金a擬中ヤップとを半田付けする際、あらかじめI
kl/s″stL九フンックスが高熱作用などで例えば
stmで示したように、基材1@に侵入し、洗浄l&l
l會行う先後も残痕として漬る場合もあ珈、これが電子
部品の特性を低下させる原因となる一〇である。
However, in step +i1, when soldering the external electrode parts of both base materials and the gold a pseudo-middle part with lead wires attached thereon, the soldering process is performed in advance by I
kl/s″stL9 funx invades the base material 1@ due to high heat, etc., as shown in stm, and washes l&l
In some cases, it remains as a residual mark even after the test is carried out, and this is a cause of deterioration of the characteristics of electronic parts.

壕九、%に銀を主体とする導電材を外部電極として形成
し九基材lの場合は、七の両端面の導電材2が、リード
線4を有すゐ金属製キャップ3と半田付けされる際、半
田中に拡散し移行する傾向があシ、この丸め場合によっ
ては半田中に多量0尋電材2が拡散溶解し、導電材2と
しての機能を消失すると共に1半田付は性を著しく阻害
させる欠点が6つ九。
In the case of the base material 1 in which a conductive material mainly composed of silver is formed as an external electrode in the trench 9, the conductive material 2 on both end faces of the trench 7 is soldered to the metal cap 3 having the lead wire 4. When soldering, there is a tendency for it to diffuse and migrate into the solder, and in some cases, a large amount of the conductive material 2 diffuses and dissolves into the solder, causing it to lose its function as a conductive material 2 and lose its properties when soldered. There are six and nine drawbacks that seriously hinder it.

この発明の方法は、上記従来の半田付は工程と、それに
付随するフラックス塗布工種を省略させて、上記のよう
に電子部品の基材の両端面に銀中鍋ペーストなどからな
る導電材を塗布するか、あるいは金属製キャップ内にあ
らかじめ銀中銅ペーストなどからなる導電材tm布させ
て、上記基材の両*ruc上記キャップを装着後、60
0〜70GTO中性あるいは還元性雰囲気中で上記導電
材の焼付は処11を行なうと共に1上記基材両端面の上
記導電材と上記キャップとを固着させる電子部品の製造
方法を提供することを目的としている。
The method of the present invention eliminates the conventional soldering process and the accompanying flux application process, and applies a conductive material such as silver pot paste to both end surfaces of the base material of the electronic component as described above. Alternatively, a conductive material tm cloth made of silver-in-copper paste or the like is placed inside the metal cap in advance, and both *ruc of the above-mentioned base material are attached.
0 to 70 GTO An object of the present invention is to provide a method for manufacturing an electronic component in which the conductive material is baked in a neutral or reducing atmosphere, and the conductive material on both end surfaces of the base material is fixed to the cap. It is said that

次にこの発明に係る工程を第3図に従がって説―する。Next, the steps according to the present invention will be explained with reference to FIG.

まず、基材としては容量用電Ii(図示せず)が付与さ
れ焼wLされた円筒状、円柱状、角柱状などのセフミッ
クなどが対象と1にル、面取〕、センタレス加工などの
修正錫塩が行われる。
First, the base material is a cylindrical, cylindrical, prismatic, and other Cefmic material that has been given a capacitance Ii (not shown) and annealed. Tin salting is done.

次−で上記基材の両端部に外部電極を形成すると共に、
リード線を有する金属製キャップを固着する。
Next, external electrodes are formed on both ends of the base material, and
Secure the metal cap with the lead wire.

これ紘、電子機暢への実装時、周辺部品との電気的接続
を完全なものKするためKなされるものである。
This is done in order to ensure complete electrical connections with peripheral components when mounting on an electronic device.

この勤羽においては、上記外部電極と金s!11!キャ
ップとを基材に形成させる方法の一つとして、上記基材
両端部に銀中銅ペーストなどの導電材を必要量1に布し
ておき、その導電材を覆うよう6<y−ド線を有する金
属製キャップ管直接装着させる方法とく別の方法として
は、あらかじめリード線を有する金属製キャップ内に1
銀や銅ペーストなどの導電材を必要量塗布し先壁、との
キャップを上記基材両端部に装着させる方式などを用い
るものである。
In this work, the external electrode and gold s! 11! As one method for forming a cap on a base material, a conductive material such as silver-in-copper paste is applied to both ends of the base material in a required amount 1, and a 6<y-d wire is placed so as to cover the conductive material. Another method is to attach the lead wire directly to the metal cap tube.
A method is used in which a required amount of a conductive material such as silver or copper paste is applied and caps are attached to both ends of the base material.

次に上記外部電11jiを構成する導電材の焼付は部層
を行うが、この@明にお−ては、上記導電材の焼付けを
、600〜700℃の中性あるいはl1元性雰賄気中で
行うことを%黴としている。
Next, the conductive material constituting the external conductor 11ji is baked in a partial layer, but in this @Mei, the conductive material is baked in a neutral or l1 elemental atmosphere at 600 to 700°C. What is done inside is called % mold.

この塩山性、焼付は炉で上記導電材管焼付炒る際、一般
□に4!P!’温度は600〜G6@’C(D範囲”e
I&が、この温度範囲で大気中で加熱されると、上記導
電材上に装着されているキャップおよびリード線が酸化
し、導電性が着しく低下するためである。
When roasting the above-mentioned conductive material tube in a furnace, this salt mountain property and baking are generally □ 4! P! 'Temperature is 600~G6@'C (D range"e
This is because if I& is heated in the atmosphere in this temperature range, the cap and lead wires attached to the conductive material will be oxidized, and the conductivity will be severely reduced.

また、700C以上の温度の中性ま九は還元性雰囲気で
上記導電材を焼付けると、上記酸化を防止できるが、今
度はチタン酸バリウムなどからなる基材が還元されて誘
電性を失い、半導体化する間聰がでてくるためである。
In addition, if the conductive material is baked in a reducing atmosphere with a neutral powder at a temperature of 700C or higher, the above oxidation can be prevented, but this time the base material made of barium titanate etc. is reduced and loses its dielectric properties. This is because there will be a chance to develop semiconductors.

したがって、この発明の方法に係る外部電極となる導電
材の焼付は工程は、上記酸化や還元反応な抑制で龜る5
00〜700℃の中性あるいは還元性雰囲気によって行
うものである。
Therefore, the baking process of the conductive material that will become the external electrode according to the method of the present invention is slowed down by the suppression of the oxidation and reduction reactions mentioned above.
It is carried out in a neutral or reducing atmosphere at 00 to 700°C.

第4FI!AIl′i、上記この発明の実施例を示すも
ので61、同図0)鉱基材10両端面に銀ま九は銅ベー
ストからなる導電材zt*布したもので、その後Wii
l1kg−ドllI4を有する金lI4製キャップ8を
装着場せ、yoocoit元雰囲気焼付は炉5で上記導
電材20焼付けを行−1同図(ハ)K示した電子部品1
0を得るものである。
4th FI! AIl'i shows the above-mentioned embodiment of the present invention.
A cap 8 made of gold lI4 having a weight of l1 kg is attached, and the electrically conductive material 20 is baked in a furnace 5 for baking in a yoocoit atmosphere.
0 is obtained.

まえ、同llIに)は、あらかじめリード線4を有する
金5Ill今ヤツプ畠内Kflkペーストからなる導電
材2會量布させて、その後骸キャップ8管基材1に装着
さ破て、上記同様Ots付は炉すで上記導電材go焼付
ゆを行い、同図Oで示した電子部品10を得た1橡を示
している。
(Previously, in the same way), 2 amounts of conductive material made of gold 5Ill now Yappu Hatauchi Kflk paste with lead wire 4 was placed in advance, and then the shell cap 8 was attached to the tube base material 1 and torn, and Ots as above. The figure shows one square in which the electrically conductive material was baked in a furnace to obtain the electronic component 10 shown by O in the figure.

以上のように、この発明の電子部品の製造方法は、基材
両端0@中鋼ペーストなどからなる導電材O焼付は時に
%基材と金属製キャップとを同時K11lllさせて、
キャップ方式でなる電子部品を形成し、従来方式のよう
な半田付は工程を省略させ九4のである。
As described above, in the method for manufacturing electronic components of the present invention, the baking of the conductive material made of medium steel paste or the like at both ends of the base material is sometimes performed by simultaneously making the base material and the metal cap K11llll,
Electronic components are formed using a cap method, and the soldering process required in the conventional method is omitted, resulting in 94 steps.

したがって、半田付けに付随するフラックス塗布および
フラックス洗1工楊なども省略化できるので、大幅なコ
ストダウンが実現できる。
Therefore, it is possible to omit the flux application and flux cleaning process that accompany soldering, resulting in a significant cost reduction.

また、上記半田付は工程やフラックス塗布、あるいは洗
浄工程などから発生する品質低下に結びつくトラブルも
全くなくなるので、安定した品質の電子部品を広く供給
できるものとなるのである。
In addition, the soldering process eliminates any troubles that may lead to quality deterioration caused by the soldering process, flux application, cleaning process, etc., making it possible to widely supply electronic components of stable quality.

【図面の簡単な説明】[Brief explanation of the drawing]

jI1図は従来の電子部品の製造方法に係る工程図、第
2図は従来のキャップ方式による製造過程の111橡を
示す図、第3図はこの発明の電子部品の製造方法に係る
工程図、1に4図はこの発明の製造過程のmmを示す図
である。 l・・・基材、 2・・・導電材1,8・・・キャップ
、5・・・焼付1炉。 特許出願人  株式会社 村田製作所 同 代理人  弁理士 和 1) 唱
Figure 1 is a process diagram of the conventional method for manufacturing electronic components, Figure 2 is a diagram showing 111 squares of the manufacturing process using the conventional cap method, and Figure 3 is a process diagram of the method of manufacturing electronic components of the present invention. Figures 1 and 4 are diagrams showing mm in the manufacturing process of this invention. l... Base material, 2... Conductive material 1, 8... Cap, 5... Baking 1 furnace. Patent applicant Murata Manufacturing Co., Ltd. Agent Patent attorney Kazu 1) Sho

Claims (1)

【特許請求の範囲】[Claims] 金属製キャップを基材両端面に対向するように装着して
なる電子部品の#!遠方法において、上記基材の両端面
にあらかじめ導電材を塗布させ先後金属製キャップを装
着させる工程、あるいは上記金JIk製中ヤツプ内に導
電材を塗布させ先後、基材両端面に金属m中ヤツプを装
着させる工1iKよ〕、基材両端面に導電材を付与する
と共に1金属製キヤツプを導電材を覆うように装置後、
SOO〜700℃の中性ある鱒は還元性雰囲気中で加熱
し、上記導電材の焼付けを行うと共に、基材と金属キャ
ップの固着を行なわせるようkしたことを特徴とする電
子部品0IIl造方法。
# of electronic components made by attaching metal caps to opposite ends of the base material! In the remote method, a conductive material is applied to both end surfaces of the base material in advance and a metal cap is attached to the front and back, or a conductive material is applied to the inside of the gold JIk inner cap and a metal cap is attached to both end faces of the base material beforehand. After applying the conductive material to both end surfaces of the base material and placing a metal cap over the conductive material,
A method for manufacturing an electronic component, characterized in that a neutral trout of SOO to 700° C. is heated in a reducing atmosphere to bake the conductive material and to fix the base material and the metal cap. .
JP56140578A 1981-09-07 1981-09-07 Method of producing electronic part Granted JPS5842221A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56140578A JPS5842221A (en) 1981-09-07 1981-09-07 Method of producing electronic part

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56140578A JPS5842221A (en) 1981-09-07 1981-09-07 Method of producing electronic part

Publications (2)

Publication Number Publication Date
JPS5842221A true JPS5842221A (en) 1983-03-11
JPS6314848B2 JPS6314848B2 (en) 1988-04-01

Family

ID=15271944

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56140578A Granted JPS5842221A (en) 1981-09-07 1981-09-07 Method of producing electronic part

Country Status (1)

Country Link
JP (1) JPS5842221A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008205455A (en) * 2007-01-31 2008-09-04 Avx Corp Termination bonding method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008205455A (en) * 2007-01-31 2008-09-04 Avx Corp Termination bonding method

Also Published As

Publication number Publication date
JPS6314848B2 (en) 1988-04-01

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