JPS5839173A - Solid-state image pickup element - Google Patents

Abstract

PURPOSE:To reduce the shift of the sampling time among plural stored images and to make an output signal narrow-band, by providing plural independent charge storing parts for every photoelectric converting part. CONSTITUTION:The signal charge generated in N-number of photoelectric converting parts (picture elements) is transferred to charge storing parts RI-J (I= 1-N and J=1, 2, and 3) by gate signals STR1-STR3. That is, gate signals STR1-STR3 are controlled to distribute optionally the signal charge, which is generated in each picture element, to three independent charge storing part. This distributed and stored signal charge is transferred to a charge transfer path CCD by gate signals TRF1-TRF3 and is outputted as a voltage signal from a charge-voltage converting amplifier VA.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a solid-state imaging device, particularly a solid-state imaging device characterized in that two or more independent charge storage fI[%] are provided for one photoelectric conversion region. It is.

Conventionally, this type of solid-state imaging device composed of multiple photoelectric conversion regions had only one charge accumulation region per photoelectric conversion region, so the sampling interval of the optical signal was
Since it occurs when the signal charge is output, the solution gI! Increasing the number of pixels to recite the image has the disadvantage that the sampling time for each image becomes longer. There were drawbacks that caused problems.

SUMMARY OF THE INVENTION An object of the present invention is to provide a solid-state image sensor that can eliminate the drawbacks of the prior art as described above and at the same time provide a degree of freedom in output thetance.

The present invention will be specifically explained below using the drawings.

Figures 1 and 2 are conventional examples, and Figures 3 and 4 are enlarged examples of embodiments of the present invention. In order to simplify the explanation, a line sensor will be described and a COD #I structure will be used as the transfer section, but it goes without saying that it is also applicable to BBD structure, MO811X-Y address structure, etc.

Figure 1, 81. β2,8N are N independent photoelectric conversion regions, GCI, GC2, ·+a G CN Co. The photocharge of the above photoelectric conversion region is determined by CLR and gate signal l) Vc
This is the FIT switch for clearing to c.

GTI to GTN TR the signal photocharge in the photoelectric conversion region.
FE for transferring to the charge transfer element by F gate signal
A transfer pulse (not shown) in the form of a signal charge transferred to the CCD, which is a T-switch, is then sent to a charge-voltage conversion amplifier and output.

FIG. 2 is a diagram showing the driving pulse timing of the solid-state image pickup device of the above-mentioned conventional example.

When the CI4 signal is at high level, the charging conversion section is cleared, and when the TRF signal is at high level, the output of the photoelectric conversion section is C.
It is set to be transferred to CD. Accumulation time (TI)
Consider the case of outputting three consecutive images such that il, t, , II. Each readout time (TR
) R1, I (1m.

If R, is longer than the storage time, the readout time is limited by the time difference between the three images. In this case, in order to reduce the time lag, it is necessary to shorten the readout time, and there is a drawback that the processing band of the output-image signal must be widened.

FIG. 3 is a schematic diagram of a solid-state imaging device for explaining the present invention. Consider a case where there are three independent charge storage sections for one photoelectric conversion section.

81 to 8N are independent], and are eight light conversion units (picture elements), depending on the photocharge acL & gate signal! 7GC1~GCN
It is cleared to Vcc through the FET switch.

8TR1~8T) 81~8N depending on the gate signal of t and 3
The signal photocharges created in the photoelectric conversion section of each RI-J
081 to the charge storage section of (I 1-N, J 1, 2.3)
-J (1-1 to N, J-1, 2, 3) are transferred through FET switches. That is, by externally controlling the gates of 5TRI to 8TR3, it becomes possible to arbitrarily distribute the signal charge generated by one photoelectric conversion section to three independent charge storage sections.

Charge storage section RI-J (I-1 to N, J=1.2.3)
The signal charges accumulated in TRF-1, TRF-2, TR
Charge transfer% by gate signal of F-3, q leaves I-J (1, 1 to N, J -1, 2, 3) to (CCD), respectively
is transferred through the FB'l' switch. The signal charge transferred to the CCU is transferred to the charge-to-voltage conversion amplifier VM by a transfer drive pulse (not shown) and output as a voltage signal.

FIG. 4 is a diagram illustrating an example of the drive tie configuration of the solid-state image sensing device in the case of implementing the present invention. As shown in the figure, by inputting the CLR signal and the 8TR signals 5TRI to 3 to the solid-state image sensing device by five people, it is possible to store three continuous image signals in the charge storage section with the storage time difference minimized.

As shown in the figure, the signal charge is transferred from the storage section to the COD by the signal TRFI~3, so that the signal charge is transferred to the COD, but in this case, even if the readout frequency is reduced,
It is not affected by the spread of time lag between two image information.

As explained above, with the structure of the solid-state image sensor of the present invention having two or more independent charge accumulation regions for one photoelectric conversion region, each of a plurality of accumulated images corresponding to the charge accumulation region This has the great effect of reducing the sampling time lag and at the same time making it possible to narrow the band of the output signal.

Although this embodiment has been described using a line-type solid-state image sensor, it goes without saying that a similar structure can be applied to a wide-area solid-state image sensor.

[Brief explanation of the drawing]

Figure 1 shows the structure of a conventional solid-state image sensor, Figure 2 is a drive timing diagram of a conventional solid-state image sensor, Figure 3 is a diagram showing an example of the solid-state image sensor of the present invention, and Figure 4 is a diagram of the present invention. FIG. 3 is a diagram showing an example of drive timing of a solid-state image sensor in FIG. 8N (N=1-N): Photoelectric conversion section RI-J (I-1 to N, J depth 1, 2.3): Charge storage section Patent applicant Canon Corporation

Claims (1)

[Claims] A solid-state imaging device characterized in that a plurality of independent charge storage sections are provided for each photoelectric conversion section.