JPS58384Y2 - pulse transformer - Google Patents
pulse transformerInfo
- Publication number
- JPS58384Y2 JPS58384Y2 JP7846578U JP7846578U JPS58384Y2 JP S58384 Y2 JPS58384 Y2 JP S58384Y2 JP 7846578 U JP7846578 U JP 7846578U JP 7846578 U JP7846578 U JP 7846578U JP S58384 Y2 JPS58384 Y2 JP S58384Y2
- Authority
- JP
- Japan
- Prior art keywords
- thyristor
- gate
- pulse transformer
- diode
- pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Power Conversion In General (AREA)
- Thyristor Switches And Gates (AREA)
Description
【考案の詳細な説明】
本考案は、サイリスタを用いた電力変換装置のゲートパ
ルス伝達用絶縁変成器に関するもので、ゲートノイズに
よる誤点弧を防止することを目的としている。[Detailed Description of the Invention] The present invention relates to an isolation transformer for transmitting gate pulses of a power converter using a thyristor, and aims to prevent erroneous firing due to gate noise.
一般にサイリスタを用いた電力変換装置では、ノイズに
よる誤点弧は電力制御機能に憂乱を与え例えばインバー
タ等では転流失敗に至り致命的欠陥となる。In general, in a power converter using a thyristor, erroneous firing due to noise disturbs the power control function and, for example, in an inverter, etc., it leads to commutation failure and becomes a fatal defect.
これに対し従来はサイリスタのゲート特性に制約を加え
、更にゲートフィルタをつけるなどして処理して来たが
、大きなゲートノイズ防止フィルタはゲートパルスの立
ち上りのdi/dtを小さく、サイリスタの責務を苛酷
なものにする等の欠点があった。Conventionally, this problem has been dealt with by adding constraints to the gate characteristics of the thyristor and adding a gate filter, but a large gate noise prevention filter reduces the di/dt of the rise of the gate pulse and reduces the responsibility of the thyristor. It had drawbacks such as making it harsh.
本考案は、サイリスタのゲートパルスを与えない期間に
はゲートの許容逆バイアス電圧以内の逆バイアス電圧を
サイリスタに与えることにより、ゲートノイズをカット
するものである。The present invention cuts gate noise by applying a reverse bias voltage within the permissible reverse bias voltage of the gate to the thyristor during a period when no gate pulse is applied to the thyristor.
このようにゲート逆バイアスをかけるとサイリスタのd
v/dt耐量が増するこも知られており、インバータ等
では更に信頼度が高筐ると言う利点がある。Applying a gate reverse bias in this way will reduce the d of the thyristor.
It is also known that the v/dt withstand capacity is increased, and there is an advantage that the reliability of the inverter and the like is further increased.
次に本考案の実施例について説明する。Next, embodiments of the present invention will be described.
第1図において、1は直流電源装置、2,3はパルス変
成回路4への制勝信号をON、OFFする開閉素子(例
えばトランジスタ)、5は変圧器、6.7はダイオード
、8,9は抵抗で、出力GIK1゜G2に2には、サイ
リスタが接続される(G1G2がゲートへ、K1に2が
陰極へ)。In FIG. 1, 1 is a DC power supply, 2 and 3 are switching elements (for example, transistors) that turn on and off the winning signal to the pulse transformation circuit 4, 5 is a transformer, 6.7 is a diode, and 8 and 9 are A thyristor is connected to the outputs GIK1, G2 and 2 with resistors (G1 and G2 to the gate, and K1 and 2 to the cathode).
トランジスタ2,3はフリップフロップを形成していて
交互に導通し、トランジスタ2が導通の時には01に1
に01が正になる様なパルスが、トランジスタ3が導通
の時には02に2に02が正になる様なパルスが発生し
てサイリスタを点弧する。Transistors 2 and 3 form a flip-flop and are conductive alternately, and when transistor 2 is conductive, 01 to 1
When the transistor 3 is conductive, a pulse such that 01 becomes positive is generated, and a pulse such that 02 becomes positive when the transistor 3 is conductive is generated to fire the thyristor.
−・方変圧器5は、2次側が2巻線で相互に鉄心を介し
て結合されているので例えば、2が導通中の時にはG2
に2にはG2が負になる様な電圧が発生する。The -/direction transformer 5 has two windings on the secondary side and is connected to each other via the iron core, so for example, when 2 is conducting, G2
At 2, a voltage is generated such that G2 becomes negative.
ダイオード6、γはこの電圧の方向を弁別するもので正
の電圧のみを導通させ、負の電圧はBlockさせる。The diode 6 and γ discriminate the direction of this voltage, allowing only positive voltage to conduct and blocking negative voltage.
このダイオード6.1にそれぞれ並列に抵抗8,9を接
続すると、サイリスタのゲートの逆方向抵抗と8,9で
逆電圧が分圧され、抵抗8,9の値を適当に選ぶことに
より適切な逆電圧をサイリスクにかけることができる。When resistors 8 and 9 are connected in parallel to this diode 6.1, a reverse voltage is divided between the reverse resistance of the thyristor gate and 8 and 9, and by appropriately selecting the values of resistors 8 and 9, A reverse voltage can be applied to the cyrisk.
第2図はこのゲートパルスの関係を示すものでサイリス
タの非導通期間には逆電圧がかかるのでノイズに対して
非常に高い保護性能が得られる。FIG. 2 shows the relationship between the gate pulses, and since a reverse voltage is applied during the non-conducting period of the thyristor, very high protection performance against noise can be obtained.
勿論G1に1.G2に2に適当な抵抗コンデンサ等より
成るフィルタを接続した場合でも抵抗8,9を適切に選
定すれば充分な効果が期待できる。Of course 1 in G1. Even when a filter consisting of a suitable resistance capacitor or the like is connected to G2, sufficient effects can be expected if the resistors 8 and 9 are appropriately selected.
第3図は本考案の他の実施例を示し、これによれば第1
図の実施例と同じ回路にダイオード10゜11が付加さ
れている。FIG. 3 shows another embodiment of the present invention, according to which the first
A diode 10°11 is added to the same circuit as in the illustrated embodiment.
これによりサイリスタの不導通期間中にはそのサイリス
タのゲート・カソード間にダイオード10もしくは11
の堰層電圧に相当するはシ一定の逆バイアス電圧が印加
される。As a result, during the non-conducting period of the thyristor, a diode 10 or 11 is connected between the gate and cathode of the thyristor.
A constant reverse bias voltage corresponding to the weir layer voltage is applied.
第1図は本考案の実施例を示す接続図、第2図はサイリ
スタのゲートに加えられるパルス波形例を示す線図、第
3図は本考案の他の実施例の要部を示す接続図。
1・・・・・・電源、2,3・・・・・・トランジスタ
、4・・・・・・パルス変成回路、5・・・・・・変圧
器、6,7・・・・・・ダイオード、8,9・・・・・
・抵抗。Fig. 1 is a connection diagram showing an embodiment of the present invention, Fig. 2 is a diagram showing an example of a pulse waveform applied to the gate of a thyristor, and Fig. 3 is a connection diagram showing main parts of another embodiment of the invention. . 1...Power supply, 2,3...Transistor, 4...Pulse transformation circuit, 5...Transformer, 6,7... Diode, 8, 9...
·resistance.
Claims (1)
リスタにゲートパルスを互いに絶縁して与えるために各
サイリスタに付属した2次巻線を設けたパルス変成器に
おいて、そのパルス変成器の1次側での交流励磁によっ
て生じる各2次巻線の交流電圧をそれぞれ互いに異なる
極性の半波期間で2つのサイリスタが交互にゲートパル
スとして受は取り得るように、それぞれダイオードを介
して各サイリスタのゲートに該当せる2次巻線を接続し
、かつ一方のサイリスタがゲートパルスを受は取ってい
る間中不導通状態にあらねばならない他方のサイリスタ
のゲートにその間中持続する逆バイアス電圧を導き得る
ように、各ダイオードに抵抗を並列接続したことを特徴
とするパルス変成器。In a pulse transformer that is provided with a secondary winding attached to each thyristor in order to provide mutually insulated gate pulses to two thyristors that are to be made conductive alternately in a power conversion device, the primary side of the pulse transformer is The AC voltage of each secondary winding generated by AC excitation is applied to the gate of each thyristor via a diode so that the two thyristors can receive it as a gate pulse alternately in half-wave periods with different polarities. The appropriate secondary windings are connected, and one thyristor must remain non-conducting while receiving and receiving gate pulses, in such a way as to introduce a sustained reverse bias voltage at the gate of the other thyristor. , a pulse transformer characterized by having a resistor connected in parallel to each diode.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7846578U JPS58384Y2 (en) | 1978-06-08 | 1978-06-08 | pulse transformer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7846578U JPS58384Y2 (en) | 1978-06-08 | 1978-06-08 | pulse transformer |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS53166374U JPS53166374U (en) | 1978-12-26 |
JPS58384Y2 true JPS58384Y2 (en) | 1983-01-06 |
Family
ID=28995564
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7846578U Expired JPS58384Y2 (en) | 1978-06-08 | 1978-06-08 | pulse transformer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58384Y2 (en) |
-
1978
- 1978-06-08 JP JP7846578U patent/JPS58384Y2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS53166374U (en) | 1978-12-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS58384Y2 (en) | pulse transformer | |
JPS6013278Y2 (en) | Dual type thyristor rectifier | |
SU1293784A1 (en) | Device for protection of inverter | |
JPS6135593U (en) | Inverter device | |
JPS6046640B2 (en) | Commutation failure prevention circuit for linear thyristor motor converter | |
JPH0150318B2 (en) | ||
SU1001362A1 (en) | Voltage converter | |
SU1095243A1 (en) | Storage register | |
JPS642963B2 (en) | ||
JPH0246237Y2 (en) | ||
SU650189A1 (en) | Static converter | |
JPH0521996Y2 (en) | ||
SU845249A1 (en) | Semi-bridge inverter | |
JPS60163835U (en) | Solid DC current and disconnection equipment | |
JPS5868320A (en) | Solid-state relay device for alternating current | |
JPS6117892U (en) | Regenerative power discharge device for inverter equipment | |
JPS5811930U (en) | current limiting device | |
JPS5984789U (en) | Induction heating inverter | |
JPS60141693U (en) | Regenerative inverter device for electric railways | |
JPS5975721U (en) | Electric leakage or disconnection | |
JPS5952736U (en) | Gate turn-off thyristor protection circuit | |
JPS58124087U (en) | gate drive circuit | |
JPS60177687U (en) | inverter circuit | |
JPS60103937U (en) | AC switch circuit | |
JPS58168892U (en) | DC short circuit detection device for inverse conversion circuit |