JPS5836176A - Transistor inverter - Google Patents

Transistor inverter

Info

Publication number
JPS5836176A
JPS5836176A JP56133808A JP13380881A JPS5836176A JP S5836176 A JPS5836176 A JP S5836176A JP 56133808 A JP56133808 A JP 56133808A JP 13380881 A JP13380881 A JP 13380881A JP S5836176 A JPS5836176 A JP S5836176A
Authority
JP
Japan
Prior art keywords
voltage
transistor
signal
frequency
triangular wave
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56133808A
Other languages
Japanese (ja)
Inventor
Takashi Sasaki
佐々木 喬
Wahei Inoue
和平 井上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mayekawa Manufacturing Co
Original Assignee
Mayekawa Manufacturing Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mayekawa Manufacturing Co filed Critical Mayekawa Manufacturing Co
Priority to JP56133808A priority Critical patent/JPS5836176A/en
Publication of JPS5836176A publication Critical patent/JPS5836176A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02PCONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P2201/00Indexing scheme relating to controlling arrangements characterised by the converter used
    • H02P2201/07DC-DC step-up or step-down converter inserted between the power supply and the inverter supplying the motor, e.g. to control voltage source fluctuations, to vary the motor speed

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

PURPOSE:To perform a sinusoidal wave-triangular wave modulation system by controlling a DC voltage in response to the set frequency, counting via a ring counter and employing as a base signal of a transistor a data signal in an ROM. CONSTITUTION:A DC voltage is controlled via controllers 49, 32 peoportionally to a set frequency from a frequency setter 46, an ROM50 which stores a signal obtained via sinusoidal wave-triangular wave modulation and a ring counter 48 which counts in the set frequency are provided. The data signals which are stored in the addresses of the ROM corresponding to the counted values of the counter 48 are applied to the bases of transistors 35-36, 36-39, 37-40. In this manner, the waveform signals corresponding to the angle are stored in the ROM, thereby performing a sinusoidal wave-triangular wave modulation system with a simple circuit.

Description

【発明の詳細な説明】 本発明は正弦波−三角波変調方式に係り、PムMと正弦
波PWMとを組合せたトランジスタインバータ装置に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a sine wave-triangular wave modulation system, and relates to a transistor inverter device that combines PMM and sine wave PWM.

一般に、II導電動機を駆動する場合、回転速度な変化
させるために電源周波数を変化すると、印加電圧も変化
しなければならない。
Generally, when driving a II conductive motor, if the power supply frequency is changed in order to change the rotational speed, the applied voltage must also be changed.

そこで、従来は矛1図に示すような6つのトランジスタ
ill f21 (31(41(5)(6)からなり、
2つ直列に接続したものを3組並列に接続し、各直列回
路の接続点から出力信号を得るトランジスタインバータ
の各トランジスタfil −−−+61のベースに正弦
波−三角波変調方式にて得られた変調信号を印加してこ
れら各トランジスタ(11−−−(6)のオン・オフを
制御し、電源周波数に対応して印加電圧も変化するよう
にしている・ そしてこの正弦波−三角波変調方式は矛2図に示すよう
に1周波数設定器0にて設定された電圧。
Therefore, conventionally, as shown in Figure 1, six transistors ill f21 (31 (41 (5) (6)),
Three sets of two connected in series are connected in parallel, and the output signal is obtained from the connection point of each series circuit at the base of each transistor fil --- +61 of the transistor inverter. A modulation signal is applied to control the on/off of each of these transistors (11--(6)), so that the applied voltage changes in accordance with the power frequency.And this sine wave-triangular wave modulation method is As shown in Figure 2, the voltage is set by the 1 frequency setter 0.

相%S相、T相の互いに120度ずつ位相の異なる三相
正弦波に変換される。また、前記パルス列信号r)は三
角波発生器α尋に入力され三角波(SW)K変換される
。一方、前記電圧(?、)は電圧調整器(ISにて矛1
図に示すインバータの出力電圧(af)K対応して信号
(vo)を出力する。
Phase % It is converted into a three-phase sine wave of S phase and T phase, which have different phases by 120 degrees from each other. Further, the pulse train signal r) is input to a triangular wave generator α and is converted into a triangular wave (SW). On the other hand, the voltage (?,) is
A signal (vo) is output corresponding to the output voltage (af)K of the inverter shown in the figure.

この信号(vo)は乗算器aeにて@(5)■の三相正
弦波とそれぞれ乗算され、信号(R4)(S、)(T、
)を出力する。この信号(R,)(S、)(T、)を矛
1の比較器αDで三角波(8W)とそれぞれ比較してイ
ンバータのトランジスタfil f2) (31のベー
ス信号(T、)(T、)(T、)を得る。また、信号(
R,)(S、)(T、)は加算器(ilmにて直流電圧
発生器α場から発生される電圧(−k)な加算した後、
矛2の比較器(至)で三角波(8W)とそれぞれ比較し
、インバータのトランジスタ(41+51 +61のベ
ース信号(’r4)(T−(T、)k得るものである。
This signal (vo) is multiplied by the three-phase sine wave of @(5)■ in the multiplier ae, and the signals (R4) (S, ) (T,
) is output. This signal (R,)(S,)(T,) is compared with the triangular wave (8W) by the comparator αD of spear 1, and the base signal of the inverter transistor fil f2) (31 base signal (T,)(T,) We get (T,). Also, we get the signal (
R,)(S,)(T,) is the voltage (-k) generated from the DC voltage generator α field in the adder (ilm).
They are compared with the triangular wave (8W) by the second comparator (total), and the base signal ('r4) (T-(T,)k of the inverter transistors (41+51+61) is obtained.

すなわち出力電圧波高値は一定とし、パルス幅変調(以
下PWM)によってパルス幅を変え出力電圧を変える方
法を採っている。
That is, a method is adopted in which the peak value of the output voltage is kept constant and the pulse width is changed by pulse width modulation (hereinafter referred to as PWM) to change the output voltage.

しかしながら、この従来の方式では三相正弦波発生器(
11,三角波発生器a4)、乗算器(1ω、加算器錦、
比較1t(In(イ)等の複雑な回路が必要であるとい
う欠点があった。
However, this conventional method uses a three-phase sine wave generator (
11, triangular wave generator a4), multiplier (1ω, adder Nishiki,
Comparison 1t(In(A)) and other complicated circuits were required.

本発明は上記欠点に鑑み、簡単な回路で正弦波−三角波
変調方式を達成することを目的としてなされたもので、
直列接続した1対のトランジスタを3組着列接続した回
路に直流電圧を入力するとともに、前記各トランジスタ
のベースに信号を印加して各トランジスタのオン・オフ
を制御し、前記直列に接続された1対のトランジスタの
接続点から三相交流電圧を得るトランジスタインバータ
装置において、設定周波数に比例して前記直流電圧を制
−するとともに、正弦波−三角線変調で得られた信号を
記憶するリード・オンリ・メモリと、前記設定周波数に
対応し【計数動作するリングカウンタとを備え、このリ
ングカウンタの計数値に対応する前記リード−オンリ・
メモリのアドレスに記憶されているデータ信号を前記ト
ランジスタのベースに印加することを特徴とするトラン
ジスタインバータ装置を提供するものである。
In view of the above drawbacks, the present invention was made with the aim of achieving a sine wave-triangular wave modulation method with a simple circuit.
A DC voltage is input to a circuit in which three pairs of transistors are connected in series, and a signal is applied to the base of each of the transistors to control on/off of each transistor. In a transistor inverter device that obtains a three-phase AC voltage from the connection point of a pair of transistors, there is a lead/lead device that controls the DC voltage in proportion to the set frequency and stores the signal obtained by sine wave-triangular line modulation. the read-only memory, and a ring counter that performs a counting operation corresponding to the set frequency;
The present invention provides a transistor inverter device characterized in that a data signal stored at an address in a memory is applied to the base of the transistor.

次に本発明の一実施例を矛6図に基づいて説明する。Next, one embodiment of the present invention will be described based on FIG.

シDはインバータで、入力端子の@(2)から入力され
た商業用三相交流電圧を整流回路@にて整流し、トラン
ジスタ(至)、インダクタ(5)、コンデンサ(至)(
至)およびダイオード(至)からなり後述する変調回路
C31)にてfbl+御されるチョッパー回路C32に
て所定電圧とし、端子(至)(財)関に出力する。
SI D is an inverter that rectifies the commercial three-phase AC voltage input from the input terminal @ (2) in the rectifier circuit @, converts the transistor (to), inductor (5), capacitor (to) (
A chopper circuit C32, which is controlled by a modulation circuit C31 (to be described later) and a diode (to), sets it to a predetermined voltage and outputs it to a terminal (to).

この端子(至)(至)関には、前段のエミッタと後段の
コレクタな接続することにより直列接続された3組のト
ランジスタ吃本ncm、67)−が並列に接続されてい
る。これら3組の前段のトランジスタC39(至)oi
のエミッタと後段のトランジスタ(至)G優(4Gのコ
レクタとの接続点には、誘導電動機0υに接続されると
ともにトランスと整流回路(ハ)を介して検出信号(−
f)を出力する検出端子に接続される(口)(V)fl
Mの出力ラインが接続されている。
Three sets of transistors ncm, 67)-, which are connected in series by connecting the emitter at the front stage and the collector at the rear stage, are connected in parallel to this terminal (to) (to) (to). These three sets of front-stage transistors C39 (to) oi
The connection point between the emitter of the transistor (to) and the collector of the subsequent transistor (to) G (4G) is connected to the induction motor 0υ and receives the detection signal (-) via the transformer and rectifier circuit (c).
(V)fl connected to the detection terminal that outputs f)
The output line of M is connected.

前記トランジスタ(至)−一一囮にはそれぞれコレクタ
・工電ツタ間にダイオード(43が接続されている。
A diode (43) is connected between the collector and the power supply terminal of each of the transistors (to)-11.

■はインバータC1’l)の入力電圧を測定する電圧計
である。
(2) is a voltmeter that measures the input voltage of the inverter C1'l).

Gυは前記インバータQυのそれぞれのトランジスタ(
至)−−−(イ)のベースK、これらのトランジスタ(
至)−m−に)をオン・オフ制御する変調信号を入力す
るとともに、前記チョッパー回路(至)を制御する変調
回路である。
Gυ is each transistor (
to) --- (a) base K, these transistors (
This is a modulation circuit that inputs a modulation signal for on/off control of (to)-m-) and also controls the chopper circuit (to).

(ハ)は周波数設定器で、設定周波数に対応する電圧(
νl)を出力する。この周波数設定器(ハ)の出力端は
、入力された電圧に対応する周波数fのパルス列信号σ
)を出力する電圧−周波数変換器補な介してリングカウ
ンタ(48に接続されるとともにチョッパー回路制御部
(41に接続されている。このチョッパー回路制御部(
41は電圧(V、)とインバータQυの検出信号(−f
)とを入力し、この入力により前記チョッパー回路03
を制御し設定置波数に比例した電圧を端子c33(ロ)
間に出力させる。
(C) is a frequency setter, and the voltage (
νl) is output. The output terminal of this frequency setter (c) is a pulse train signal σ of frequency f corresponding to the input voltage.
) is connected to the ring counter (48) and to the chopper circuit control section (41).
41 is the voltage (V, ) and the detection signal (-f) of the inverter Qυ
), and by this input, the chopper circuit 03
Controls the voltage proportional to the set wave number to terminal c33 (b)
output in between.

前記リングカウンタ囮は前記周波数fのパルス列信号(
イ)をクロック信号として軒数動作を行う360Xa4
のカウンタで、このリングカウンタ(倍の出力端はリー
ド・オンリ・メモリ(以下ROM)酷に接続されており
、このリングカウンタ(ハ)の計数値に対応するROM
61のアドレスに記憶されているデータ信号(T、)(
T、)(T、)(T4)(T、)(T、)を読出し、出
力端子511 sa q 64)(至)(至)から出力
してインバータ(2υの各トランジスタ(至)−一一一
のベースに印加する。
The ring counter decoy receives a pulse train signal (
360Xa4 that performs multiple operation using b) as a clock signal
The output terminal of this ring counter (double) is tightly connected to a read-only memory (ROM), and the ROM corresponding to the count value of this ring counter (c)
The data signal (T, ) (
T, )(T,)(T4)(T,)(T,) is read out and output from the output terminal 511 sa q 64)(to)(to) to the inverter (each transistor of 2υ(to)-11 Apply to one base.

次にROM61の各アドレスに記憶されている信号につ
いて才4図を用いて説明する。これは基本となる周波数
を決め、この基本周波数における正弦波−三角波変調方
式より求められるものである。
Next, the signals stored in each address of the ROM 61 will be explained using FIG. This is obtained by determining a fundamental frequency and using a sine wave-triangular wave modulation method at this fundamental frequency.

正弦波−三角波変調において矛4図囚に示すR相(A、
)、8相(A、)、T相(ム、)を正弦波と三角波(A
4)のうちトランジスタ(至)のベースにはR相(ム、
)が三角波(ム4)より大きいかまたは勢しい(A、≧
A4)^ときのみ「H」となる信号(T1)が、トラン
ジスタ(至)のベースにはS相(A2)が三角波(A4
)より大きいかまたは等しい(A2≧A4)IQときの
みrHJとなる信号(T2)が、トランジスタ(ロ)の
ベースにはT相(A、)が三角波(A4)より大きいか
または郷しい(A。
In sine wave-triangular wave modulation, the R phase (A,
), 8-phase (A, ), and T-phase (mu, ) are converted into sine waves and triangular waves (A
Among 4), the base of the transistor (to) has an R phase (mu,
) is larger or more powerful than the triangular wave (Mu4) (A, ≧
A4)^The signal (T1) that becomes “H” only when the S phase (A2) is at the base of the transistor (to) is a triangular wave
) is greater than or equal to (A2≧A4) A signal (T2) that becomes rHJ only when IQ is greater than or equal to (A2≧A4); .

≧A4)1)QときのみrHJとなる信号(T、)が入
力される。
≧A4) 1) A signal (T, ) that becomes rHJ only when Q is input.

また、後段の各トランジスタ(至)c(1mのベースに
は、前段のトランジスタ(至)(至)ODのベースの信
号(T、)(T2)(T5)とコンブリメントではなく
立上り時間をΔt、遅くし、立下り時間をΔt、早くし
た信号(T4)(T5)(T6)すなわち、 T−〒 −2Δt。
In addition, the base of each transistor (to) c (1 m) in the subsequent stage has a rise time of Δt, not congruence with the base signal (T, ) (T2) (T5) of the transistor (to) OD in the previous stage. , and the fall time is accelerated by Δt (T4), (T5), and (T6), that is, T−2Δt.

1 T5=〒2−2Δt1 T6−〒、−2Δt。1 T5=〒2-2Δt1 T6-〒, -2Δt.

が入力される。このΔt4時間は前段と後段のトランジ
スタ(ト)−tsカ同時にオンしてトランジスタが破壊
されるのを防止するためのもので、50ト〜50P秒程
度である。
is input. This Δt4 time is for preventing the transistors in the front and rear stages from being turned on at the same time and being destroyed, and is approximately 50 to 50 P seconds.

この信号(T、)=−(T6)がrI(Jとなる角度を
求める条件として、(イ)三角波の周期は40度とし、
角度0度で00値ヲトる、(ロ)正弦波、三角波の波高
値は工員で表わすものとすると、次の才1表および才2
表のようになる。
The conditions for finding the angle at which this signal (T,) = - (T6) becomes rI (J) are: (a) The period of the triangular wave is 40 degrees,
(2) If the wave height of a sine wave or a triangular wave is expressed in units of 0 degrees, the following tables 1 and 2 are used.
It will look like a table.

なお、これらの表ではrHJ信号は「1」とし、「L」
信号は「0」として表わすとともに、「↑」はこの角度
で「0」から11」になったことを、「↓」はこの角度
で「1」から「0」になったことを示している。
In addition, in these tables, the rHJ signal is set to "1", and the rHJ signal is set to "L".
The signal is expressed as "0", "↑" indicates that it went from "0" to "11" at this angle, and "↓" indicates that it went from "1" to "0" at this angle. .

(以下次頁) 牙1表 矛2表 次にとの矛1表および矛2表をもとにして角度0.2度
毎KROM61mのアドレス順に書込んだ場合のアドレ
スと信号との対応を矛6表く示す。なお、ROM61の
アドレスおよびリングカウンターの最大計数値は0.2
度毎の信号を書込むため540x1/(L2冨1800
必要となるが、0.2度毎に限られるものではなく、0
.2度以下の間隔にまたは12度以上の間隔にすること
もでき、この場合はROM(至)の必要なアドレス数も
変化する。
(See next page) Based on Tables 1 and 2, the correspondence between addresses and signals when written in the order of KROM61m addresses at angles of 0.2 degrees is explained. 6 Table shows. In addition, the maximum count value of the address of ROM61 and the ring counter is 0.2.
540x1/(L2 depth 1800
Although it is necessary, it is not limited to every 0.2 degrees,
.. It is also possible to make the interval less than 2 degrees or more than 12 degrees, in which case the number of required addresses of the ROM (to) also changes.

なお、ROM−のアドレス数に対応してリングカウンタ
ーの最大計数値も変化するのは当然のことであ−る。
Note that it is a matter of course that the maximum count value of the ring counter changes in accordance with the number of addresses in the ROM.

(以下次頁) 才 3 表 次にこの実施例の動作を説明する。(Next page below) Talent 3 table Next, the operation of this embodiment will be explained.

周波数設定器−にてI4電動機0υの回転速度に対応す
る周波数を設定すると、この周波数設定器−から設定周
波数に対応した電圧信号(νi)が出力される。
When a frequency corresponding to the rotational speed of the I4 motor 0υ is set using the frequency setter, a voltage signal (νi) corresponding to the set frequency is output from the frequency setter.

この電圧信号(ν、)はチョッパー回路制御部(41に
入力される。するとこのチョッパー回路制御部−はチョ
ッパー回路(至)を制御し、設定周波数が前記基本周波
数より高い場合は端子(至)(ロ)関に出力される電圧
を基本周波数の場合の電圧より高くし、設定周波数が基
本周波数より低い場合は端子(至)(至)間に出力され
る電圧を基本周波数の場合の電圧より低くする。このた
め端子(至)(ロ)間には設定周波数に比例した電圧が
出力される。なお、このチョッパー回路制御部−はイン
バータQυの出力信号(−f)も同時に入力しているが
、これは出力電圧を安定させるためである。
This voltage signal (ν,) is input to the chopper circuit control unit (41).Then, this chopper circuit control unit controls the chopper circuit (to), and if the set frequency is higher than the fundamental frequency, the terminal (to) is input to the chopper circuit control unit (41). (b) Make the voltage output to the terminal higher than the voltage at the fundamental frequency, and if the set frequency is lower than the fundamental frequency, make the voltage output between the terminals (to) higher than the voltage at the fundamental frequency. Therefore, a voltage proportional to the set frequency is output between the terminals (To) and (B).The output signal (-f) of the inverter Qυ is also input to this chopper circuit control section at the same time. However, this is to stabilize the output voltage.

また、前記電圧信号(νi)は電圧−周波数変換器(4
ηに入力され、これにより周波数fのパルス列信号(f
lに変換され出力される。この信号(flはリングカウ
ンタ(財)のクロック信号として入力される。するとリ
ングカウンタ(48はクロック信号を計数し、この計数
値に対応するR OM5Iのアドレスに書込まれている
データ信号を読み出し、対応するトランジスタ(至)−
−−f4(Iのベースに入力し、トランジスタ(至)−
t41のオン・オフを制御する。
Further, the voltage signal (νi) is transmitted to a voltage-frequency converter (4).
This generates a pulse train signal of frequency f (f
It is converted to l and output. This signal (fl) is input as the clock signal of the ring counter (incorporated).Then, the ring counter (48) counts the clock signal and reads out the data signal written in the address of ROM5I corresponding to this count value. , the corresponding transistor (to) −
--f4 (input to the base of I, transistor (to))-
Controls on/off of t41.

このように、インバータclO(1)チョッパー回路(
至)にて設定周波数に対応した電圧波高値となり、設定
周波数が変化してもこの設定周波数が基本周波数より高
い場合は短く、低い場合は長くというように変調信号は
周期が変化するだけで同一角度では常に同一波形となる
。このためインバータの出力ライン([1)(V)、(
V)■、■0間には波高値と周期は異なるが矛4図(U
−V)、(V−W)、(W−U)に示す波形の出力電圧
が得られることになる。
In this way, the inverter clO(1) chopper circuit (
(To) becomes the voltage peak value corresponding to the set frequency, and even if the set frequency changes, if the set frequency is higher than the fundamental frequency, it will be shorter, and if it is lower, it will be longer, so the modulation signal will remain the same, only the period changes. The waveform is always the same at all angles. Therefore, the inverter output line ([1) (V), (
V) The wave height and period are different between ■ and ■0, but the difference between Figure 4 (U
-V), (V-W), and (W-U) output voltages are obtained.

すなわち、パルス振幅変調(PAM)とパルス幅変11
il(PWM)との中間的なものとなる。
That is, pulse amplitude modulation (PAM) and pulse width variation11
It is intermediate between il (PWM).

本発明によれば、三相正弦波発生器、三角波発生器、乗
算器、加算器、比較器等からなる複雑な回路を必要とせ
ず、ROMK角度に応じた波形信号を記憶させることに
より正弦波−三角波変調方式が簡単な回路で達成でき、
インバータの回路を簡単化できるものである。
According to the present invention, there is no need for a complicated circuit consisting of a three-phase sine wave generator, a triangular wave generator, a multiplier, an adder, a comparator, etc., and the sine wave can be generated by storing a waveform signal according to the ROMK angle. - Triangular wave modulation method can be achieved with a simple circuit,
This allows the inverter circuit to be simplified.

【図面の簡単な説明】[Brief explanation of drawings]

矛1図は従来のトランジスタインバータ装置の回路図、
矛2図は同上変調回路図、矛3図は本発明の一実施例を
示すトランジスタインバータ装置の回路図、矛4図は説
明波形図である。 (ハ)(至)C37)(至)(至)(祷・・トランジス
タ、(ハ)・拳リングカウンタ、6I#−リード・オン
リeメモリ。
Figure 1 is a circuit diagram of a conventional transistor inverter device.
Figure 2 is a modulation circuit diagram as described above, Figure 3 is a circuit diagram of a transistor inverter device showing an embodiment of the present invention, and Figure 4 is an explanatory waveform diagram. (C) (To) C37) (To) (To) (Memorial... Transistor, (C) Fist ring counter, 6I#-Read-only e-memory.

Claims (1)

【特許請求の範囲】[Claims] (1)  直列接続した1対のトランジスタを3組着列
接続した回路に直流電圧を入力するとともに、剪記各ト
ランジスタのベースに信号を印加して各トランジスタの
オン・オフを制御し、前記直列に接続された1対のトラ
ンジスタの接続点から三相交流電圧を得るトランジスタ
インバータ装置において、設定周波数に比例して前記直
流電圧を制御するとともに、正弦波−三角波変調で得ら
れた信号を記憶するリード・オンリ・メモリと、前記設
定周波数に対応して計数動作するリングカウンタとを備
え、このリングカウンタの計数値に対応する前記り〜ド
・オンリ・メモリのアドレスに記憶されているデータ信
号を前記トランジスタのベースに印加することを特徴と
するトランジスタインバータ装置。
(1) A DC voltage is input to a circuit in which three pairs of transistors connected in series are connected, and a signal is applied to the base of each transistor to control on/off of each transistor. In a transistor inverter device that obtains a three-phase AC voltage from a connection point of a pair of transistors connected to a transistor, the DC voltage is controlled in proportion to a set frequency, and a signal obtained by sine wave-triangular wave modulation is stored. It is equipped with a read-only memory and a ring counter that performs a counting operation in accordance with the set frequency, and receives a data signal stored at an address of the read-only memory that corresponds to the count value of the ring counter. A transistor inverter device characterized in that a voltage is applied to the base of the transistor.
JP56133808A 1981-08-26 1981-08-26 Transistor inverter Pending JPS5836176A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56133808A JPS5836176A (en) 1981-08-26 1981-08-26 Transistor inverter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56133808A JPS5836176A (en) 1981-08-26 1981-08-26 Transistor inverter

Publications (1)

Publication Number Publication Date
JPS5836176A true JPS5836176A (en) 1983-03-03

Family

ID=15113512

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56133808A Pending JPS5836176A (en) 1981-08-26 1981-08-26 Transistor inverter

Country Status (1)

Country Link
JP (1) JPS5836176A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59204471A (en) * 1983-05-04 1984-11-19 Mitsubishi Electric Corp Inverter device
JPS59222080A (en) * 1983-05-30 1984-12-13 Toshiba Corp Voltage type inverter device
JPS60168058A (en) * 1984-02-13 1985-08-31 Toshiba Corp Fault detecting circuit of invertor device
JPS61116972A (en) * 1984-11-08 1986-06-04 Mitsubishi Heavy Ind Ltd Inverter device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5348449A (en) * 1976-08-10 1978-05-01 Westinghouse Electric Corp Direct digital dcctooac converter
JPS53100429A (en) * 1977-02-15 1978-09-01 Mitsubishi Electric Corp Control device of inverter
JPS54733A (en) * 1977-06-03 1979-01-06 Hitachi Ltd Controller for inverter
JPS54113832A (en) * 1978-02-24 1979-09-05 Matsushita Electric Ind Co Ltd Inverter device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5348449A (en) * 1976-08-10 1978-05-01 Westinghouse Electric Corp Direct digital dcctooac converter
JPS53100429A (en) * 1977-02-15 1978-09-01 Mitsubishi Electric Corp Control device of inverter
JPS54733A (en) * 1977-06-03 1979-01-06 Hitachi Ltd Controller for inverter
JPS54113832A (en) * 1978-02-24 1979-09-05 Matsushita Electric Ind Co Ltd Inverter device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59204471A (en) * 1983-05-04 1984-11-19 Mitsubishi Electric Corp Inverter device
JPS59222080A (en) * 1983-05-30 1984-12-13 Toshiba Corp Voltage type inverter device
JPS60168058A (en) * 1984-02-13 1985-08-31 Toshiba Corp Fault detecting circuit of invertor device
JPS61116972A (en) * 1984-11-08 1986-06-04 Mitsubishi Heavy Ind Ltd Inverter device

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