JPS5834832Y2 - flip-flop circuit - Google Patents

Description

[Detailed Description of the Invention] This invention relates to a flip-flop circuit using a programmable unijunction transistor (hereinafter referred to as PUT), and particularly relates to a flip-flop circuit that prevents malfunction of the PUT when switching on and off a DC power supply.

FIG. 1 is a circuit diagram showing a conventional flip-flop circuit.

In the figure, 1 is a DC power supply, 2 is a power switch whose one end is connected to this DC power supply l o) ■ terminal, and 3 is a cathode connected to the DC power supply 10) ■ PUT 14 whose one end is connected to this PUT 30) anode. and the other end is a resistor connected to the other end of the power switch 2, 5 is a PUT whose cathode is connected to the DC power supply 1C') e terminal, 6 is one end connected to the anode of this PUT 5, and the other end is connected to the power switch 2 The resistor connected to the other end of I
is a resistor whose one end is connected to the anode of PUT3, 8 is a capacitor whose one end is connected to the other end of this resistor 7 and the other end is connected to the anode of PUT5, 9 and 10 are connected in series, and the series resistor A resistor 11 has one end connected to the other end of the power switch 2 and the other end connected to the e terminal of the DC power supply 1.
Resistors 12 and 13 are connected in series, and one end of the series resistor Φ is connected to the gate of UT5 and the other end is connected to the connection point B of series resistors 9 and 10.
One end of 14 is connected to the PUT3 (7,) gate, and the other end is connected to the connection point A of resistors 12 and 13. A resistor, 15 is an oscillation circuit, 16 is a transistor whose base is connected to the output terminal of the oscillation circuit 15 and an emitter is connected to the e terminal of the DC power supply 1, 17 is a transistor whose one end is connected to the collector of the transistor 16, and the other end is a resistor. Connection point A between 12 and resistor 13
This is the resistor connected to.

The resistor 4 and PUT3, which is a switching element, are connected in series to form a first series resistor switching element, and the resistor 6 and PUT5, which is a switching element, are connected in series to form a second series resistor switching element. The resistor 9 and the resistor 10 are connected in series to constitute a first series resistor, and the resistor 12 and the resistor 13 are connected in series to constitute a second series resistor.

Next, the operation of the flip-flop circuit according to the above configuration will be explained.

First, when power switch 2 is turned on and closed, PUT5
A constant voltage determined by the resistance division ratio of the resistors 9 and 10 and the resistors 12 and 13 is applied to the gates of the DC power supply 1 and the resistors 12 and 13, respectively.

On the other hand, the oscillation circuit 15 operates in oscillation, and the oscillation pulse is applied to the base of the transistor 160).
turns on.

Therefore, the gate of PUT3 is connected to the 1st output terminal of DC power supply 1 - power switch 2 - resistor 4 - anode/gate of PUT3 -
Resistor 14 - Resistor 17 - Transistor 16 - DC power supply 1o
) Due to the closed loop of the e terminal, the gate current flows and the PUT
3 is turned on.

On the other hand, the capacitor 8 is the ■ terminal of the DC power supply 1 - the power switch 2 - the resistor 6 - the capacitor 8 - the resistor? - Anode/cathode of PUT 3 - DC power supply 10) Current flows through the closed loop of the e terminal and charges the battery.

This means that during the ON state of PUT3, capacitor 8 is charged by a time constant determined by the resistance values of resistors 6 and I and the capacitance of capacitor 8, and the charging voltage is higher than the voltage at the connection point B between resistors 9 and 10. Then, DC power supply 1
■Terminals - Power switch 2 - Resistor 6 - Anode of PUT5
Gate 1 - Resistor 11 - Resistor 10 - Gate current flows in the closed loop of the e terminal of DC power supply 1, and PUT5 turns on. Therefore, the charge in capacitor 8 is as follows: Capacitor 8 - Anode and cathode of PUT5 - PUT3 is discharged in the closed loop of cathode/anode-resistor 7, PUT 3 is turned off, and capacitor 8 is charged as shown.

Then, when the oscillation circuit 15 starts to oscillate again, the transistor 16 and PUT3 are turned on, and the above operation is repeated.

In this way, the flip-flop circuit operates in synchronization with the oscillation cycle of the oscillation circuit 15.

However, when the power switch 2 is turned on, the conventional flip-flop circuit operates in synchronization with the oscillation cycle of the oscillation circuit, but while the connection point C between the capacitor 8 and the resistor 7 is being charged to the voltage If the power switch 2 is opened and closed frequently, the PUT 3 will malfunction.

That is, when the power switch 2 is opened or closed while the PUT 5 is on, when the voltage at the connection point A is lower than the charging voltage of the capacitor 8 at the moment when the power switch 2 is closed, the voltage of the DC power supply 1 is applied to the gate of the PUT 3. Terminal - Power switch 2 - Resistor 4 - PUT3 anode/gate - Resistor 14 - Resistor 13 -
A gate current flows through the closed loop of the ○ terminal of the DC power supply 1, and the PUT 3 is turned on.

Further, when the voltage at the connection point A is higher than the charging voltage of the capacitor 8, current flows through the resistor 4 to charge the capacitor 8.

In this way, the gate current of PUT3 flows through the resistor 13 and triggers PUT3 regardless of the oscillation cycle of the oscillation circuit 15.

Therefore, when the power switch 2 is closed and the PUT3 is turned on while the capacitor 8 is not sufficiently charged, the capacitor 8 does not have sufficient charge to drive the PUT5 to the off state, and the PUT3 and 5 remain on.

As described above, the PUT3 has the disadvantage of being turned on regardless of the oscillation cycle of the oscillation circuit 15.

In view of the above points, this invention was made in order to solve such problems and eliminate such drawbacks. An object of the present invention is to provide a flip-flop circuit that operates reliably in synchronization with the oscillation cycle of an oscillation circuit regardless of charge.

Q) In order to achieve this purpose, the idea is to remove the resistor 13 of the second series resistor and insert a transistor in the discharge process of the capacitor, so that the PUT will not turn on when the transistor is off. This will be described in detail below using examples.

FIG. 2 is a circuit diagram showing an embodiment of the flip-flop circuit according to this invention, in which the resistor 13 in the circuit shown in FIG. 1 is omitted.

In addition, resistance 12. A series series body of the resistor 17 and the transistor 16, which is a switching element, constitutes a third series resistance switching element body.

Next, the operation of the embodiment shown in FIG. 2 will be explained.

First, after the power switch 2 is turned on and closed, the oscillation circuit 15 starts to oscillate and performs a flip-flop operation in synchronization with the oscillation cycle, which is the same as in FIG. 1, of course.

In this case, when the oscillation circuit 15 operates and a pulse signal is output, the voltage applied to the PUT3Φ gate is generated by the resistor 17.

Next, even if the power switch 2 is opened or closed while the connection point C between the capacitor 8 and the resistor 7 is being charged to the voltage of
The case where the flip-flop circuit operates reliably without any malfunction will be explained.

First, when the power switch 2 is opened or closed while the PUT 5 is in the on state, the voltage at the connection point A drops for a moment when the power switch 2 is closed, but the
Anode/gate of 3 - Resistor 14 - Resistor 17 Transistor 1
6 collector-emitter DC power supply 10) In the closed loop of the e terminal, the transistor 16 is connected to the oscillation circuit 1
PUT3 until it turns on in synchronization with the oscillation cycle of PUT3.
Since no gate current flows through PUT3, PUT3 remains in the off state.

Also, even if the voltage at connection point A drops momentarily, the capacitor 8
Due to the difference voltage between the charging voltage and the power supply voltage, the capacitor 8-
Resistor 7 - PUT3 anode/gate resistance 14 - Resistor 12 -
Even if a resistor 6-capacitor 80 closed loop is configured, the above resistor? , 14°12.6 is large and the time constant is long, so PUT3 cannot be gate triggered.

Therefore, the discharge path of the capacitor 7 is not formed, and the point C maintains the charged state of ■.

Then, after the power switch 2 is closed, the next pulse signal is generated from the oscillation circuit 15, and the PUT 3 is not turned on and remains off until the transistor 16 is turned on.

In this way, this invention prevents the gate current of PUT3 from flowing independently of the oscillation circuit 15 by eliminating the resistor 13, so even if the power switch 2 is opened or closed, PUT3 will not malfunction. , can operate in complete synchronization with the operation of the oscillation circuit 15.

As explained in detail above, according to the flip-flop circuit according to this invention, it is possible to prevent malfunction of the PUT when switching on and off the DC power supply, and it is possible to operate reliably in synchronization with the oscillation cycle of the oscillation circuit. effective.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a conventional flip-flop circuit, and FIG. 2 is a circuit diagram showing an embodiment of the flip-flop circuit according to this invention. 1...DC power supply, 2...Power supply, 3...Programmable unijunction transistor, 4...Resistor, 5...・Programmable unijunction transistor, 6 and I...Resistor, 8...Capacitor, 9
~14... Resistor, 15... Oscillation circuit,
16...Transistor. Note that the same numbers indicate the same or equivalent parts.

Claims (2)

[Scope of utility model registration request] (1) A first resistance switching element series body in which a first resistance and a tenth) programmable unijunction transistor are connected in series, and a second resistance switching element series body in which a second resistance and a second programmable unijunction transistor are connected in series. a resistive switching element series body, and a third and fourth resistive switching element series body;
A third resistor switching element series body in which a resistor and a switching element are connected in series, a resistor series body in which a fifth and a sixth resistor are connected in series, and a seventh resistor and a capacitor in series are connected in series. (C) connecting the body to the anode of the first programmable unijunction transistor and the second
) a series resistance capacitor connected between the anode of the programmable unijunction transistor;
an 80th resistor connected between the gate of the programmable unijunction transistor and the connection point of the third and fourth resistors; and the gate of the second programmable unijunction transistor and the fifth and sixth resistors.
a ninth resistor connected between the connection point of the first and second resistors; A flip-flop circuit comprising: a third series resistor switching element; and a DC power source connected to a positive terminal and a negative terminal after connecting the series resistors in parallel. (2) The flip-flop circuit according to claim 1, wherein the third resistance switching element O switching element is a transistor.