JPS5834051B2 - electronic tuning device - Google Patents
electronic tuning deviceInfo
- Publication number
- JPS5834051B2 JPS5834051B2 JP52084737A JP8473777A JPS5834051B2 JP S5834051 B2 JPS5834051 B2 JP S5834051B2 JP 52084737 A JP52084737 A JP 52084737A JP 8473777 A JP8473777 A JP 8473777A JP S5834051 B2 JPS5834051 B2 JP S5834051B2
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- circuit
- controlled oscillator
- voltage controlled
- tuning device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
- H03J5/00—Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner
- H03J5/02—Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner with variable tuning element having a number of predetermined settings and adjustable to a desired one of these settings
- H03J5/0245—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form
- H03J5/0272—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form the digital values being used to preset a counter or a frequency divider in a phase locked loop, e.g. frequency synthesizer
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
- Superheterodyne Receivers (AREA)
Description
【発明の詳細な説明】
本発明はラジオ受信機等に用いられる電子同調装置に関
するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic tuning device used in radio receivers and the like.
従来、この種の同調装置は局部発振回路にＰＬＬシンセ
サイザを用い、一定の周波数間隔で局部発信周波数を発
生せしめ、主同調回路あるいは段間同調回路の同調には
前記ＰＬＬに含よれる位相比較器出力を低域ｆ波した信
号を用５）、これを同調用バラクタダイオードに供給し
、適当なインダクタンスと容量を付加することにより局
部発信周波数と信号周波数との差を実用上、問題のない
所まで補正している。Conventionally, this type of tuning device uses a PLL synthesizer as a local oscillation circuit to generate local oscillation frequencies at fixed frequency intervals, and a phase comparator included in the PLL is used to tune the main tuning circuit or the interstage tuning circuit. By using a low-frequency f-wave output signal5), supplying this to a tuning varactor diode, and adding appropriate inductance and capacitance, the difference between the local oscillation frequency and the signal frequency can be adjusted to a point where there is no problem in practice. It has been corrected up to.
しかしこの方法はアンテナ回路高周波増幅回路の選択度
のＱが低いため、温吠等のずれによる感度低下が少なく
なっているにすぎない。However, in this method, since the selectivity Q of the antenna circuit high-frequency amplification circuit is low, the decrease in sensitivity due to deviations such as thermal fluctuations is only reduced.
本発明はこの種の従来に比べて充分な感度をもたせるこ
とができる装置を提供するもので、以下にその実施例に
、ついて説明する。The present invention provides an apparatus of this type that can have sufficient sensitivity compared to the conventional apparatus, and examples thereof will be described below.
第１図において１はアンテナ、２は主同調回路、３は高
周波増幅器、４は段間同調回路、５は混合器、６は中間
周波信号の出力端子である。In FIG. 1, 1 is an antenna, 2 is a main tuning circuit, 3 is a high frequency amplifier, 4 is an interstage tuning circuit, 5 is a mixer, and 6 is an output terminal for an intermediate frequency signal.
７は局部発振信号を発生するＰＬＬで、プログラマブル
デバイダ７ａ１基準信号を発生する発振器７ｂ。7 is a PLL that generates a local oscillation signal, and an oscillator 7b that generates a programmable divider 7a1 reference signal.
位相比較器７ｃ、ローパスフィルタ７ｄ、および電圧制
御発振器７ｅを備えている。It includes a phase comparator 7c, a low pass filter 7d, and a voltage controlled oscillator 7e.
８は電圧側（財）発振器である。8 is a voltage side oscillator.
なお高周波増幅器２、段間同調回路４および発振器８は
それぞれ等しいインダクタンスをもつコイルと、容量対
印加電圧特性の揃ったバラクタダイオードからなるタン
ク回路を備えており、一定直流電圧をそれぞれに加えた
場合には回路２ｊ４における同調周波数、発振器８の発
振周波数が等しくなるように構成している。The high frequency amplifier 2, the interstage tuning circuit 4, and the oscillator 8 are each equipped with a tank circuit consisting of a coil with equal inductance and a varactor diode with the same capacitance vs. applied voltage characteristics, and when a constant DC voltage is applied to each of them, The tuning frequency in the circuit 2j4 and the oscillation frequency of the oscillator 8 are configured to be equal.
９はプログラマブルデバイダ、１０６よディジタル加算
器、１１は位相比較器、１２はローパスフィルタである
。9 is a programmable divider, 106 is a digital adder, 11 is a phase comparator, and 12 is a low-pass filter.
１３はプリセット信号の加わる端子である。13 is a terminal to which a preset signal is applied.
次にこの実施例の動作について説明する。Next, the operation of this embodiment will be explained.
今、発振器７ｂの基準発振周波数をＩＫＨｚ、端子６に
得る中間周波数を４５５ＫＨｚ、アンテナ１か卯受信信
号の周波数を１０００ＫＨｚとする。Now, assume that the reference oscillation frequency of the oscillator 7b is IKHz, the intermediate frequency obtained at the terminal 6 is 455KHz, and the frequency of the signal received by the antenna 1 is 1000KHz.
したがってプリセット端子１３には
がプリセットされており、プログラマブルデバイダ９と
デジタル加算器１０に入力されている。Therefore, is preset at the preset terminal 13 and input to the programmable divider 9 and digital adder 10.
デジタル加算器１０により、端子１１ａに常時加えられ
ている、
だけプリセット値１０００に加算された値１４５５は、
プログラマブルデバイダ７ａに入力され、結果として
の局部発振側枝数が電圧制御発振器７ａより出力され、
混合器５に入力される。The value 1455 added to the preset value 1000 by the digital adder 10 is always added to the terminal 11a.
is input to the programmable divider 7a, and the resulting number of local oscillation side branches is output from the voltage controlled oscillator 7a,
It is input to mixer 5.
一方、プリセットされた値（１０００）はプログラマブ
ルデバイダ９にも入力されているから、電圧制御発振器
８、位相比較器１１、低域ｒ波器１２から構成されるＰ
ＬＬシンセサイザは受信周波数に等しい１００ＯＩＧ（
ｚを出力する。On the other hand, since the preset value (1000) is also input to the programmable divider 9, the P
The LL synthesizer has 100OIG (
Output z.
ここで電圧制御発振器８と、同調回路２，４のバラクタ
ダイオードドには等しい電圧が印加されているから、同
調回路は、受信周波数に同調し、トラッキング誤差は原
理的に発生しない。Here, since equal voltages are applied to the voltage controlled oscillator 8 and the varactor diodes of the tuning circuits 2 and 4, the tuning circuits are tuned to the receiving frequency and no tracking error occurs in principle.
但し、本実施例においては受信周波数に等しい周波数で
電圧制御発振器８が発振動作を行なうため、このＰＬＬ
系を他の部分から充分シールドする必要がある。However, in this embodiment, since the voltage controlled oscillator 8 performs oscillation operation at a frequency equal to the reception frequency, this PLL
The system must be adequately shielded from other parts.
またそのシールドが充分にできない場合は、電圧制御発
振器８に、用いるコイルのインダクタンスを２２倍（Ｎ
は整数）すると共に基準発振周波数を２ 倍する等に
より電圧制御発振器８の基本波及び高調波を同調周波数
から除外することも可能である。In addition, if the shielding is not sufficient, the inductance of the coil used in the voltage controlled oscillator 8 should be increased by 22 times (N
is an integer) and by doubling the reference oscillation frequency, etc., it is also possible to exclude the fundamental wave and harmonics of the voltage controlled oscillator 8 from the tuning frequency.
上記実施例より明らかなように本発明によればバラクタ
ダイオードのアンバランスによるトラッキング誤差のみ
考慮すれば、光分に高いＱをもつ同調回路を構成する・
ことかでき、高感度の受信機を提供することができる。As is clear from the above embodiments, according to the present invention, if only the tracking error due to the unbalance of the varactor diodes is taken into account, a tuned circuit with a high Q for light components can be constructed.
This can provide a highly sensitive receiver.
図面は本発明の一実施例による電子同調装置のブロック
図である。
２・・・・・・主同調回路、４・・・・・・段間同調回
路、７・・・・・・ＰＬＬ、８・・・・・・電圧制御発
振器。The drawing is a block diagram of an electronic tuning device according to an embodiment of the invention. 2... Main tuning circuit, 4... Interstage tuning circuit, 7... PLL, 8... Voltage controlled oscillator.
Claims (1)
電子同調装置において、容量対電圧特性の揃った複数個
のバラクタダイオードと同数のコイルよりなる複数（＆
のタンク回路、この複数個のタンク回路のうち１個を用
いて構成される電圧制御発振器、およびこの電圧制御発
振器の発振周波数を局部発振周波数と中間周波数の和あ
るいは差の整数倍あるいは整数分の−の周波数にロック
するためのＰＬＬ回路を有し、前記電圧制御発振器に印
加する直流電圧を他の複数のタンク回路を構成するバラ
クタにも印加し、これらのタンク回路を受信信号の同調
回路として用いることを特徴とする電子同調装置。In an electronic tuning device with a local oscillation circuit using an I PLL synthesizer, a plurality of varactor diodes with the same capacitance-to-voltage characteristics and the same number of coils (&
tank circuit, a voltage controlled oscillator configured using one of the plurality of tank circuits, and an oscillation frequency of this voltage controlled oscillator that is an integral multiple or fraction of the sum or difference between the local oscillation frequency and the intermediate frequency. The DC voltage applied to the voltage controlled oscillator is also applied to the varactors constituting the other plurality of tank circuits, and these tank circuits are used as a tuning circuit for the received signal. An electronic tuning device characterized in that it is used.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52084737A JPS5834051B2 (en) | 1977-07-14 | 1977-07-14 | electronic tuning device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52084737A JPS5834051B2 (en) | 1977-07-14 | 1977-07-14 | electronic tuning device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5419314A JPS5419314A (en) | 1979-02-14 |
| JPS5834051B2 true JPS5834051B2 (en) | 1983-07-23 |
Family
ID=13839000
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP52084737A Expired JPS5834051B2 (en) | 1977-07-14 | 1977-07-14 | electronic tuning device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5834051B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56141629A (en) * | 1980-04-08 | 1981-11-05 | Sony Corp | Synthesizer receiver |
| JPS5721132A (en) * | 1980-07-15 | 1982-02-03 | Pioneer Electronic Corp | Pll frequency synthesizer tuner |
| JPS5769937A (en) * | 1980-10-20 | 1982-04-30 | Matsushita Electric Ind Co Ltd | Electronic tuning type receiver |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4984304A (en) * | 1972-12-18 | 1974-08-13 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5177013U (en) * | 1974-12-13 | 1976-06-17 |
-
1977
- 1977-07-14 JP JP52084737A patent/JPS5834051B2/en not_active Expired
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4984304A (en) * | 1972-12-18 | 1974-08-13 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5419314A (en) | 1979-02-14 |
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