JPS58154936A - Channel selecting device - Google Patents

Channel selecting device

Info

Publication number
JPS58154936A
JPS58154936A JP3870182A JP3870182A JPS58154936A JP S58154936 A JPS58154936 A JP S58154936A JP 3870182 A JP3870182 A JP 3870182A JP 3870182 A JP3870182 A JP 3870182A JP S58154936 A JPS58154936 A JP S58154936A
Authority
JP
Japan
Prior art keywords
frequency
output
local oscillation
circuit
change
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3870182A
Other languages
Japanese (ja)
Other versions
JPS6313368B2 (en
Inventor
Masahiro Matsubara
松原 正廣
Katsuhiko Miyanaga
宮永 克彦
Junichi Kubota
順一 久保田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP3870182A priority Critical patent/JPS58154936A/en
Publication of JPS58154936A publication Critical patent/JPS58154936A/en
Publication of JPS6313368B2 publication Critical patent/JPS6313368B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03JTUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J3/00Continuous tuning
    • H03J3/28Continuous tuning of more than one resonant circuit simultaneously, the tuning frequencies of the circuits having a substantially constant difference throughout the tuning range
    • H03J3/32Arrangements for ensuring tracking with variable capacitors

Abstract

PURPOSE:To reduce distortion and to obtain sufficiently less gain change, by keeping a resonance frequency of a channel selecting resonance circuit and a local oscillation resonance circuit independently of the change in a gain controlling voltage. CONSTITUTION:In a local oscillation circuit LOC, the local oscillation resonance circuit A2 is formed with a coil L3, a varactor diode D3, a capacitor C3, and a varactor diode D4, a gain controlling voltage V2 is applied to the diode D4 via a resistor R7, an oscillator OSC1 is oscillated in the resonance frequency of the circuit A2, and the oscillation output is frequency-divided at a frequency divider DV. The phase of the frequency-divided output of the DV and of the output of a reference signal generator OSC2 are compared at a phase comparator PC, an output of the PC is applied to the D3 via a low-pass filter LPF, allowing to compensate the change in the local oscillating frequency due to the change in a gain controlling voltage V2, and as a result, the local oscillation frequency is kept at the same frequency even if the gain control voltage V2 is changed.

Description

【発明の詳細な説明】 この発明はラジオ受信機等に内蔵された選局装置に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a channel selection device built into a radio receiver or the like.

従来の選局装置は、共振回路によって信号周波数を選択
して抽出するようになっており、#11図に示すように
、入力信号をコイルLよとコンデンサCよとで形成され
る共振回路に入力して共振回路の共振周波数に対応する
周波数成分を抽出し、結合コンデンサC2を通してトラ
ンジスタQよで増幅して結合トランスTIKより次段の
回路に供給するようになっている。この場合、利得は、
利得制御電圧■、により分圧抵抗によ、R2を介しトラ
ンジスタQよのゲート・ソース間のバイアス電圧を変化
させて調整している。なお、R3は抵抗、C3は・くイ
ノ(スコンデンサである。
Conventional channel selection devices use a resonant circuit to select and extract signal frequencies, and as shown in Figure #11, the input signal is sent to a resonant circuit formed by a coil L and a capacitor C. A frequency component corresponding to the resonant frequency of the resonant circuit is input, amplified by a transistor Q through a coupling capacitor C2, and supplied to the next stage circuit from a coupling transformer TIK. In this case, the gain is
The bias voltage between the gate and source of the transistor Q is changed and adjusted by the gain control voltage (2) using the voltage dividing resistor via R2. Note that R3 is a resistor and C3 is a capacitor.

しかし、このような構成では、トランジスタQよのゲー
トには減衰されていない信号が加えられているために、
歪を発生しやすくまた充分な利得変化も得られなかった
However, in such a configuration, since an unattenuated signal is applied to the gate of transistor Q,
Distortion was likely to occur and sufficient gain changes could not be obtained.

したがって、この発明の目的は、歪を少なくできるとと
もに充分な利得変化を得ることができる選局装置を提供
することである。
Therefore, an object of the present invention is to provide a channel selection device that can reduce distortion and obtain a sufficient change in gain.

この発明の一実施例を第2図に示す。すなわち、この選
局装置は、トランジスタQよのバイアス電圧を変化させ
るのではなく、トランジスタQよのゲートに加えられる
信号レベルそのものを調整することにより利得を変える
ものである。より詳しく説明すると、この選局装置は、
選局用共振回路AよをコイルL2とコンデンサC4と電
圧可変容量ダイオードDよ、D2とで構成しており、信
号は上記共振回路Aユに入力され、所定周波数成分が抽
出され、コンデンサC6を通してトランジスタQ2で増
幅され、結合トランスT2により次段の回路に供給され
る。この場合、選局用共振回路A工で抽出された信号は
、電圧可変容量ダイオードDよとコンデンサC4および
電圧可変容量ダイオードD2とで分割されてトランジス
タQよに加えられ、抵抗R5を介して電圧可変容量ダイ
オードD2に加える利得制御電圧v2t−変えることに
より電圧可変容量ダイオードD2の容量が変化して分割
比が変わシ、トランジスタQ2に加えられる信号レベル
は変化する。しかし、このままでハコイルLgとコンデ
ンサC41圧可変容量タイオードDよ、D2とで構成さ
れる選局用共振回路Aよの共振周波数は変化してしまう
。そこで電圧可変容量夕。
An embodiment of this invention is shown in FIG. That is, this channel selection device changes the gain by adjusting the signal level itself applied to the gate of transistor Q, rather than changing the bias voltage of transistor Q. To explain in more detail, this channel selection device is
The tuning resonant circuit A is composed of a coil L2, a capacitor C4, and voltage variable capacitance diodes D and D2.The signal is input to the resonant circuit A, a predetermined frequency component is extracted, and the signal is transmitted through the capacitor C6. It is amplified by transistor Q2 and supplied to the next stage circuit by coupling transformer T2. In this case, the signal extracted by the channel selection resonant circuit A is divided between the voltage variable capacitance diode D, the capacitor C4, and the voltage variable capacitance diode D2, and is applied to the transistor Q, and is applied to the voltage via the resistor R5. By changing the gain control voltage v2t applied to the variable capacitance diode D2, the capacitance of the voltage variable capacitance diode D2 changes, the division ratio changes, and the signal level applied to the transistor Q2 changes. However, as it is, the resonant frequency of the channel selection resonant circuit A composed of the coil Lg, the capacitor C41, the variable capacitance diode D, and D2 changes. Therefore, there is a variable voltage capacity.

イオードD工の容量も変化させることによってコンデン
サC4および電圧可変容量ダイオ−ドロ工、D2ノ金威
容量は変化しないようにして共振周波数のずれを補正し
ている。異体的には、PLL方式の局部発振回路Loc
を用いている。この局部発振回路LOCif、コイルL
3.電圧可変容量ダイオ−)−D3゜コンデンサC5,
可変容量ダイオードD4で局部発振用共振回路A、を構
成し、電圧可変容量ダイオードD4に抵抗翼、を介して
利得制御電圧V、を加え、この局部発振用共振回路A2
の共振周波数で発振器08C1を発振させ、この発振器
O5C工の発振出力を分周器DVで分周し、この分周器
DVの分周出力と基準信号発生器OSC,の出力とを位
相比較器pcで位相比較し、この位相比較器PCの出力
をロー・(スフィルタLPFを通して電圧可変容量ダイ
オードD3に加え、利得制御電圧v2の変化による局部
発振周波数の変化を補正し、結果として局部発振周波数
を利得制御電圧v2が変化しても同じ周波数に保つ。
By changing the capacitance of the diode D, the difference in resonance frequency is corrected without changing the capacitance of the capacitor C4, the voltage variable capacitance diode D2, and the metal capacitance of the diode D2. Variantly, PLL type local oscillation circuit Loc
is used. This local oscillation circuit LOCif, coil L
3. Voltage variable capacitance diode) -D3゜Capacitor C5,
The variable capacitance diode D4 constitutes a local oscillation resonant circuit A, and a gain control voltage V is applied to the voltage variable capacitance diode D4 via a resistor blade.
The oscillator 08C1 is oscillated at a resonant frequency of The phase is compared using a PC, and the output of the phase comparator PC is applied to the voltage variable capacitance diode D3 through a low-pass filter LPF, and the change in the local oscillation frequency due to the change in the gain control voltage v2 is corrected, and as a result, the local oscillation frequency is kept at the same frequency even if the gain control voltage v2 changes.

そして、この局部発振回路LOGのローパスフィルタL
PFの出力を抵抗R,t−介して電に可変容量ダイオー
ドDよにも加えて選局用共振回路へ〇と局部発振用共振
回路A2のトラッキングをとることによシ。
Then, the low-pass filter L of this local oscillation circuit LOG
The output of the PF is connected to the current through the resistors R and t-, and the variable capacitance diode D is also added to the resonant circuit for tuning by tracking the resonant circuit A2 for local oscillation.

信号側の選局用共振回路Aよが局部発振回路LOGの局
部発振用共振回路A2と同じ変化をすることになり、通
常のトランキングずれの範囲内で信号側の選局用共振回
路Aよの共振周波数は一定に保たれる。
The resonant circuit A for tuning on the signal side changes in the same way as the resonant circuit A2 for local oscillation of the local oscillation circuit LOG, and the resonant circuit A for tuning on the signal side changes within the range of normal trunking deviation. The resonant frequency of is kept constant.

選局周波数を変える場合は、分周器DVの分局比を変え
ればよく、この場合、分局比に応じて選局用共振回路へ
よおよび局部発振用共振回路A2の共振周波数が変化す
るが、その変化後の共振周波数が利得制御電圧の変化に
かかわらず一定に保たれる。
When changing the tuning frequency, it is sufficient to change the division ratio of the frequency divider DV. In this case, the resonant frequency of the tuning resonant circuit and the local oscillation resonant circuit A2 changes according to the division ratio. The resonant frequency after the change is kept constant regardless of the change in the gain control voltage.

々お、R8,R,は抵抗、C7Viバイパスコンデンサ
である。
R8 and R are resistors and C7Vi bypass capacitors.

このように、この実施例は、共振コンデンサ(C4゜D
よ、D2)の選局用共振回路Aよの出力を取シ出し、容
量の分割比を変化させることによって出力レベルを変化
させると同時に、それによって起こる共振周波数のずれ
を局部発振回路LOGを用いて自動的に補正するように
した丸め、歪を少なくできるとともに共振Qを低下させ
ることなく充分な利得変化を得ることができる。
In this way, this embodiment uses a resonant capacitor (C4°D
, take the output from the resonant circuit A for channel selection in D2), change the output level by changing the capacitance division ratio, and at the same time use the local oscillation circuit LOG to correct the resulting shift in the resonant frequency. By automatically correcting rounding, distortion can be reduced, and a sufficient gain change can be obtained without lowering resonance Q.

以上のように、この発明の選局装置は、jllおよび@
2の電圧可変容量素子の直列回路と第1のコイルとから
な〕前記第2の電圧可変容量素子に利得制御電圧を加え
て前記第1および第2の電圧可変容量素子の中点から出
力をとり出す選局用共振回路と、jll3および第4の
電圧可変容量素子の直列回路とjll2のコイルとから
なり前記第4の電圧可変容量素子に前記利得制御電圧を
加える局部発振用共振回路と、この局部発振用共振回路
の共振周波数で発振する発振器と、この発振器の出力を
分周する分局器と、基準信号発生器とこの基準信号発生
器の出力と前記分局器の出力を位相比較する位相比較器
と、この位相比較器の出力を低域ろ涙して前記第1およ
びJllI3の電圧可変容量素子に加えるローパスフィ
ルタとを備え、前記・利得制御電圧の変化にかかわらず
前記選局用共振回路および前記局部発振用共振回路の共
振周波数を一定に保つようにしているので、歪を少なく
できるとともに充分な利得変化を得ることができるとい
う効果がある。
As described above, the channel selection device of the present invention can select jll and @
a series circuit of two voltage variable capacitance elements and a first coil] applying a gain control voltage to the second voltage variable capacitance element to generate an output from the midpoint of the first and second voltage variable capacitance elements; a local oscillation resonant circuit that applies the gain control voltage to the fourth voltage variable capacitance element, which is made up of a series circuit of jll3 and a fourth voltage variable capacitance element, and a coil of jll2; An oscillator that oscillates at the resonant frequency of this local oscillation resonant circuit, a divider that divides the output of this oscillator, a reference signal generator, and a phase that compares the phase of the output of this reference signal generator and the output of the divider. a comparator; and a low-pass filter that filters the output of the phase comparator and applies it to the first and JllI3 voltage variable capacitance elements, and the tuning resonant circuit Furthermore, since the resonant frequency of the local oscillation resonant circuit is kept constant, distortion can be reduced and a sufficient gain change can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

#I1図は従来の選局装置の回路図、第2図はこの発明
の一実施例の回路図である。 A1・・・選局用共振回路、A2・・・局部発振用共振
回路、C4”5・・・コンデンサ、Dl、D2.D3.
D4・・・電圧可変容量ダイオード、LOC・・・局部
発振回路、O20工・・・発振器、08C3・基準信号
発生器、DV・・・分局器、PC・・位相比較器、LP
F・・・ローパスフィルタ第1図 第2図
#I1 is a circuit diagram of a conventional channel selection device, and FIG. 2 is a circuit diagram of an embodiment of the present invention. A1... Resonance circuit for tuning, A2... Resonance circuit for local oscillation, C4''5... Capacitor, Dl, D2.D3.
D4... Voltage variable capacitance diode, LOC... Local oscillation circuit, O20... Oscillator, 08C3... Reference signal generator, DV... Branch, PC... Phase comparator, LP
F...Low pass filter Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] jllおよび第2の電圧可変容量−子の直列回路と第1
のコイルとからなり前記第2の電圧可変容量素子に利得
制御電圧を加えて前記第1および第2の電圧可変容量素
子の中点から出力をと夛出す選局用共振回路と、第3お
よび第4の電圧可変容量素子の直列回路と第2のコイル
とからな〕前記第4の電圧可変容量素子に前記利得制御
電圧を加える局部発振用共振回路と、この局部発振用共
振回路の共振周波数で発振する発振器と、この発振器の
出力を分局する分周器と、基準信号発生器とこの基準信
号発生器の出力と前記分周器の出力を位相比較する位相
比較器と、この位相比較器の出力を低域ろ波して前記J
11および第3の電圧可変容量素子に加えるローパスフ
ィルタとを備え、前記利得制御電圧の変化Kかかわらず
前記選局用共振回路および前記局部発振用共振回路の共
振周波数を一定に保つようにした選局装置。
jll and the second voltage variable capacitor-child series circuit and the first
a resonant circuit for tuning, which applies a gain control voltage to the second voltage variable capacitance element and outputs an output from the midpoint of the first and second voltage variable capacitance elements; a local oscillation resonant circuit that applies the gain control voltage to the fourth voltage variable capacitance element; and a resonant frequency of the local oscillation resonant circuit; an oscillator that oscillates at , a frequency divider that divides the output of this oscillator, a reference signal generator, a phase comparator that compares the phases of the output of this reference signal generator and the output of the frequency divider, and this phase comparator. The output of J is low-pass filtered and
11 and a low-pass filter applied to the third voltage variable capacitance element, and the resonant frequency of the tuning resonant circuit and the local oscillation resonant circuit is kept constant regardless of the change K of the gain control voltage. station equipment.
JP3870182A 1982-03-10 1982-03-10 Channel selecting device Granted JPS58154936A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3870182A JPS58154936A (en) 1982-03-10 1982-03-10 Channel selecting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3870182A JPS58154936A (en) 1982-03-10 1982-03-10 Channel selecting device

Publications (2)

Publication Number Publication Date
JPS58154936A true JPS58154936A (en) 1983-09-14
JPS6313368B2 JPS6313368B2 (en) 1988-03-25

Family

ID=12532613

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3870182A Granted JPS58154936A (en) 1982-03-10 1982-03-10 Channel selecting device

Country Status (1)

Country Link
JP (1) JPS58154936A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6251884U (en) * 1985-09-19 1987-03-31

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6251884U (en) * 1985-09-19 1987-03-31

Also Published As

Publication number Publication date
JPS6313368B2 (en) 1988-03-25

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