JPS5833841A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5833841A JPS5833841A JP56131490A JP13149081A JPS5833841A JP S5833841 A JPS5833841 A JP S5833841A JP 56131490 A JP56131490 A JP 56131490A JP 13149081 A JP13149081 A JP 13149081A JP S5833841 A JPS5833841 A JP S5833841A
- Authority
- JP
- Japan
- Prior art keywords
- film
- gas
- reaction
- resin
- conduit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
- C23C16/403—Oxides of aluminium, magnesium or beryllium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
Abstract
Description
【発明の詳細な説明】
本発−は、ポリイミド系樹脂膜を絶縁膜として用いる半
導体装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device using a polyimide resin film as an insulating film.
例えば特公＠４８−２９５６号明細書に示されたボリイ
２ドイツインドロ中ナシリンジオン合成樹脂（以下、Ｐ
ＩＱ樹脂と称する）は、溶液状態で半導体基板上に塗布
後に硬化されるものであるから、表面の平坦性の嵐い絶
縁属を形成するのに有利である。しかも、このＰＩＱ樹
脂樹脂筒パッケージのモールド樹脂等から放射されるα
！ｌｌを遁断する作用を有し【おり、半導体素子の耐α
−強度、例えはＭＯａ型メ４ ｓ）の電荷保持機能を向
上させるのく有効なパッジベージｌン効果を示す。For example, Boli 2 Deutsche Indolo Nasirindione synthetic resin (hereinafter referred to as P
Since IQ resin (referred to as IQ resin) is applied in a solution state onto a semiconductor substrate and then cured, it is advantageous for forming an insulating material with a smooth surface. Moreover, the α emitted from the mold resin of this PIQ resin cylinder package, etc.
! It has the effect of breaking down the α resistance of semiconductor devices.
- It exhibits an effective padding effect in improving the strength, e.g., the charge retention function of MOa type metals.
このＰＩＱ樹脂腰はパッジページ璽ン膜又は多層起重の
層間絶縁膜として用いられるが、下地の８ｉ０オ膜等と
の接着性を良くする目的でＡＩキレートを下地表面に回
転金布し九後ｉｌｃ酸素雰囲気中でベータを行なうこと
により薄い（１００λ程度）Ａｄ、０．膜を形成し、こ
のＡＩｔＯａ膜上にＰＩＱ樹脂樹脂筒すことがある。し
かしながらこのようなデバイスでは、Ａｊ、Ｏ１膜を形
成するのにスピンナー塗布及びベークが必要であって工
程が煩雑となり、また工程中に異物等が付着し鳥いこと
が判明しｔつしかも、接着強度にもなお改醤の余地があ
ることも確認された。This PIQ resin material is used as a padding film or an interlayer insulating film in a multi-layered structure, but after applying AI chelate to the surface of the base, rotary metal coating is applied to improve adhesion to the underlying 8i0 film, etc. By conducting beta in an ILC oxygen atmosphere, thin (about 100λ) Ad, 0. A film may be formed and a PIQ resin resin tube may be applied on the AItOa film. However, in such a device, spinner coating and baking are required to form the Aj and O1 films, making the process complicated, and it has been found that foreign matter adheres during the process, causing problems. It was also confirmed that there is still room for improvement in strength.
従って、本発明の目的は、ポリイミド系ｓａｇの接着性
を向上させると共に、その接着性に寄与する酸化アル１
＝ウム膜が簡便でかつ清浄に形成されたデバイスを提供
することＫある。Therefore, the object of the present invention is to improve the adhesiveness of polyimide SAG and to improve the adhesiveness of polyimide SAG, and to improve the adhesiveness of polyimide SAG, and to
It is an object of the present invention to provide a device in which an aluminum film is simply and cleanly formed.
この目的を達成するために、本発明和よれば、下地との
間に介在せしめられた酸化アルｉ＝ウム膜が有機アルに
クム化合物による４ｍ成長技技術ＯＶＤ）で形成される
ように構成している。In order to achieve this object, according to the present invention, the aluminum oxide film interposed between the substrate and the substrate is formed by a 4m growth technique (OVD) using a cum compound on organic aluminum. ing.
以下、本発明の実施例を図面について詳細に述べる。Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
１１Ｅ１１！ＩＱは、例えばＭＯ８１１１半導体デバイ
スにおける配線部分を示すものである。所定の半導体素
子を設けたシリコン基１［１０表面ＫＳｔＯ１膜２が熱
酸化技術で形成され、この８ｉ０．膜２上には各素子間
を電気的ＫＷ！続するためのアルｊ＝りム配線３が所定
パターンに形成されている。そして、この配線３から８
ＩＯ１膜２Ｋかけて全面にＡＪ、０゜膜４が約１０ＯＡ
の厚壜に形成されており、パッジベージ璽ン属又は層間
絶縁膜としてその上に塗布形成されえＰＩＱ樹脂膜Ｓの
接着強度を高めている。ここで注目すべぎことは、Ａｎ
、０．膜が後述するＯＶＤ技術により形成されているこ
とである。第２１！ＰｌＩは多層配線の例を示し、１層
目のアルミｘ−りム配＊３上の一部が露出するようにグ
ツズ！析出処１１ａｌＣよるＯＶＤでリンシリケートガ
ラス属（又は窒化シリコン膜）６が被着され、この層が
形成され、更にこの配線７から層間絶縁膜６ＫかけてＰ
ＩＱ樹脂ｊ［５との間には０ＶＤＫよるＡ４０ａ膜４が
介在せしめられている。11E11! IQ indicates a wiring portion in the MO8111 semiconductor device, for example. A silicon base 1 [10 surface KStO1 film 2 provided with a predetermined semiconductor element is formed by thermal oxidation technology, and this 8i0. On the film 2, an electrical KW! is applied between each element. Alj=limb wiring 3 for connection is formed in a predetermined pattern. And this wiring 3 to 8
AJ on the entire surface by applying IO1 film 2K, 0° film 4 is about 10OA
The PIQ resin film S is formed on a thick bottle and can be coated thereon as a padding material or an interlayer insulating film to increase the adhesive strength of the PIQ resin film S. What is important to note here is that An
,0. The film is formed by the OVD technique described later. 21st! PlI shows an example of multi-layer wiring, and the first layer of aluminum x-rim wiring*3 is partially exposed so that it is removed! A phosphorus silicate glass (or silicon nitride film) 6 is deposited by OVD using a deposition process 11alC, and this layer is formed.
An A40a film 4 made of 0VDK is interposed between the IQ resin j[5.
上記のＡｊｍＯｍ ｌＩ４は、既述したＡｊキレートの
塗布及びベークという工程とは根本的に異なって、第３
図に示す如き反応装置を用いてＯＶＤ技術で形成される
。即ち、反応容器８内ではす竜ブタ９上に半導体基板ｌ
がセットされ、反応容器８内を所定の反応温度まで加熱
しながら導管１ｏを通して反応ガス、キャリアガスを供
給し、廃ガスは導管１１から排出する。使用する反応ガ
スとしては、アルミニウム供給源となる有機アルミニウ
ム化合物←例えば、トリインブチルアルミニウム。The above-mentioned AjmOm lI4 is fundamentally different from the process of applying and baking the Aj chelate described above.
It is formed by OVD technology using a reactor as shown in the figure. That is, the semiconductor substrate 1 is placed on the turret 9 in the reaction vessel 8.
is set, the reaction gas and carrier gas are supplied through the conduit 1o while heating the inside of the reaction vessel 8 to a predetermined reaction temperature, and the waste gas is discharged from the conduit 11. The reaction gas used is an organoaluminum compound that serves as an aluminum supply source, such as triimbutylaluminum.
トリメチルアル１ニウム）、及び酸素等の酸化性ガスを
夫々用込、また窒素又はアルゴンをキャリアガスとして
用いる。この反応装置によって、反応ガス流量等の反応
条件をコントロールするのみで、低温下で容易ｋＡｌｔ
ｏｓ属４が所望の厚みに形成される。Oxidizing gases such as trimethylaluminum) and oxygen are used, respectively, and nitrogen or argon is used as a carrier gas. With this reactor, kAl can be easily produced at low temperatures by simply controlling the reaction conditions such as the reaction gas flow rate.
OS 4 is formed to a desired thickness.
このようなデバイスによれば、Ａｊ會Ｏｍ膜４が１工程
で容易に形成されるから、工程が非常に簡単となる。し
かも、反応容器内での反応によるために、クリーンな状
態でＡｊｍＯｍが成長せしめられており、異物の付着量
を減少させることができる。また、ＰＩＱ樹脂樹脂一般
にムｌ ”？ＡｊｗＯｓ膜に対し高−接着性を有してい
るが、８ｉＯ３膜等に対しては比験的接着力が弱いとさ
れている。しかし、本実施例のＯＶＤ技術でＡｊｍＯｍ
膜が形成される場合は、Ｐ Ｉ Ｑｌｌｌｌｒ属がＡｊ
ｍＯｍ膜によって高い装着力を示すと共Ｋ、既述したＡ
ｊキレートを用いる処理による場合に比べＰＩＱ樹脂膜
の接着強度が約２０−も向上し、信頼性が良好となるこ
とが期待される。なお、この人ｊ寓Ｏｓ膜によってＰＩ
Ｑ樹脂膜の透水性が遮断され、下層のフルｌｘりム配■
等の腐食が駐止される効果もある。According to such a device, the Aj-Om film 4 can be easily formed in one process, so the process is very simple. Furthermore, since the reaction takes place within the reaction vessel, AjmOm is grown in a clean state, and the amount of foreign matter attached can be reduced. In addition, although PIQ resin generally has high adhesion to Mul"?AjwOs films, it is said that its comparative adhesion to 8iO3 films etc. is weak. AjmOm with OVD technology
If a film is formed, P I Qllllr genus Aj
The mOm film exhibits high attachment strength, and the previously mentioned A
It is expected that the adhesive strength of the PIQ resin film will be improved by about 20 - compared to the treatment using J-chelate, and that the reliability will be improved. Incidentally, this person is PI by his membrane.
Q The water permeability of the resin membrane is blocked and the full lx rim arrangement of the lower layer is achieved.
It also has the effect of stopping corrosion such as.
また、既述したＡＩキレートを用いる処理による場合、
アル１ニウム配葱又はパッドが腐食する傾向があるが、
本実施例ではそうし九Ａツキレート処理によらないから
腐食の問題は生じない。In addition, in the case of processing using the AI chelate described above,
Al 1 onions or pads tend to corrode, but
In this example, the problem of corrosion does not occur because the 9A chelate treatment is not used.
、ＩＥＫｔた、第２図のように７２ズマ析ｍ技ｗによる
層間絶縁膜６上にＡｊｌｏ、膜４が形成されるときＫは
、このＡｊ、０．膜４もプラズマ放電に↓るＣＶＤで形
ｇ−ｇれるよ５にすれば、下地膜と人！、０．膜とを同
一の装置を用いて連続的に処理することが可能となり、
それだけ工程がより簡単になる。, IEKt, Ajlo, when the film 4 is formed on the interlayer insulating film 6 by the 72 ZMA technique as shown in FIG. If the film 4 is also formed into a shape 5 by CVD using plasma discharge, the base film and the person! ,0. It is now possible to process both membranes and membranes continuously using the same equipment.
That just makes the process easier.
なお、本実施例で使用するＰＩＱ樹脂膜５は、既述した
特電Ｉ！８４８−２９５６号明細書く開示されたもので
あって、４．４’−シアミノジフェニルエーテル−３−
カルボンア電ド及び４，４′−ジアミノジフェニルエー
テル等のジアミノ化合物と、無水ピロメリト酸及び３．
３’、 ４．４’−ベンゾフェノンテトラカルポン酸
二無水物等の駿無水物との縮合重金物からなって偽る。Note that the PIQ resin film 5 used in this example is the above-mentioned Tokuden I! No. 848-2956 discloses that 4,4'-cyamino diphenyl ether-3-
3. diamino compounds such as carbonate and 4,4'-diaminodiphenyl ether, pyromellitic anhydride and 3.
It is composed of a heavy metal compound condensed with an anhydride such as 3', 4,4'-benzophenonetetracarboxylic dianhydride.
これは、溶液状態で半導体基摩上に塗布され、必要に応
じて加熱により半硬化又は硬化状態となされる。This is applied in a solution state onto the semiconductor substrate and, if necessary, heated to a semi-cured or hardened state.
以上、本発明を例示したが、上述の実施例は本発明の技
術的思想に基いて更に変形が可能である。Although the present invention has been illustrated above, the embodiments described above can be further modified based on the technical idea of the present invention.
例えば、上述のＰＩＱ樹脂に代えて他のポリイイド系樹
脂、儒えは１分子中に多数のイミド結合（イにド＊＞を
有するデーボン社製のＲＫ−６９２゜ＰＩ−１１００等
を絶縁層として用いてよい。また、本発明は、ＭＯａ型
デバイスに限らず、バイボー−）Ｗｉにも広（適用可能
である。For example, instead of the above-mentioned PIQ resin, other polyoid resins, such as RK-692゜PI-1100 manufactured by Devon Co., Ltd., which has many imide bonds (ind *>) in one molecule, can be used as an insulating layer. Furthermore, the present invention is widely applicable not only to MOa type devices but also to bi-directional Wi.
図面は本発明の実施例を示すものであって、第１図は半
導体装置の主ｌ！部断面図、纂２図はその多層配＊ｉｉ
ａの断面図、第３図はＡｎ 、 Ｏ、の気相成長に用い
る反応装置の一例の概略断面図である。
なお、図面に示された符号にお込て、２は８１０゜膜、
３及び７はアルミニウム配線、４はＡｎ、Ｏ。
膜、５はＰＩＱ樹脂膜、６はリンシリケートガラス膜又
は窒化シリコン膜である。
第 １ 図The drawings show an embodiment of the present invention, and FIG. 1 shows the main structure of a semiconductor device. The partial sectional view and Figure 2 are the multilayer arrangement *ii
FIG. 3 is a schematic cross-sectional view of an example of a reaction apparatus used for vapor phase growth of An and O. In addition, in the symbols shown in the drawings, 2 is an 810° film,
3 and 7 are aluminum wiring, 4 is An, O. The film 5 is a PIQ resin film, and 6 is a phosphosilicate glass film or a silicon nitride film. Figure 1
Claims (1)
施されている半導体装置において、前記絶縁膜とその下
地膜との閣に、有機アル１＝ウム化合物及び酸化性ガス
を用いた化学的気相成長によって形成され九酸化アル１
＝ウム膜が介在せしめられＣ％Ａることを善徴とする半
導体装置。l. In a semiconductor device in which an insulating layer made of a polyelectrode resin is applied on a semiconductor substrate, a chemical method using an organic aluminum compound and an oxidizing gas is applied between the insulating film and its base film. Formed by chemical vapor phase epitaxy, Al9 oxide 1
= A semiconductor device in which a C%A film is interposed as a good sign.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56131490A JPS5833841A (en) | 1981-08-24 | 1981-08-24 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56131490A JPS5833841A (en) | 1981-08-24 | 1981-08-24 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5833841A true JPS5833841A (en) | 1983-02-28 |
Family
ID=15059207
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56131490A Pending JPS5833841A (en) | 1981-08-24 | 1981-08-24 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5833841A (en) |
Cited By (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100324822B1 (en) * | 1999-12-28 | 2002-02-28 | 박종섭 | A method for fabricating a gate oxide of a semiconductor device |
| KR100356473B1 (en) * | 1999-12-29 | 2002-10-18 | 주식회사 하이닉스반도체 | Method of forming a aluminum oxide thin film in a semiconductor device |
| WO2003026019A1 (en) * | 2001-09-12 | 2003-03-27 | Nec Corporation | Semiconductor device and production method therefor |
| US6660660B2 (en) | 2000-10-10 | 2003-12-09 | Asm International, Nv. | Methods for making a dielectric stack in an integrated circuit |
| US6743475B2 (en) | 2000-10-23 | 2004-06-01 | Asm International N.V. | Process for producing aluminum oxide films at low temperatures |
| US6902763B1 (en) | 1999-10-15 | 2005-06-07 | Asm International N.V. | Method for depositing nanolaminate thin films on sensitive surfaces |
| US7476420B2 (en) | 2000-10-23 | 2009-01-13 | Asm International N.V. | Process for producing metal oxide films at low temperatures |
| US7749871B2 (en) | 1999-10-15 | 2010-07-06 | Asm International N.V. | Method for depositing nanolaminate thin films on sensitive surfaces |
| US9631272B2 (en) | 2008-04-16 | 2017-04-25 | Asm America, Inc. | Atomic layer deposition of metal carbide films using aluminum hydrocarbon compounds |
| US9786491B2 (en) | 2015-11-12 | 2017-10-10 | Asm Ip Holding B.V. | Formation of SiOCN thin films |
| US9786492B2 (en) | 2015-11-12 | 2017-10-10 | Asm Ip Holding B.V. | Formation of SiOCN thin films |
| US9831094B2 (en) | 2005-10-27 | 2017-11-28 | Asm International N.V. | Enhanced thin film deposition |
| US9941425B2 (en) | 2015-10-16 | 2018-04-10 | Asm Ip Holdings B.V. | Photoactive devices and materials |
| US10002936B2 (en) | 2014-10-23 | 2018-06-19 | Asm Ip Holding B.V. | Titanium aluminum and tantalum aluminum thin films |
| US10074541B2 (en) | 2013-03-13 | 2018-09-11 | Asm Ip Holding B.V. | Deposition of smooth metal nitride films |
| US10504901B2 (en) | 2017-04-26 | 2019-12-10 | Asm Ip Holding B.V. | Substrate processing method and device manufactured using the same |
| US10600637B2 (en) | 2016-05-06 | 2020-03-24 | Asm Ip Holding B.V. | Formation of SiOC thin films |
| US10643925B2 (en) | 2014-04-17 | 2020-05-05 | Asm Ip Holding B.V. | Fluorine-containing conductive films |
| US10847529B2 (en) | 2017-04-13 | 2020-11-24 | Asm Ip Holding B.V. | Substrate processing method and device manufactured by the same |
| US10991573B2 (en) | 2017-12-04 | 2021-04-27 | Asm Ip Holding B.V. | Uniform deposition of SiOC on dielectric and metal surfaces |
| US11158500B2 (en) | 2017-05-05 | 2021-10-26 | Asm Ip Holding B.V. | Plasma enhanced deposition processes for controlled formation of oxygen containing thin films |
-
1981
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