JPS5833719Y2 - semiconductor equipment - Google Patents

semiconductor equipment

Info

Publication number
JPS5833719Y2
JPS5833719Y2 JP4849278U JP4849278U JPS5833719Y2 JP S5833719 Y2 JPS5833719 Y2 JP S5833719Y2 JP 4849278 U JP4849278 U JP 4849278U JP 4849278 U JP4849278 U JP 4849278U JP S5833719 Y2 JPS5833719 Y2 JP S5833719Y2
Authority
JP
Japan
Prior art keywords
series
lead wire
insulating
substrate
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP4849278U
Other languages
Japanese (ja)
Other versions
JPS54150869U (en
Inventor
充由 海老塚
Original Assignee
オリジン電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by オリジン電気株式会社 filed Critical オリジン電気株式会社
Priority to JP4849278U priority Critical patent/JPS5833719Y2/en
Publication of JPS54150869U publication Critical patent/JPS54150869U/ja
Application granted granted Critical
Publication of JPS5833719Y2 publication Critical patent/JPS5833719Y2/en
Expired legal-status Critical Current

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  • Rectifiers (AREA)

Description

【考案の詳細な説明】 この考案は基板に複数のダイオードを取付けてなる半導
体装置の改良に係り、特に積み重ねるのに好適な基板に
関する。
DETAILED DESCRIPTION OF THE INVENTION This invention relates to an improvement of a semiconductor device having a plurality of diodes attached to a substrate, and particularly to a substrate suitable for stacking.

最終的或いは中間的なモールド処理がなされたダイオー
ド同士を多数個直列接続する場合、一般には第1図で示
す様に、ベーク板などからなる環状の絶縁性基板1の一
面側にダイオード2とコンデンサ3とを並列接続したも
のを順次固定すると共に基板1の他面側において接続導
線4を用いて上記側々の並列接続体を直列に接続して単
一の半導体装置を構成している。
When connecting a large number of diodes in series after final or intermediate molding, generally the diode 2 and the capacitor are placed on one side of an annular insulating substrate 1 made of a baking plate, etc., as shown in Figure 1. 3 connected in parallel are sequentially fixed, and the parallel connected bodies on the two sides are connected in series using a connecting wire 4 on the other side of the substrate 1 to form a single semiconductor device.

そして更に多数個のダイオードを直列接続したい場合に
は、これr、半導体装置を必要個数だけ積み重ねて直列
接続することが行われている。
When it is desired to connect a larger number of diodes in series, the required number of semiconductor devices is stacked and connected in series.

しかし斯かる従来の半導体装置にあっては、基板と基板
との間隔を一定にす2、ことが出来ないので゛絶縁用ス
ペーサ8を用いね5、f゛ならないが、この様な環状の
基板1にあっては該基板上にすで゛に固定されているダ
イオード2とコンデンサ3の配設位置どの関係において
絶縁用只ペーサの好ましい取付けが難しいという欠点も
ある。
However, in such conventional semiconductor devices, it is not possible to maintain a constant distance between the substrates, so an insulating spacer 8 must be used. 1 has the disadvantage that it is difficult to install the insulating spacer in a suitable manner depending on the positional relationship between the diode 2 and the capacitor 3, which are already fixed on the substrate.

更にまノコ絶縁用スリット5の両側に向かい合ってハト
メの様な入出力端子6,7が設けられているだけなので
、その上部、下部に配置された半導体装置との接続関係
が複雑になり、作業性が極めて低下するという欠点があ
った。
Furthermore, since input/output terminals 6 and 7 like eyelets are only provided on opposite sides of the mango insulation slit 5, the connection relationship with the semiconductor devices placed above and below is complicated, making the work difficult. The disadvantage was that the performance was extremely poor.

本考案は上述した様な従来の半導体装置の欠点を除去し
得る半導体装置である。
The present invention is a semiconductor device that can eliminate the drawbacks of conventional semiconductor devices as described above.

以下に第3図乃至第5図によって本考案の一実施例を説
明する。
An embodiment of the present invention will be described below with reference to FIGS. 3 to 5.

ベーク板1などの絶縁材料からなる基板1は、その中央
部に形成された円形の窓部10に沿って円筒状の起立部
11を備えており、この起立部11はその上部に同様な
構成の他の基板の起立部と嵌合し得る嵌入可能部11
aを備えている。
A substrate 1 made of an insulating material such as a baking board 1 is provided with a cylindrical upright portion 11 along a circular window portion 10 formed in its center, and this upright portion 11 has a similar configuration on its upper portion. A fittable part 11 that can be fitted with an upright part of another board.
It is equipped with a.

この嵌入可能部11 aの外径dはその反対側に設けら
れた嵌合凹所11 bの内径d′は同程度若しくは若干
だけ小さい。
The outer diameter d of the fittable portion 11a is approximately the same as or slightly smaller than the inner diameter d' of the fitting recess 11b provided on the opposite side.

更に基板1は、その周辺から窓部10まで延びる入出力
端子間絶縁用スリット12と該スリット12を挾んで向
かい合うように設けられた人、出力リード線用の挿通孔
13と突起14とを備えている。
Further, the substrate 1 includes a slit 12 for insulation between input and output terminals extending from the periphery to the window 10, an insertion hole 13 for an output lead wire, and a protrusion 14, which are provided to face each other across the slit 12. ing.

従って斯かる基板1を用いれば、起立部11を中心にこ
れを囲むように、ダイオード2或いはダイオード2とコ
ンデンサ3又は必要に応じて他の電子部品を並列接続し
たものを順次直列接続すると同時に基板1に固定し、こ
れらの最外側のノード線11,12の内、リード線11
を挿通孔13を挿通させて基板1の他面側に導出し、リ
ード線12を突起14に巻きつけるなどして固定するこ
とによって複数のダイオードを直列接続した単一の半導
体装置が得られ、更に積み重ねられるべき半導体装置の
隣接するもの同士の嵌入可能部11aと嵌合可能部11
bとを嵌合させながら基板1を必要個数だけ積み重ね
、挿通孔13を介して導出されたリード線11を突起1
4に巻きつけるなどした後リード線11と12とを半田
付けすることによって、高電圧整流装置を得ることが出
来る。
Therefore, if such a board 1 is used, the diode 2 or the diode 2 and the capacitor 3, or other electronic components connected in parallel as required, can be successively connected in series around the standing portion 11, and at the same time the board can be connected simultaneously. 1, and among these outermost node wires 11 and 12, the lead wire 11
A single semiconductor device in which a plurality of diodes are connected in series can be obtained by inserting the lead wire 12 through the insertion hole 13 and leading it out to the other side of the substrate 1, and fixing it by winding the lead wire 12 around the protrusion 14. Fittable portions 11a and fittable portions 11 of adjacent semiconductor devices to be further stacked
Stack the required number of substrates 1 while fitting them together, and connect the lead wires 11 led out through the insertion holes 13 to the projections 1.
4 and then soldering the lead wires 11 and 12, a high voltage rectifier can be obtained.

つまり本考案では起立部11が基板と基板との間の間隔
を所定寸法に保持するスペーサとしての役割を果すと共
に、隣接する基板と基板とを機械的に結合する役割をも
果しているので、斯かる半導体装置を積み重ねて高電圧
整流装置を製作する場合、ス及−サは勿論のこと基板間
を互いに機械的に結合する部材も不要であり、しかも人
、出力端子となるべき個所にリード線挿通孔と突起とを
備えてこれらに人、出力リード線を支持させているので
、これらリード線の処理が極めて簡単であり、且つ隣り
の半導体装置との接続作業が極めて容易になるなどその
実用上の効果は極めて大きい。
In other words, in the present invention, the upright portion 11 serves as a spacer that maintains a predetermined distance between the substrates, and also serves to mechanically connect adjacent substrates. When manufacturing a high-voltage rectifier by stacking such semiconductor devices, there is no need for spacers or members to mechanically connect the boards to each other, and in addition, there is no need for lead wires at the locations that should become output terminals. Since the insertion holes and protrusions are provided to support the output lead wires, the handling of these lead wires is extremely simple, and the connection work with adjacent semiconductor devices is extremely easy. The above effect is extremely large.

尚、第3図において鎖線で示した様に起立部11に所定
の間隔でスリットを設ければ、その放射方向に対し弾性
力が生ずるので起立部の精度が悪くてもその弾性力を利
用して隣接する基板同士を嵌合すれば良好な機械的結合
が得られ、またダイオードの端子間における基板1の沿
面を増大させるために第4図において鎖線で示すような
スリツI・を設けることも可能であり、挿通孔13はス
リット12又は基板1の周辺部に通ずる挿通孔であって
も勿論良い。
Furthermore, if slits are provided at predetermined intervals in the upright portion 11 as shown by the chain lines in FIG. 3, elastic force will be generated in the radial direction of the slits, so even if the accuracy of the upright portion is poor, the elastic force can be utilized. A good mechanical bond can be obtained by fitting adjacent substrates together, and it is also possible to provide a slit I as shown by the chain line in FIG. 4 in order to increase the creepage of the substrate 1 between the terminals of the diode. Of course, the insertion hole 13 may be an insertion hole communicating with the slit 12 or the peripheral portion of the substrate 1.

更にまた突起14は基板1と同材料で一体的に形成して
もいいが、金属製のものでも良く、形状は単なる棒状、
逆り字状或いはリード線を挟持するような形状など種々
考えられるであろフ。
Furthermore, the protrusion 14 may be formed integrally with the substrate 1 from the same material, but it may also be made of metal, and the shape may be a simple rod-like shape.
Various shapes can be considered, such as an inverted shape or a shape that holds the lead wire.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の半導体装置を示す図であって、そのAは
上面図、Bは側面図、Cは底面図を示し、第2図は斯か
る半導体装置を積み重ねて直列接続した高電圧整流装置
を示す図、第3図は本考案の半導体装置に用いる基板を
示す図であって、そのAは平面図、Bは側面図を示し、
第4図は本考案に係る半導体装置の一実施例を示す図、
第5図は第4図に示した半導体装置を複数個積み重ねて
直列接続した高電圧整流装置の一実施例を示す図である
。 1−絶縁性基板、2−ダイオード、11−起立部、11
a−嵌入可能部、12−絶縁用スリット、13−リード
線挿通孔、14−突起。
FIG. 1 is a diagram showing a conventional semiconductor device, in which A is a top view, B is a side view, and C is a bottom view, and FIG. 2 is a high voltage rectifier in which such semiconductor devices are stacked and connected in series. FIG. 3 is a diagram showing a substrate used in the semiconductor device of the present invention, in which A shows a plan view, B shows a side view,
FIG. 4 is a diagram showing an embodiment of a semiconductor device according to the present invention;
FIG. 5 is a diagram showing an embodiment of a high voltage rectifier device in which a plurality of semiconductor devices shown in FIG. 4 are stacked and connected in series. 1-insulating substrate, 2-diode, 11-standing portion, 11
a-fittable part, 12-insulating slit, 13-lead wire insertion hole, 14-protrusion.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数の直列接続されたダイオードが少なくとも配設され
た絶縁性基板を複数積み重ねて互いに直列接続してなる
半導体装置において、上記絶縁性基板はそのほぼ中央に
設けられた所定の高さを有する起立部と、その周辺部か
ら中央部方向に向かって延びる1つ以上の絶縁用スリッ
トと、該絶縁用スリットを挾んで夫々設けられたリード
線挿通孔とリード線支持用突起とを備え、斯かる絶縁性
基板を上記起立部を介して複数個積み重ね、各絶縁性基
板における上記起立部の周りに配設された上記直列接続
されたダイオードを上記リード線挿通孔及びリード線支
持用突起を介して互いに直列接続したことを特徴とする
半導体装置。
In a semiconductor device in which a plurality of insulating substrates each having at least a plurality of series-connected diodes arranged thereon are stacked and connected to each other in series, the insulating substrate has an upright portion having a predetermined height provided approximately at the center thereof. and one or more insulating slits extending from the periphery toward the center, and a lead wire insertion hole and a lead wire supporting protrusion provided respectively between the insulating slits, A plurality of insulating substrates are stacked together with the standing portion interposed therebetween, and the series-connected diodes arranged around the standing portion of each insulating substrate are connected to each other through the lead wire insertion hole and the lead wire support protrusion. A semiconductor device characterized by being connected in series.
JP4849278U 1978-04-13 1978-04-13 semiconductor equipment Expired JPS5833719Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4849278U JPS5833719Y2 (en) 1978-04-13 1978-04-13 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4849278U JPS5833719Y2 (en) 1978-04-13 1978-04-13 semiconductor equipment

Publications (2)

Publication Number Publication Date
JPS54150869U JPS54150869U (en) 1979-10-20
JPS5833719Y2 true JPS5833719Y2 (en) 1983-07-28

Family

ID=28932307

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4849278U Expired JPS5833719Y2 (en) 1978-04-13 1978-04-13 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS5833719Y2 (en)

Also Published As

Publication number Publication date
JPS54150869U (en) 1979-10-20

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