JPS583251B2 - Communication control method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a communication control method for controlling data transfer in units of characters between a line adapter section and a line control section.

In data transmission, characters (binary codes consisting of multiple bits) are transmitted between various devices such as data terminal equipment and data processing equipment via data transfer lines using transmission control unit characters with specific character codes. Since data transmission is controlled in units, it is necessary to recognize the characters being transmitted and perform processing corresponding to the characters.

The line control means in the conventional communication control system checks and processes all the transmitted characters, which results in a large amount of character processing, which has a negative impact on other line processing, etc. There is.

SUMMARY OF THE INVENTION An object of the present invention is to provide a communication control system that reduces the amount of processing performed by line control means.

The system of the present invention provides a communication between a line adapter section having a character buffer for storing a single character and a line control section having a character register for storing a single character and a block buffer for storing a plurality of characters. A communication control method for controlling data transfer in units of characters, comprising: a first transfer means for transferring data between the character register and the character buffer; and a first transfer means for transferring data between the character buffer and the block buffer. a second transfer means for performing the transfer; a selection means provided in the line control unit for selecting whether the data transfer in units of characters is to be performed by the first transfer means or the second transfer means; a comparison means provided in the line adapter section for comparing a received character given from the outside via the line or a transmission character sent to the line control section with a predetermined character, and when a match is found by the comparison means; The line adapter unit notifies the line control unit and the first transfer unit selects the second transfer unit for the next transfer target, the transmission character or the reception character, until the selection unit is given a new selection instruction for the second transfer unit. and means for causing the transfer means to perform the transfer.

In the present invention, since the number of characters that require special character processing is extremely small, including the transmission control character, the same processing can be performed on many other characters.

Next, the present invention will be explained in detail with reference to the drawings.

The following embodiments will be explained assuming a semi-binary communication control method in which data transmission and reception is performed by one drive/reception circuit.
The present invention is not limited to this, but is also applicable to full-duplex communication control systems and the like.

The figure shows an embodiment of the present invention.

The system of the present invention shown in the figure is composed of a line control section 1 and a line adapter section 2.

The line control unit 1 includes a line control circuit 3 and an address switching circuit 4.
, and a memory 5 including a block buffer.The line adapter section 2 includes a line adapter control circuit 6, a first transfer mode control circuit 7, a second transfer mode control circuit 8, and a character comparison circuit 9. , character buffer 10, character disassembly and assembly circuit 11, arithmetic control circuit 12
and an arithmetic circuit 13.

For convenience of explanation, transmitting/receiving circuits for synchronizing signals and the like are omitted.

Similarly, regarding the signal lines 51 to 68 that connect the respective circuits, only the connection state is shown for those that are made up of a plurality of signal lines, and those that are made up of a single signal line are also included.

The signal line 68 is connected to a data transmission line (not shown), and characters are transmitted.

From the line control unit 1 to the line adapter unit 2 via the signal line 54
Then, instructions such as transmission or reception, transfer mode, calculation, etc. are given, and the status of the line adapter section 2 is reported to the line control section 1.

Further, the signal line 56 adopts a bidirectional bus format.

Data or characters can be transferred between the line control circuit 3 and the memory 5 by providing a request and an address from the line control circuit 3 to the address switching circuit 4 via the signal line 51.

Further, between the character buffer 10 and the memory 5, characters can be transferred by providing a request and a block buffer address to the address switching circuit 4 from the second transfer mode control circuit 8 via the signal line 52. It is.

Which of these operations is performed is controlled by the address switching circuit 4.

Further, between the line control circuit 3 and the character buffer 10, when a character request is given from the first transfer mode control circuit 7 to the line control circuit 3 via the signal line 55, a character request is sent via the signal line 56. In this case, characters are not transferred from line control circuit 3 to memory 5 at the same time, but are transferred between a character register included in line control circuit 3 and character buffer 10.

The case of transmission will be explained.

Based on the instructions from the line control circuit 3, the block to be transmitted is created as a block buffer in the memory 5, and transmitted to the line adapter control circuit 6 via the signal line 54.
The transfer mode, the character to be detected, the start address of the block buffer, and the block length are notified.

When the line adapter control circuit 6 receives these instructions, the line adapter section 2 is initialized.

That is, the start address and block length of the block buffer are sent to the second transfer mode control circuit 8, and the first transfer mode control circuit 7 or the second transfer mode control circuit 8 is activated according to the selected transfer mode. In addition, the arithmetic control circuit 12 receives the initial setting horizontal parity of the arithmetic circuit or the type of block check sequence and the arithmetic instruction, if any, and the character comparison circuit receives the character to be detected, and the line adapter unit 2 receives the arithmetic instruction. Each mode is set.

When the second transfer mode is specified, the second transfer mode control circuit 8 becomes active, the address of the block buffer is given to the address switching circuit 4, and the characters are transferred from the memory 5 to the character buffer 10. The address and block length of the read and held block buffer are updated.

The characters read out to the character buffer 10 are sent to the character comparison circuit 9 via the signal line 60 and compared with the specified detected character code, and the match or mismatch is notified to the line adapter control circuit 6 via the signal line 65. .

If there is a mismatch, the line adapter control circuit 6 to signal line 5
A pre-specified calculation instruction is given as is to the calculation control circuit 12 via the calculation control circuit 12, and the calculation circuit 13 is driven by the instruction from the calculation control circuit 12. When these series of operations are completed, the second transfer mode control is started. In response to an instruction from the circuit 8, a new character transfer operation from the block buffer is started.

If a match is detected, the line adapter control circuit 6 reports the matched character code to the line control circuit 3, and from then on, a new calculation instruction is issued for each character until a new second transfer mode instruction is received. A request is made, and an instruction is given to the arithmetic control circuit 12 after waiting for the response.

At this time, the operation of the second transfer mode control circuit 8 is suspended, the first transfer mode control circuit 7 is activated, and a request for the next character is made via the signal line 55. Characters are transferred from the character register to the character buffer 10, and subsequent character transfers are performed under the control of the first transfer mode control circuit 7.

However, if there is a new instruction for the second transfer mode from the line control circuit 3, the first transfer mode control circuit 7 is disabled and the second transfer mode control circuit 8 is activated from the suspended state. The operation starts again.

In parallel with these series of operations, the characters given to the character puffer 10 are sequentially transferred to the character disassembly and assembly circuit 1.
2, and is sent bit by bit to a data transmission line (not shown) via a signal line 68.

Regarding the detected character codes, transmission control characters SOH, STX, ETX, EOT, ENQ, ACK, D
Ten types of LE, NAK, SYN, and ETB and any one code that can be specified from the line control circuit 3 are possible, and it is also possible from the line control circuit 3 to specify whether or not to detect each code individually. It is.

Further, when a specified character is detected, it is reported to the line control circuit 3 together with the character code regardless of the first transfer mode or the second transfer mode.

The sending of the final character of the block is instructed by the line adapter control circuit 6 when a designated character is detected or the block length is exhausted, etc. A calculation result transmission instruction is issued to the calculation control circuit 12, and the calculation result (horizontal parity or block check sequence) is sent from the calculation circuit 13 to the character disassembly and assembly circuit 11, and then sent to the line.

The above is the operation related to transmission.

The operation related to reception will be explained.

An area for a block to be received is reserved in advance as a block buffer in the memory 5 according to an instruction from the line control circuit 3, and instructions similar to those for reception and other transmission are given to the line adapter control circuit 6.

Further, the initial settings of the line adapter section 2 of the line adapter control circuit 60 are the same as those for transmission, except that the line adapter section 2 is set to the reception mode.

Regarding the subsequent operation, when characters are given bit by bit via the line, assembled into characters by the character disassembly and assembly circuit 11, and sent to the character buffer 10, the line adapter section for the characters in the character buffer 10 Due to control, character transfer with line control unit 1 is reversed (line adapter unit 2→line control circuit 1)
) is the same as in the case of transmission.

In other words, the characters stored in the character buffer 10 are sent to the character comparison circuit 9 for comparison, and if they do not match the specified characters, the line adapter control circuit 6 does not change the transfer mode, and the arithmetic control circuit 12 does not change the transfer mode. If the instruction is the second transfer mode, the same instruction as before is given, and if it is the first transfer mode, the same instruction as given by the line control circuit 3 is given for each character, and a match with the specified character is detected. If so, it is reported to the line control circuit 3 in the same way as in the case of transmission, and the same operations as described in the case of transmission are performed regarding the transfer mode and calculation instructions.

These operations are performed every time a character is transferred to the character buffer 10.

Regarding the arbitrary code, the method of specifying the detected character, and the reporting of the detection of the specified character to the line control circuit 3, the same operations as in the case of transmission are performed.

In addition, the final character reception is given by an instruction from the line control circuit 3 in the same way as in the case of transmission, and the calculation result is not sent to the line, but whether or not the calculation result is normal is determined from the calculation circuit 13 to the line adapter circuit. 6, and further to the line control circuit 3, completing one reception operation.

In the above operation description, full-duplex communication can be controlled if the line adapter unit 2 is provided with a transmission mode circuit and a reception mode circuit independently.

The original purpose of the line control circuit 3 is not only line control;
For example, if it is a terminal device, you can control the keyboard or printer,
If it is a communication control device, it will involve controlling other line adapter units.

According to this embodiment, when used in the second transfer mode, the line control circuit 3 becomes unrelated to the control of that mode;
Accordingly, the line control circuit 3 can perform other processing or can lower its performance.

The rate at which the second transfer mode 2 can be used in the transmission and reception of information messages in general basic data transmission control procedures, in other words, special character processing (for example, procedural control, horizontal parity or block check sequence calculations) The ratio of general characters that do not require special character processing to transmission control characters that require processing is quite high.

To add more information about the operation, the character register in the line control circuit 3 is used when it is desired to eliminate the interrupt transmission of a response sequence or the transfer of a received character to a block buffer (for example, a response sequence in received data). It is possible and very effective.

The present invention entrusts control to the processing unit only for characters that require special processing, and allows characters to be sent and received without the control of the processing unit for many other characters, reducing the burden on the line control unit. It has the effect of reducing

[Brief explanation of drawings]

The figure shows an embodiment of the present invention. In the figure, 1... line control unit, 2...
・Line adapter section, 3...Line control circuit, 4.
...address switching circuit, 5...memory,
6... Line adapter control circuit, 7...
Transfer mode 1 control circuit, 8... Transfer mode 2 control circuit, 9... Character comparison circuit, 10...
...Character buffer, 11...Character disassembly and assembly circuit, 12...Arithmetic control circuit, 1
3... Performance line, 51-68... Signal line.

Claims (1)

[Claims] 1. Data transfer in character units between a line adapter section that has a character buffer that stores a single character and a line control section that has a character register that stores a single character and a block buffer that stores multiple characters. In the communication control method that controls
a first transfer means for transferring data between the character register and the character buffer; a second transfer means for transferring data between the character buffer and the block buffer; a selection means provided in the line adapter section for selecting whether data transfer in units of characters is to be performed by the first transfer means or second transfer means; and a selection means provided in the line adapter section for receiving information provided from the outside via a line. a comparison means for comparing a character or a transmission character sent to the line with a predetermined character; and when a match is found by the comparison means, the line adapter section issues a notification to the line control section and the next transfer target. control means for causing the first transfer means to perform transfer until a new selection instruction of the second transfer means is given to the selection means for the transmitted character or the received character. Characteristic communication control method.