JPS5828433U - DPCM analog to digital converter - Google Patents

DPCM analog to digital converter

Info

Publication number
JPS5828433U
JPS5828433U JP12226481U JP12226481U JPS5828433U JP S5828433 U JPS5828433 U JP S5828433U JP 12226481 U JP12226481 U JP 12226481U JP 12226481 U JP12226481 U JP 12226481U JP S5828433 U JPS5828433 U JP S5828433U
Authority
JP
Japan
Prior art keywords
analog
output
digital
adder
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12226481U
Other languages
Japanese (ja)
Inventor
中村 「のぼる」
Original Assignee
日立電子株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日立電子株式会社 filed Critical 日立電子株式会社
Priority to JP12226481U priority Critical patent/JPS5828433U/en
Publication of JPS5828433U publication Critical patent/JPS5828433U/en
Pending legal-status Critical Current

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  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図は本考案によるDPCM方式のアナログ・ディジタル
変換器の一実施例を示す要部のブロック図である。 1・・・・・・アナログ加算器、2・・曲比較形量子化
回路、3・・・・・・ラッチ回路、4・・・・・・符号
化回路、5・・・・・・ディジタル加算器、6・・・・
・・D−A変換器、7・・・・・・レジスタ、8・・・
・・・ラッチ回路。
The figure is a block diagram of essential parts showing an embodiment of a DPCM type analog-to-digital converter according to the present invention. 1... Analog adder, 2... Song comparison type quantization circuit, 3... Latch circuit, 4... Encoding circuit, 5... Digital Adder, 6...
...D-A converter, 7...Register, 8...
...Latch circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 現在のアナログ入力信号とその以前のアナログ信号との
差信号を出力するアナログ加算器と、前記アナログ加算
器から出力される差信号をアナログ・ディジタル変換す
る量子化回路と、前記量子化回路のディジタル出力を保
持するラッチ回路と、前記ラッチ回路のラッチ出力を符
号化する符号化する符号化回路と、前記符号化回路の符
号化出力とその以前のデータとを加算するディジタル加
算器と、前記ディジタル加算器の加算出力をディジタル
・アナログ変換してそのアナログ信号を前記゛アナログ
加算器の一方の入力信号と17で出力するD−A変換器
と、前記ディジタル加算器の加算出力を記憶するレジス
タと、前記符号化回路の符号化出力を保持するラッチ回
路とからなり、前記レジスタに記憶された加算出力をデ
ジタル出力信号として取出すとともに、前記ラッチ回路
に保持された符号化出力をディジタル微分出力信号とし
て取出すようにしたことを特徴とするDPCM方式のア
ナログ・ディジタル変換器。
an analog adder that outputs a difference signal between the current analog input signal and the previous analog signal; a quantization circuit that converts the difference signal output from the analog adder into an analog-to-digital converter; and a digital converter of the quantization circuit. a latch circuit that holds an output, an encoding circuit that encodes the latch output of the latch circuit, a digital adder that adds the encoded output of the encoding circuit and previous data; a D-A converter that converts the addition output of the adder into digital-to-analog and outputs the analog signal as one input signal of the analog adder; and a register that stores the addition output of the digital adder. , a latch circuit that holds the encoded output of the encoding circuit, extracts the addition output stored in the register as a digital output signal, and outputs the encoded output held in the latch circuit as a digital differential output signal. A DPCM type analog-to-digital converter characterized in that it can be taken out.
JP12226481U 1981-08-17 1981-08-17 DPCM analog to digital converter Pending JPS5828433U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12226481U JPS5828433U (en) 1981-08-17 1981-08-17 DPCM analog to digital converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12226481U JPS5828433U (en) 1981-08-17 1981-08-17 DPCM analog to digital converter

Publications (1)

Publication Number Publication Date
JPS5828433U true JPS5828433U (en) 1983-02-24

Family

ID=29916188

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12226481U Pending JPS5828433U (en) 1981-08-17 1981-08-17 DPCM analog to digital converter

Country Status (1)

Country Link
JP (1) JPS5828433U (en)

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