JPS5827455A - Failure countermeasure system for button telephone set - Google Patents

Failure countermeasure system for button telephone set

Info

Publication number
JPS5827455A
JPS5827455A JP56125356A JP12535681A JPS5827455A JP S5827455 A JPS5827455 A JP S5827455A JP 56125356 A JP56125356 A JP 56125356A JP 12535681 A JP12535681 A JP 12535681A JP S5827455 A JPS5827455 A JP S5827455A
Authority
JP
Japan
Prior art keywords
signal
transmission
reception
photocoupler
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56125356A
Other languages
Japanese (ja)
Inventor
Ryuzo Sugiura
杉浦 隆三
Masateru Kuroda
黒田 政輝
Masaru Kasuya
加須屋 勝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tamura Electric Works Ltd
Original Assignee
Tamura Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tamura Electric Works Ltd filed Critical Tamura Electric Works Ltd
Priority to JP56125356A priority Critical patent/JPS5827455A/en
Publication of JPS5827455A publication Critical patent/JPS5827455A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M1/00Substation equipment, e.g. for use by subscribers
    • H04M1/71Substation extension arrangements

Abstract

PURPOSE:To normally keep operation between a master device and other slave devices, by detecting a failure of transmission/reception function of a slave device of by the master device itself, and disconnecting a transmitter/receiver from a control line. CONSTITUTION:A control signal TxD from a master device is transmitted to a slave device designated with polling via a transmission section as a pulse signal. During the transmission, a reception section is stopped for the reception with an inhibition signal RTS but can receive a signal from the slave device with a photocoupler PC1 through the inversion of the signal RTS. The transmission/ reception circuit of the slave device makes signal transmission/reception to/ from the master device with photocouplers PC13 and PC14. A slave processor monitors an output signal IRQ of a photocoupler PC12 for transmission monitor and if a failure is detected in the said signal, it is discriminated as the failure of transmission/reception function. A signal EM is inverted and a transistor Q11 is turned off via the photocoupler PC11 to disconnect the transmission reception circuit from the control line.

Description

【発明の詳細な説明】 本発明は、信号線によシ主装置と子機との間における制
御信号の送受信を行なうボタン電話装置において、子機
側の送受信機能に障害を生じたと会の障害対策方式に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a button telephone device that transmits and receives control signals between a main unit and a slave unit via a signal line, and is capable of detecting failures caused by failures in the transmitting and receiving functions of the slave unit. This concerns the countermeasure method.

近来、ボタン電話装置においては、主装置と各子機との
閏を接続する多芯ケーブルの芯線数を節減するため、共
通の信号線によ多制御信号の送受信を行なうものとなっ
ているが、若し、いずれかの子機において制御信号の送
受信機能に障害を生ずれば、子機側が制御信号の送信状
態となったまま保持され、あるいは、信号線に対する短
絡状態等によシ、共通の信号線による正常な子機と主装
置との間の制御信号送受信が不能となり、全システムと
しての機能が失なわれる欠点を有するものであった。
Recently, in key telephone devices, multiple control signals are sent and received through a common signal line in order to reduce the number of core wires in the multicore cable that connects the main device and each slave device. , If a failure occurs in the control signal transmission/reception function of any handset, the handset will remain in the control signal transmission state, or the common signal may be interrupted due to a short circuit to the signal line, etc. This has the drawback that normal transmission and reception of control signals between the slave unit and the main unit via wire becomes impossible, and the function of the entire system is lost.

本発明は、従来のかかる欠点を根本的に解決する目的を
有し、子機側の送受信機能に障害を生じた際、これを自
からが検出し、信号線へ接続された送受信回路の動作を
禁止するものとした極めて効果的なボタン−話装置の障
害対策方式を提供するものである。
The purpose of the present invention is to fundamentally solve such drawbacks of the conventional technology, and when a failure occurs in the transmitting/receiving function of the handset side, the present invention detects this from itself and operates the transmitting/receiving circuit connected to the signal line. The present invention provides an extremely effective fault-proofing method for button-to-talk devices that prohibits the use of button-to-talk devices.

以下、実施例を示す要部回路図によシ本発明の詳細な説
明する。
Hereinafter, the present invention will be explained in detail with reference to main circuit diagrams showing embodiments.

同図において、主装置に8Uと子機8Tとは1対の信号
118Ll、SLmによシ接続され、これを介して相互
間の制御信号送受信を行なうものとなっておシ、仁の例
では、主装置に8Uifの電源+12Vから供給される
直流電流の断続によるコード化パルス信号が制御信号と
して用いられている。
In the figure, the main unit 8U and the slave unit 8T are connected by a pair of signals 118Ll and SLm, through which control signals are transmitted and received between them. A coded pulse signal generated by intermittent DC current supplied to the main device from the 8Uif power supply +12V is used as a control signal.

また、子機8Tは、複数台が信号線8Lt、8Lsに対
し並列に接続され、主装置に8Uからのポーリング信号
によシ指定された子機8Tが、順次に所定の信号を送信
する時分割伝送方式が採用されてお夛、主装置に8Uお
よび各子機8Tには、マイクロプロセッサ等のプロセッ
サCPUm、CPU5が設けられ、これらの制御に応じ
て制御信号の送受信が行なわれるものとなっている。
In addition, when a plurality of slave units 8T are connected in parallel to the signal lines 8Lt and 8Ls, and the slave units 8T designated by the polling signal from 8U to the main unit sequentially transmit predetermined signals, A split transmission method was adopted, and the main unit 8U and each slave unit 8T were equipped with microprocessors such as CPUm and CPU5, and control signals were sent and received according to their control. ing.

主装置に8Uの送償部TXは、抵抗器R1,ダイオード
Dl、DsおよびトランジスタQ1による定電流回路と
、抵抗器R1−R4およびトランジスタQsからなる駆
動回路とによp構成され、プロセッサCPUmが送信デ
ータTxDをパルス状に生ずると、トランジスタQ2の
オン・オフに応じてトランジスタQlもオン・オフを行
ない、一定電流値となった波高値12Vを有するパルス
状の送信々号が信号線8Llへ送出される。
The transmission section TX of 8U as the main device is composed of a constant current circuit consisting of a resistor R1, diodes Dl, Ds and a transistor Q1, and a drive circuit consisting of resistors R1-R4 and a transistor Qs, and a processor CPUm. When the transmission data TxD is generated in the form of a pulse, the transistor Ql is also turned on and off in accordance with the on/off of the transistor Q2, and a pulsed transmission signal having a peak value of 12V, which is a constant current value, is sent to the signal line 8Ll. Sent out.

一方、受信部BXは、抵抗器Re、Re、トランジスタ
Q8および定電圧ダイオードZDIによる電圧安定化回
路と、抵抗器R9、ダイオードDs。
On the other hand, the receiving section BX includes a voltage stabilizing circuit including resistors Re, Re, a transistor Q8, and a constant voltage diode ZDI, a resistor R9, and a diode Ds.

D4およびトランジスタQ4からなる定電流回路と、抵
抗器R8〜′fLlOおよびトランジスタQsによる駆
動回路と、フォトカプラPCI、逆流阻止用のダイオー
ドD5および抵抗器R11、R11lからなる受信回路
とによシ構成されておシ、電圧安定化回路によ、り+5
Vとなった一定電流値の電流を子機ST@の信号@8L
l、BLm間断続に応じて供給すゐが、送信データTx
Dの生じている間は、禁止信号RT8によシトランジス
タQsがオフとなシ、トランジスタQ4をオフとしてい
るため、受信部RXが動作しないものとなっている。
Consisting of a constant current circuit consisting of D4 and transistor Q4, a drive circuit consisting of resistors R8 to 'fLlO and transistor Qs, and a receiving circuit consisting of photocoupler PCI, diode D5 for blocking reverse current, and resistors R11 and R11l. However, due to the voltage stabilization circuit, the voltage is increased by +5
The current with a constant current value of V is the signal @8L of slave unit ST@
The transmission data Tx is supplied depending on the
While D is occurring, the inhibit signal RT8 turns off the transistor Qs and turns off the transistor Q4, so the receiving section RX does not operate.

これlこ対し、子機STでは、トランジスタQll〜Q
14、抵抗器Ra1〜Ray、フォトカプラPC11〜
201番、ダイオードDll 、 Dlmおよび5■よ
シ高く12vよシ低いツェナー電圧を有する定電圧ダイ
オードZDIIからなる送受信回路TRが、信号線SL
1.8Ls間へ接続されていると共に、これと対応して
、抵抗器Rs s〜RB6、フォトカプラPCII−P
C14、トランジスタQll 、 16および、コンデ
ンサC1lからなる駆動回路DRが、プロセッサCPU
5と送受信回路TRとの中継用として設けてあ夛、常時
は、障害の検出に応じて反転する検出信号KMがトラン
ジスタQl11をオンとし、フォトカプラPCIIを介
してトランジスタQuをオン状態としているため、制御
信!が送受信回路T8へ通ずゐものとなっている。
On the other hand, in the slave unit ST, transistors Qll to Q
14, resistor Ra1~Ray, photocoupler PC11~
No. 201, a transmitter/receiver circuit TR consisting of diodes Dll, Dlm, and a constant voltage diode ZDII having a Zener voltage higher than 5 and lower than 12V is connected to the signal line SL.
1.8Ls, and correspondingly, the resistor Rs s~RB6, the photocoupler PCII-P
A drive circuit DR consisting of C14, transistor Qll, 16, and capacitor C1l is connected to the processor CPU.
5 and the transmitting/receiving circuit TR. Normally, the detection signal KM, which is inverted in response to the detection of a fault, turns on the transistor Ql11 and turns on the transistor Qu via the photocoupler PCII. , control faith! is connected to the transmitter/receiver circuit T8.

このため、送(lIITXからの波高値12Vを有する
制御信号は、送受信回路TRのトランジスタQ14およ
び定電圧ダイオードZDIIを通過し、フォトカプラP
Cx*f介して駆動回路DBにおける抵抗11i)Re
番のアース側電位を変化させ、これが信号人力8工とし
てプロセッサCPU5へ与えられるものとな〕、子機s
T側の制御信号受信が行なわれる。
Therefore, the control signal having a peak value of 12V from the transmitter (IITX) passes through the transistor Q14 and the voltage regulator diode ZDII of the transmitter/receiver circuit TR, and passes through the photocoupler P.
Resistor 11i) Re in the drive circuit DB via Cx*f
This changes the ground side potential of the slave unit s, and this is given to the processor CPU 5 as a signal.
Control signal reception on the T side is performed.

主装置に8U側からの送信が終了すると、禁止信号RT
8が反転しトランジスタQiをオンとするため、トラン
ジスタQ4もオンとなシ、フォトカプラPCIおよびダ
イオードDsを介して信号線8Llへ+5vの電圧が印
加されることによシ、この状態において、子機8Tのプ
ロセッサCPU5が送信出力SOをパルス状に生ずると
、トランジスタQ16がオン・オフを行ない、フォトカ
プラPCl3を介してトランジスタQ1mをオン・オフ
させるため、抵抗器R14によ)信号l1IsLl、S
L島間が橋絡され、これに応じた電流が主装置KSUの
7オトカプラPCIへ通じ、抵抗器R1mのアース側電
位の変化へ変換されたうえ、プロセッサCPUへ受信デ
ータRxDとして与えられる。
When the transmission from the 8U side to the main device is completed, the prohibition signal RT
8 is inverted and the transistor Qi is turned on, the transistor Q4 is also turned on. In this state, the voltage of +5 V is applied to the signal line 8Ll via the photocoupler PCI and the diode Ds. When the processor CPU5 of the machine 8T generates the transmission output SO in the form of a pulse, the transistor Q16 turns on and off, and in order to turn on and off the transistor Q1m via the photocoupler PCl3, the resistor R14 outputs the signals l1IsLl,S.
The L islands are bridged, and a corresponding current is passed to the 7 Otocoupler PCI of the main unit KSU, converted into a change in the ground side potential of the resistor R1m, and then given to the processor CPU as received data RxD.

たゾし、このときには、信号@SLI、SLi間の電圧
が5■のため、定電圧ダイオードZDIIがオフであシ
、フォトカプラPCl4は応動しない。
However, at this time, since the voltage between the signals @SLI and SLi is 5.times., the constant voltage diode ZDII is off, and the photocoupler PCl4 does not respond.

また、トランジスタQ1sのオン・オフtC一応じ、ト
ランジスタQ1mもオン・オフを行ない、トランジスタ
Qlsのオン・オフと同期してフォトカプラPCIBへ
電流を通じておシ、これがフォトカプラPC1mを介し
て抵抗器RIIOの端子電圧変化となシ、コンデンサC
1lによシ平均化されたうえ、子機ST側送信の検出々
力IRQとしてプロセッサCPU5へ与えられる。
In addition, in response to the on/off tC of the transistor Q1s, the transistor Q1m is also turned on/off, and in synchronization with the on/off of the transistor Qls, a current is passed to the photocoupler PCIB, which is passed through the photocoupler PC1m to the resistor RIIO. When the terminal voltage changes, capacitor C
The signal is averaged by 1l, and then given to the processor CPU5 as the detection power IRQ for transmission from the slave ST side.

したがって、検出々力IRQは、子機8Tからの送信中
において必ず生ずるものであり、これをプロセッサCP
U5が監視し、若し、送信中にも検出々力IRQが生ぜ
ず、才たけ、送信中でないにもか\わらず検出々力IR
Qが生ずれば、 トランジスタQlsの短絡あるいは開
放、定電圧ダイオードZDIIの短絡、フォトカプラP
Ctaの異常等による送受信機能の障害発生と自からが
判断し、検出信号EMを反転させ、トランジスタQ1s
をオフとしてトランジスタQ11もオフとするため、送
受信回路TB−が信号線8Ltから切離され、これの動
作が禁止される。
Therefore, the detection power IRQ always occurs during transmission from the handset 8T, and it is
If U5 monitors and detects IRQ does not occur even during transmission, even though it is not transmitting, detects IRQ
If Q occurs, short circuit or open circuit of transistor Qls, short circuit of constant voltage diode ZDII, photocoupler P
It automatically determines that a failure has occurred in the transmitting/receiving function due to an abnormality in Cta, inverts the detection signal EM, and switches on the transistor Q1s.
is turned off and transistor Q11 is also turned off, so that transmitting/receiving circuit TB- is disconnected from signal line 8Lt and its operation is prohibited.

このため、障害の発生しない子機STと主装置に8Uと
の間においては、信号線8Ll 、SLsを正常に使用
できるものとなシ、全システムとしての機能が完全に維
持される。
Therefore, the signal lines 8Ll and SLs can be used normally between the slave unit ST and the main unit 8U where no fault occurs, and the functions of the entire system are maintained perfectly.

たゾし、同様の監視機能を備えるものであれば、制御信
号の種別に応じて各部の構成を定めればよく、本発明は
種々の費形が自在である。
However, as long as it has a similar monitoring function, the configuration of each part may be determined depending on the type of control signal, and the present invention can be implemented in various forms.

以上の説lI#cよシ明らかなとおり本発明によれば、
送受信機能に障害を生じた子機が自動的に共通の信号線
から除外されるため、全システムの機能が障害の発生し
た子機を除いて完全に維持され、各種用途のボタン電話
装置において顕著な効果が得られる。
As is clear from the above theory lI#c, according to the present invention,
Since a handset that has a problem with its transmitting/receiving function is automatically excluded from the common signal line, the functionality of the entire system is maintained completely except for the handset that has a problem, which is especially important in button telephone devices for various uses. You can get the following effect.

【図面の簡単な説明】[Brief explanation of the drawing]

図は本発明の実施例を示す要部回路図である。 K8U・・・・主装置、8T・・争・子機、8Lx、8
Ls**s*信号線、CPUm、CPU5・・e・プロ
セッサ、TX・・・・送信部、RX・・・・受信部、T
R・・・中込受信回路、DE’La*aa駆動回路、Q
x〜Qs、Qzz−Qta  #壷・・トランジスタ、
PCI 、PCII−PCl3瞭・・Oフォトカプラ、
Dt−DIl 、Dll 、D12  a @ @ダイ
オード、ZDI、ZDII・・e・定電圧タイオード、
R1〜R1g 、 Rat 〜Rsa * 11 @ 
11抵抗器、C11・・・管コンデンサ 特許出願人  株式会社 田村電機製作所代理人 山川
政樹(ほか1名)
The figure is a main circuit diagram showing an embodiment of the present invention. K8U...Main unit, 8T...War/Slave unit, 8Lx, 8
Ls**s* signal line, CPUm, CPU5...e processor, TX...transmitter, RX...receiver, T
R...Intermediate reception circuit, DE'La*aa drive circuit, Q
x~Qs, Qzz-Qta #pot...transistor,
PCI, PCII-PCl3 clear...O photocoupler,
Dt-DIl, Dll, D12 a @ @ diode, ZDI, ZDII...e, constant voltage diode,
R1~R1g, Rat~Rsa*11 @
11 resistor, C11... Tube capacitor Patent applicant Tamura Electric Co., Ltd. Agent Masaki Yamakawa (and 1 other person)

Claims (1)

【特許請求の範囲】[Claims] 信号線によシ主装置と子機との間における制御信号の送
受信を行なうボタン電話装置において、前記子機側の送
受信機能に障害を生じた際、これを自から検出し前記信
号線へ接続された送受信回踏の動作を禁止することを特
徴としたボタン電話装置の障害対策方式。
In a button telephone device that transmits and receives control signals between a main device and a handset via a signal line, when a failure occurs in the transmission/reception function of the handset, this is detected by itself and connected to the signal line. A fault countermeasure method for a button telephone device is characterized in that the operation of transmitting and receiving circuits is prohibited.
JP56125356A 1981-08-12 1981-08-12 Failure countermeasure system for button telephone set Pending JPS5827455A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56125356A JPS5827455A (en) 1981-08-12 1981-08-12 Failure countermeasure system for button telephone set

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56125356A JPS5827455A (en) 1981-08-12 1981-08-12 Failure countermeasure system for button telephone set

Publications (1)

Publication Number Publication Date
JPS5827455A true JPS5827455A (en) 1983-02-18

Family

ID=14908100

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56125356A Pending JPS5827455A (en) 1981-08-12 1981-08-12 Failure countermeasure system for button telephone set

Country Status (1)

Country Link
JP (1) JPS5827455A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63209357A (en) * 1987-02-26 1988-08-30 Oki Electric Ind Co Ltd Key telephone set
JPH01250700A (en) * 1988-03-31 1989-10-05 Toda Constr Co Ltd Sampling method for stored liquid in underground tank
JP2007315008A (en) * 2006-05-25 2007-12-06 Giken Kanamono Kk Bearing seat for latch lock having emergency escape function

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5432283A (en) * 1977-08-17 1979-03-09 Nec Corp Semiconductor laser unit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5432283A (en) * 1977-08-17 1979-03-09 Nec Corp Semiconductor laser unit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63209357A (en) * 1987-02-26 1988-08-30 Oki Electric Ind Co Ltd Key telephone set
JPH01250700A (en) * 1988-03-31 1989-10-05 Toda Constr Co Ltd Sampling method for stored liquid in underground tank
JP2007315008A (en) * 2006-05-25 2007-12-06 Giken Kanamono Kk Bearing seat for latch lock having emergency escape function

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